drv_sdif.c 8.0 KB

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  1. /*
  2. * Copyright (c) 2006-2023, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2017-08-08 Yang the first version
  9. * 2019-07-19 Magicoe The first version for LPC55S6x
  10. * 2023-02-0 Alex Yang update driver
  11. */
  12. #include "board.h"
  13. #include <rtdevice.h>
  14. #include "fsl_sdif.h"
  15. #ifdef RT_USING_SDIO
  16. //#define MMCSD_DEBUG
  17. #ifdef MMCSD_DEBUG
  18. #define MMCSD_DGB rt_kprintf
  19. #else
  20. #define MMCSD_DGB(fmt, ...)
  21. #endif
  22. #define SDMMCHOST_RESET_TIMEOUT_VALUE (1000000U)
  23. struct lpc_mmcsd
  24. {
  25. struct rt_mmcsd_host *host;
  26. SDIF_Type *SDIFx;
  27. uint32_t sdmmcHostDmaBuffer[0x40];
  28. };
  29. static void SDMMCHOST_ErrorRecovery(SDIF_Type *base)
  30. {
  31. (void)SDIF_Reset(base, kSDIF_ResetAll, SDMMCHOST_RESET_TIMEOUT_VALUE);
  32. /* the host controller clock will be disabled by the reset operation, so re-send the clock sync command to enable
  33. the output clock */
  34. sdif_command_t clockSync = {
  35. .flags = kSDIF_WaitPreTransferComplete | kSDIF_CmdUpdateClockRegisterOnly, .index = 0U, .argument = 0U};
  36. (void)SDIF_SendCommand(base, &clockSync, 0U);
  37. }
  38. static void lpc_sdmmc_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
  39. {
  40. struct lpc_mmcsd *mmcsd;
  41. struct rt_mmcsd_cmd *cmd;
  42. struct rt_mmcsd_data *data;
  43. rt_uint32_t *buf = NULL;
  44. status_t error;
  45. mmcsd = (struct lpc_mmcsd *) host->private_data;
  46. cmd = req->cmd;
  47. data = cmd->data;
  48. sdif_dma_config_t dmaConfig;
  49. dmaConfig.enableFixBurstLen = false;
  50. dmaConfig.mode = kSDIF_ChainDMAMode;
  51. dmaConfig.dmaDesBufferStartAddr = mmcsd->sdmmcHostDmaBuffer;
  52. dmaConfig.dmaDesBufferLen = 0x40;
  53. dmaConfig.dmaDesSkipLen = 0U;
  54. sdif_transfer_t fsl_content = {0};
  55. sdif_command_t fsl_command = {0};
  56. sdif_data_t fsl_data = {0};
  57. fsl_content.command = &fsl_command;
  58. fsl_content.data = &fsl_data;
  59. // MMCSD_DGB("ARG:0x%X, CODE:0x%X\r\n", cmd->arg, cmd->cmd_code);
  60. fsl_command.index = cmd->cmd_code;
  61. fsl_command.argument = cmd->arg;
  62. if (cmd->cmd_code == STOP_TRANSMISSION)
  63. fsl_command.type = kCARD_CommandTypeAbort;
  64. else
  65. fsl_command.type = kCARD_CommandTypeNormal;
  66. switch (cmd->flags & RESP_MASK)
  67. {
  68. case RESP_NONE:
  69. fsl_command.responseType = kCARD_ResponseTypeNone;
  70. break;
  71. case RESP_R1:
  72. fsl_command.responseType = kCARD_ResponseTypeR1;
  73. break;
  74. case RESP_R1B:
  75. fsl_command.responseType = kCARD_ResponseTypeR1b;
  76. break;
  77. case RESP_R2:
  78. fsl_command.responseType = kCARD_ResponseTypeR2;
  79. break;
  80. case RESP_R3:
  81. fsl_command.responseType = kCARD_ResponseTypeR3;
  82. break;
  83. case RESP_R4:
  84. fsl_command.responseType = kCARD_ResponseTypeR4;
  85. break;
  86. case RESP_R6:
  87. fsl_command.responseType = kCARD_ResponseTypeR6;
  88. break;
  89. case RESP_R7:
  90. fsl_command.responseType = kCARD_ResponseTypeR7;
  91. break;
  92. case RESP_R5:
  93. fsl_command.responseType = kCARD_ResponseTypeR5;
  94. break;
  95. default:
  96. RT_ASSERT(NULL);
  97. }
  98. fsl_command.flags = 0;
  99. fsl_content.command = &fsl_command;
  100. if (data)
  101. {
  102. if (req->stop != NULL)
  103. fsl_data.enableAutoCommand12 = true;
  104. else
  105. fsl_data.enableAutoCommand12 = false;
  106. fsl_data.enableIgnoreError = false;
  107. fsl_data.blockSize = data->blksize;
  108. fsl_data.blockCount = data->blks;
  109. if ((cmd->cmd_code == WRITE_BLOCK) || (cmd->cmd_code == WRITE_MULTIPLE_BLOCK))
  110. {
  111. if (buf)
  112. {
  113. MMCSD_DGB(" write(data->buf to buf) ");
  114. rt_memcpy(buf, data->buf, fsl_data.blockSize * fsl_data.blockCount);
  115. fsl_data.txData = (uint32_t const *)buf;
  116. }
  117. else
  118. {
  119. fsl_data.txData = (uint32_t const *)data->buf;
  120. }
  121. fsl_data.rxData = NULL;
  122. }
  123. else
  124. {
  125. if (buf)
  126. {
  127. fsl_data.rxData = (uint32_t *)buf;
  128. }
  129. else
  130. {
  131. fsl_data.rxData = (uint32_t *)data->buf;
  132. }
  133. fsl_data.txData = NULL;
  134. }
  135. fsl_content.data = &fsl_data;
  136. }
  137. else
  138. {
  139. fsl_content.data = NULL;
  140. }
  141. error = SDIF_TransferBlocking(mmcsd->SDIFx, &dmaConfig, &fsl_content);
  142. if (error != kStatus_Success)
  143. {
  144. SDMMCHOST_ErrorRecovery(mmcsd->SDIFx);
  145. MMCSD_DGB(" ***SDIF_TransferBlocking error: %d*** --> \n", error);
  146. cmd->err = -RT_ERROR;
  147. }
  148. if (buf)
  149. {
  150. if (fsl_data.rxData)
  151. {
  152. MMCSD_DGB("read copy buf to data->buf ");
  153. rt_memcpy(data->buf, buf, fsl_data.blockSize * fsl_data.blockCount);
  154. }
  155. rt_free_align(buf);
  156. }
  157. if ((cmd->flags & RESP_MASK) == RESP_R2)
  158. {
  159. cmd->resp[3] = fsl_command.response[0];
  160. cmd->resp[2] = fsl_command.response[1];
  161. cmd->resp[1] = fsl_command.response[2];
  162. cmd->resp[0] = fsl_command.response[3];
  163. // MMCSD_DGB(" resp 0x%08X 0x%08X 0x%08X 0x%08X\n", cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
  164. }
  165. else
  166. {
  167. cmd->resp[0] = fsl_command.response[0];
  168. // MMCSD_DGB(" resp 0x%08X\n", cmd->resp[0]);
  169. }
  170. mmcsd_req_complete(host);
  171. }
  172. static void lpc_sdmmc_set_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
  173. {
  174. //rt_kprintf("%s\r\n", __FUNCTION__);
  175. struct lpc_mmcsd *mmcsd;
  176. mmcsd = (struct lpc_mmcsd *) host->private_data;
  177. uint32_t sdxc_clock = io_cfg->clock;
  178. MMCSD_DGB("sdxc_clock:%d\r\n", sdxc_clock);
  179. MMCSD_DGB("bus_width:%d\r\n", io_cfg->bus_width);
  180. if (sdxc_clock != 0U)
  181. {
  182. SDIF_SetCardClock(mmcsd->SDIFx, CLOCK_GetSdioClkFreq(), sdxc_clock);
  183. switch (io_cfg->bus_width)
  184. {
  185. case MMCSD_BUS_WIDTH_4:
  186. SDIF_SetCardBusWidth(mmcsd->SDIFx, kSDIF_Bus4BitWidth);
  187. break;
  188. case MMCSD_BUS_WIDTH_8:
  189. SDIF_SetCardBusWidth(mmcsd->SDIFx, kSDIF_Bus8BitWidth);
  190. break;
  191. default:
  192. SDIF_SetCardBusWidth(mmcsd->SDIFx, kSDIF_Bus1BitWidth);
  193. break;
  194. }
  195. }
  196. rt_thread_mdelay(20);
  197. }
  198. static const struct rt_mmcsd_host_ops lpc_mmcsd_host_ops =
  199. {
  200. .request = lpc_sdmmc_request,
  201. .set_iocfg = lpc_sdmmc_set_iocfg,
  202. .get_card_status = NULL,
  203. .enable_sdio_irq = NULL, // Do not use the interrupt mode, use DMA instead
  204. };
  205. int rt_hw_sdio_init(void)
  206. {
  207. struct rt_mmcsd_host *host = NULL;
  208. struct lpc_mmcsd *mmcsd = NULL;
  209. host = mmcsd_alloc_host();
  210. if (!host)
  211. {
  212. return -RT_ERROR;
  213. }
  214. mmcsd = rt_malloc(sizeof(struct lpc_mmcsd));
  215. if (!mmcsd)
  216. {
  217. rt_kprintf("alloc mci failed\n");
  218. goto err;
  219. }
  220. rt_memset(mmcsd, 0, sizeof(struct lpc_mmcsd));
  221. mmcsd->SDIFx = SDIF;
  222. host->ops = &lpc_mmcsd_host_ops;
  223. host->freq_min = 375000;
  224. host->freq_max = 50000000;
  225. host->valid_ocr = VDD_30_31 | VDD_31_32 | VDD_32_33 | VDD_33_34;
  226. host->flags = MMCSD_MUTBLKWRITE | MMCSD_BUSWIDTH_4 | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ;
  227. host->max_seg_size = 65535;
  228. host->max_dma_segs = 2;
  229. host->max_blk_size = 512;
  230. host->max_blk_count = 4096;
  231. mmcsd->host = host;
  232. /* Perform necessary initialization */
  233. CLOCK_AttachClk(kMAIN_CLK_to_SDIO_CLK);
  234. CLOCK_SetClkDiv(kCLOCK_DivSdioClk, (uint32_t)(SystemCoreClock / FSL_FEATURE_SDIF_MAX_SOURCE_CLOCK + 1U), true);
  235. MMCSD_DGB("SDIO clock:%dHz\r\n", CLOCK_GetSdioClkFreq());
  236. sdif_config_t sdif_config = {0};
  237. sdif_config.responseTimeout = 0xFFU;
  238. sdif_config.cardDetDebounce_Clock = 0xFFFFFFU;
  239. sdif_config.dataTimeout = 0xFFFFFFU;
  240. SDIF_Init(mmcsd->SDIFx, &sdif_config);
  241. SDIF_EnableCardPower(mmcsd->SDIFx, false);
  242. SDIF_EnableCardPower(mmcsd->SDIFx, true);
  243. host->private_data = mmcsd;
  244. mmcsd_change(host);
  245. return 0;
  246. err:
  247. mmcsd_free_host(host);
  248. return -RT_ENOMEM;
  249. }
  250. INIT_DEVICE_EXPORT(rt_hw_sdio_init);
  251. #endif /* endif RT_USING_SDIO */