drv_wdt.c 3.1 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-29 zdzn first version
  9. */
  10. #include "drv_wdt.h"
  11. #ifdef BSP_USING_WDT
  12. #define SECS_TO_WDOG_TICKS(x) ((x) << 16)
  13. #define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
  14. static struct raspi_wdt_driver bcm_wdt;
  15. void raspi_watchdog_init(rt_uint32_t time_init)
  16. {
  17. bcm_wdt.timeout = time_init;
  18. }
  19. void raspi_watchdog_start()
  20. {
  21. volatile rt_uint32_t cur;
  22. PM_WDOG = PM_PASSWORD | (SECS_TO_WDOG_TICKS(bcm_wdt.timeout) & PM_WDOG_TIME_SET);
  23. cur = PM_RSTC;
  24. PM_RSTC = PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
  25. }
  26. void raspi_watchdog_stop()
  27. {
  28. PM_RSTC = PM_PASSWORD | PM_RSTC_RESET;
  29. }
  30. void raspi_watchdog_clr()
  31. {
  32. bcm_wdt.timeout = 0;
  33. }
  34. void raspi_watchdog_set_timeout(rt_uint32_t timeout_us)
  35. {
  36. bcm_wdt.timeout = timeout_us;
  37. }
  38. rt_uint64_t raspi_watchdog_get_timeout()
  39. {
  40. return bcm_wdt.timeout;
  41. }
  42. rt_uint64_t raspi_watchdog_get_timeleft()
  43. {
  44. rt_uint32_t ret = PM_WDOG;
  45. return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
  46. }
  47. static rt_err_t raspi_wdg_init(rt_watchdog_t *wdt)
  48. {
  49. /*init for 10S*/
  50. raspi_watchdog_init(1000000);
  51. raspi_watchdog_start();
  52. raspi_watchdog_stop();
  53. return RT_EOK;
  54. }
  55. static rt_err_t raspi_wdg_control(rt_watchdog_t *wdt, int cmd, void *arg)
  56. {
  57. rt_uint64_t timeout_us = 0;
  58. switch (cmd)
  59. {
  60. case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
  61. timeout_us = *((rt_uint32_t *)arg) * 1000000;
  62. if (timeout_us >= 0xFFFFFFFF)
  63. timeout_us = 0xFFFFFFFF;
  64. raspi_watchdog_set_timeout((rt_uint32_t)timeout_us);
  65. break;
  66. case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
  67. timeout_us = raspi_watchdog_get_timeout();
  68. *((rt_uint32_t *)arg) = timeout_us / 1000000;
  69. break;
  70. case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
  71. timeout_us = raspi_watchdog_get_timeleft();
  72. *((rt_uint32_t *)arg) = timeout_us / 1000000;
  73. break;
  74. case RT_DEVICE_CTRL_WDT_KEEPALIVE:
  75. raspi_watchdog_clr();
  76. break;
  77. case RT_DEVICE_CTRL_WDT_START:
  78. raspi_watchdog_start();
  79. break;
  80. case RT_DEVICE_CTRL_WDT_STOP:
  81. raspi_watchdog_stop();
  82. break;
  83. default:
  84. return -RT_EIO;
  85. }
  86. return RT_EOK;
  87. }
  88. static const struct rt_watchdog_ops raspi_wdg_pos =
  89. {
  90. raspi_wdg_init,
  91. raspi_wdg_control,
  92. };
  93. static rt_watchdog_t raspi_wdg;
  94. int rt_hw_wdt_init(void)
  95. {
  96. raspi_wdg.ops = &raspi_wdg_pos;
  97. rt_hw_watchdog_register(&raspi_wdg, "wdg", 0, RT_NULL);
  98. return RT_EOK;
  99. }
  100. INIT_DEVICE_EXPORT(rt_hw_wdt_init);
  101. /**
  102. * Reboot
  103. */
  104. int reboot(void)
  105. {
  106. unsigned int r;
  107. rt_kprintf("reboot system...\n");
  108. rt_thread_mdelay(100);
  109. // trigger a restart by instructing the GPU to boot from partition 0
  110. r = PM_RSTS; r &= ~0xfffffaaa;
  111. PM_RSTS = PM_PASSWORD | r; // boot from partition 0
  112. PM_WDOG = PM_PASSWORD | 10;
  113. PM_RSTC = PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
  114. while (1);
  115. return 0;
  116. }
  117. MSH_CMD_EXPORT(reboot,reboot system...);
  118. #endif /*BSP_USING_WDT */