drv_wdt.c 3.1 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2019-07-29 zdzn first version
  9. */
  10. #include "drv_wdt.h"
  11. #include "raspi.h"
  12. #ifdef BSP_USING_WDT
  13. #define SECS_TO_WDOG_TICKS(x) ((x) << 16)
  14. #define WDOG_TICKS_TO_SECS(x) ((x) >> 16)
  15. static struct raspi_wdt_driver bcm_wdt;
  16. void raspi_watchdog_init(rt_uint32_t time_init)
  17. {
  18. bcm_wdt.timeout = time_init;
  19. }
  20. void raspi_watchdog_start()
  21. {
  22. volatile rt_uint32_t cur;
  23. PM_WDOG = PM_PASSWORD | (SECS_TO_WDOG_TICKS(bcm_wdt.timeout) & PM_WDOG_TIME_SET);
  24. cur = PM_RSTC;
  25. PM_RSTC = PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) | PM_RSTC_WRCFG_FULL_RESET;
  26. }
  27. void raspi_watchdog_stop()
  28. {
  29. PM_RSTC = PM_PASSWORD | PM_RSTC_RESET;
  30. }
  31. void raspi_watchdog_clr()
  32. {
  33. bcm_wdt.timeout = 0;
  34. }
  35. void raspi_watchdog_set_timeout(rt_uint32_t timeout_us)
  36. {
  37. bcm_wdt.timeout = timeout_us;
  38. }
  39. rt_uint64_t raspi_watchdog_get_timeout()
  40. {
  41. return bcm_wdt.timeout;
  42. }
  43. rt_uint64_t raspi_watchdog_get_timeleft()
  44. {
  45. rt_uint32_t ret = PM_WDOG;
  46. return WDOG_TICKS_TO_SECS(ret & PM_WDOG_TIME_SET);
  47. }
  48. static rt_err_t raspi_wdg_init(rt_watchdog_t *wdt)
  49. {
  50. /*init for 10S*/
  51. raspi_watchdog_init(1000000);
  52. raspi_watchdog_start();
  53. raspi_watchdog_stop();
  54. return RT_EOK;
  55. }
  56. static rt_err_t raspi_wdg_control(rt_watchdog_t *wdt, int cmd, void *arg)
  57. {
  58. rt_uint64_t timeout_us = 0;
  59. switch (cmd)
  60. {
  61. case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
  62. timeout_us = *((rt_uint32_t *)arg) * 1000000;
  63. if (timeout_us >= 0xFFFFFFFF)
  64. timeout_us = 0xFFFFFFFF;
  65. raspi_watchdog_set_timeout((rt_uint32_t)timeout_us);
  66. break;
  67. case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
  68. timeout_us = raspi_watchdog_get_timeout();
  69. *((rt_uint32_t *)arg) = timeout_us / 1000000;
  70. break;
  71. case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
  72. timeout_us = raspi_watchdog_get_timeleft();
  73. *((rt_uint32_t *)arg) = timeout_us / 1000000;
  74. break;
  75. case RT_DEVICE_CTRL_WDT_KEEPALIVE:
  76. raspi_watchdog_clr();
  77. break;
  78. case RT_DEVICE_CTRL_WDT_START:
  79. raspi_watchdog_start();
  80. break;
  81. case RT_DEVICE_CTRL_WDT_STOP:
  82. raspi_watchdog_stop();
  83. break;
  84. default:
  85. return -RT_EIO;
  86. }
  87. return RT_EOK;
  88. }
  89. static const struct rt_watchdog_ops raspi_wdg_pos =
  90. {
  91. raspi_wdg_init,
  92. raspi_wdg_control,
  93. };
  94. static rt_watchdog_t raspi_wdg;
  95. int rt_hw_wdt_init(void)
  96. {
  97. raspi_wdg.ops = &raspi_wdg_pos;
  98. rt_hw_watchdog_register(&raspi_wdg, "wdg", 0, RT_NULL);
  99. return RT_EOK;
  100. }
  101. INIT_DEVICE_EXPORT(rt_hw_wdt_init);
  102. /**
  103. * Reboot
  104. */
  105. int reboot(void)
  106. {
  107. unsigned int r;
  108. rt_kprintf("reboot system...\n");
  109. rt_thread_mdelay(100);
  110. // trigger a restart by instructing the GPU to boot from partition 0
  111. r = PM_RSTS; r &= ~0xfffffaaa;
  112. PM_RSTS = PM_PASSWORD | r; // boot from partition 0
  113. PM_WDOG = PM_PASSWORD | 10;
  114. PM_RSTC = PM_PASSWORD | PM_RSTC_WRCFG_FULL_RESET;
  115. while (1);
  116. return 0;
  117. }
  118. MSH_CMD_EXPORT(reboot,reboot system...);
  119. #endif /*BSP_USING_WDT */