drv_i2c.c 8.6 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368
  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-11-28 bigmagic first version
  9. */
  10. #include "drv_i2c.h"
  11. #include "drv_gpio.h"
  12. #include "raspi4.h"
  13. #include "mbox.h"
  14. /*
  15. * (3.3v) -1 2-
  16. * (SDA1/SDA3) -3 4-
  17. * (SCL1/SCL3) -5 6-
  18. * (SDA3) -7 8-
  19. * -9 10-
  20. * -11 12-
  21. * -13 14-
  22. * -15 16-
  23. * -17 18-
  24. * -19 20-
  25. * (SCL4) -21 22-
  26. * -23 24- (SDA4)
  27. * -25 26- (SCL4)
  28. * -27 28-
  29. * (SCL3) -29 30-
  30. * (SDA4) -31 32-
  31. */
  32. #define DBG_TAG "drv.i2c"
  33. #define DBG_LVL DBG_INFO
  34. #include <rtdbg.h>
  35. struct raspi_i2c_hw_config
  36. {
  37. rt_uint32_t bsc_num;
  38. rt_uint32_t bsc_rate;
  39. rt_uint32_t bsc_address;
  40. rt_uint32_t sda_pin;
  41. rt_uint32_t scl_pin;
  42. rt_uint32_t sda_mode;
  43. rt_uint32_t scl_mode;
  44. };
  45. rt_uint8_t i2c_read_or_write(volatile rt_uint32_t base, rt_uint8_t* buf, rt_uint32_t len, rt_uint8_t flag)
  46. {
  47. rt_uint32_t status;
  48. rt_uint32_t remaining = len;
  49. rt_uint32_t i = 0;
  50. rt_uint8_t reason = I2C_REASON_OK;
  51. /* Clear FIFO */
  52. BSC_C(base) |= (BSC_C_CLEAR_1 & BSC_C_CLEAR_1);
  53. /* Clear Status */
  54. BSC_S(base) = BSC_S_CLKT | BSC_S_ERR | BSC_S_DONE;
  55. /* Set Data Length */
  56. BSC_DLEN(base) = len;
  57. if (flag)
  58. {
  59. /* Start read */
  60. BSC_C(base) = BSC_C_I2CEN | BSC_C_ST | BSC_C_READ;
  61. /* wait for transfer to complete */
  62. while (!(BSC_S(base) & BSC_S_DONE))
  63. {
  64. /* we must empty the FIFO as it is populated and not use any delay */
  65. while (remaining && (BSC_S(base) & BSC_S_RXD))
  66. {
  67. /* Read from FIFO, no barrier */
  68. buf[i] = BSC_FIFO(base);
  69. i++;
  70. remaining--;
  71. }
  72. }
  73. /* transfer has finished - grab any remaining stuff in FIFO */
  74. while (remaining && (BSC_S(base) & BSC_S_RXD))
  75. {
  76. /* Read from FIFO, no barrier */
  77. buf[i] = BSC_FIFO(base);
  78. i++;
  79. remaining--;
  80. }
  81. }
  82. else
  83. {
  84. LOG_D("i2c%d write start", flag);
  85. /* pre populate FIFO with max buffer */
  86. while (remaining && (i < BSC_FIFO_SIZE))
  87. {
  88. BSC_FIFO(base) = buf[i];
  89. i++;
  90. remaining--;
  91. }
  92. /* Enable device and start transfer */
  93. BSC_C(base) = BSC_C_I2CEN | BSC_C_ST;
  94. /* Transfer is over when BCM2835_BSC_S_DONE */
  95. while (!(BSC_S(base) & BSC_S_DONE))
  96. {
  97. while (remaining && (BSC_S(base) & BSC_S_TXD))
  98. {
  99. /* Write to FIFO */
  100. BSC_FIFO(base) = buf[i];
  101. i++;
  102. remaining--;
  103. }
  104. }
  105. LOG_D("i2c%d write end", flag);
  106. }
  107. status = BSC_S(base);
  108. if (status & BSC_S_ERR)
  109. {
  110. reason = I2C_REASON_ERROR_NACK;
  111. }
  112. else if (status & BSC_S_CLKT)
  113. {
  114. reason = I2C_REASON_ERROR_CLKT;
  115. }
  116. else if (remaining)
  117. {
  118. reason = I2C_REASON_ERROR_DATA;
  119. }
  120. BSC_C(base) |= (BSC_S_DONE & BSC_S_DONE);
  121. return reason;
  122. }
  123. static rt_ssize_t raspi_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
  124. struct rt_i2c_msg msgs[],
  125. rt_uint32_t num)
  126. {
  127. rt_size_t i;
  128. rt_uint8_t reason;
  129. RT_ASSERT(bus != RT_NULL);
  130. struct raspi_i2c_hw_config *i2c_hw_config = (struct raspi_i2c_hw_config*)(bus->priv);
  131. //Slave Address
  132. BSC_A(i2c_hw_config->bsc_address) = msgs->addr;
  133. for (i = 0; i < num; i++)
  134. {
  135. if (msgs[i].flags & RT_I2C_RD)
  136. reason = i2c_read_or_write(i2c_hw_config->bsc_address, msgs->buf, msgs->len, 1);
  137. else
  138. reason = i2c_read_or_write(i2c_hw_config->bsc_address, msgs->buf, msgs->len, 0);
  139. }
  140. return (reason == 0)? i : 0;
  141. }
  142. static rt_ssize_t raspi_i2c_slv_xfer(struct rt_i2c_bus_device *bus,
  143. struct rt_i2c_msg msgs[],
  144. rt_uint32_t num)
  145. {
  146. return 0;
  147. }
  148. static rt_err_t raspi_i2c_bus_control(struct rt_i2c_bus_device *bus,
  149. int cmd,
  150. void *args)
  151. {
  152. return RT_EOK;
  153. }
  154. static rt_err_t raspi_i2c_configure(struct raspi_i2c_hw_config *cfg)
  155. {
  156. RT_ASSERT(cfg != RT_NULL);
  157. rt_uint32_t apb_clock = 0;
  158. prev_raspi_pin_mode(cfg->sda_pin, cfg->sda_mode);//sda
  159. prev_raspi_pin_mode(cfg->scl_pin, cfg->scl_mode);//scl
  160. /* use 0xFFFE mask to limit a max value and round down any odd number */
  161. apb_clock = bcm271x_mbox_clock_get_rate(CORE_CLK_ID);
  162. rt_uint32_t divider = (apb_clock / cfg->bsc_rate) & 0xFFFE;
  163. BSC_DIV(cfg->bsc_address) = (rt_uint16_t)divider;
  164. return RT_EOK;
  165. }
  166. static const struct rt_i2c_bus_device_ops raspi_i2c_ops =
  167. {
  168. .master_xfer = raspi_i2c_mst_xfer,
  169. .slave_xfer = raspi_i2c_slv_xfer,
  170. .i2c_bus_control = raspi_i2c_bus_control,
  171. };
  172. #if defined (BSP_USING_I2C0)
  173. #define I2C0_BUS_NAME "i2c0"
  174. static struct raspi_i2c_hw_config hw_device0 =
  175. {
  176. .bsc_num = 0,
  177. .bsc_rate = 100000,//100k
  178. .bsc_address = BSC0_BASE,
  179. .sda_pin = GPIO_PIN_0,
  180. .scl_pin = GPIO_PIN_1,
  181. .sda_mode = ALT0,
  182. .scl_mode = ALT0,
  183. };
  184. struct rt_i2c_bus_device device0 =
  185. {
  186. .ops = &raspi_i2c_ops,
  187. .priv = (void *)&hw_device0,
  188. };
  189. #endif
  190. #if defined (BSP_USING_I2C1)
  191. #define I2C1_BUS_NAME "i2c1"
  192. static struct raspi_i2c_hw_config hw_device1 =
  193. {
  194. .bsc_num = 1,
  195. .bsc_rate = 100000,//100k
  196. .bsc_address = BSC1_BASE,
  197. .sda_pin = GPIO_PIN_2,
  198. .scl_pin = GPIO_PIN_3,
  199. .sda_mode = ALT0,
  200. .scl_mode = ALT0,
  201. };
  202. struct rt_i2c_bus_device device1 =
  203. {
  204. .ops = &raspi_i2c_ops,
  205. .priv = (void *)&hw_device1,
  206. };
  207. #endif
  208. #if defined (BSP_USING_I2C3)
  209. #define I2C3_BUS_NAME "i2c3"
  210. static struct raspi_i2c_hw_config hw_device3 =
  211. {
  212. .bsc_num = 3,
  213. .bsc_rate = 100000,//100k
  214. .bsc_address = BSC3_BASE,
  215. #ifndef BSP_USING_I2C3_0
  216. .sda_pin = GPIO_PIN_2,
  217. .scl_pin = GPIO_PIN_3,
  218. #else
  219. .sda_pin = GPIO_PIN_4,
  220. .scl_pin = GPIO_PIN_5,
  221. #endif
  222. .sda_mode = ALT5,
  223. .scl_mode = ALT5,
  224. };
  225. struct rt_i2c_bus_device device3 =
  226. {
  227. .ops = &raspi_i2c_ops,
  228. .priv = (void *)&hw_device3,
  229. };
  230. #endif
  231. #if defined (BSP_USING_I2C4)
  232. #define I2C4_BUS_NAME "i2c4"
  233. static struct raspi_i2c_hw_config hw_device4 =
  234. {
  235. .bsc_num = 4,
  236. .bsc_rate = 100000,//100k
  237. .bsc_address = BSC4_BASE,
  238. #ifdef BSP_USING_I2C4_0
  239. .sda_pin = GPIO_PIN_6,
  240. .scl_pin = GPIO_PIN_7,
  241. #else
  242. .sda_pin = GPIO_PIN_8,
  243. .scl_pin = GPIO_PIN_9,
  244. #endif
  245. .sda_mode = ALT5,
  246. .scl_mode = ALT5,
  247. };
  248. struct rt_i2c_bus_device device4 =
  249. {
  250. .ops = &raspi_i2c_ops,
  251. .priv = (void *)&hw_device4,
  252. };
  253. #endif
  254. #if defined (BSP_USING_I2C5)
  255. #define I2C5_BUS_NAME "i2c5"
  256. static struct raspi_i2c_hw_config hw_device5 =
  257. {
  258. .bsc_num = 5,
  259. .bsc_rate = 100000,//100k
  260. .bsc_address = BSC5_BASE,
  261. #ifdef BSP_USING_I2C5_0
  262. .sda_pin = GPIO_PIN_10,
  263. .scl_pin = GPIO_PIN_11,
  264. #else
  265. .sda_pin = GPIO_PIN_12,
  266. .scl_pin = GPIO_PIN_13,
  267. #endif
  268. .sda_mode = ALT5,
  269. .scl_mode = ALT5,
  270. };
  271. struct rt_i2c_bus_device device5 =
  272. {
  273. .ops = &raspi_i2c_ops,
  274. .priv = (void *)&hw_device5,
  275. };
  276. #endif
  277. #if defined (BSP_USING_I2C6)
  278. #define I2C6_BUS_NAME "i2c6"
  279. static struct raspi_i2c_hw_config hw_device6 =
  280. {
  281. .bsc_num = 6,
  282. .bsc_rate = 100000,//100k
  283. .bsc_address = BSC6_BASE,
  284. #ifdef BSP_USING_I2C5_0
  285. .sda_pin = GPIO_PIN_0,
  286. .scl_pin = GPIO_PIN_1,
  287. #else
  288. .sda_pin = GPIO_PIN_22,
  289. .scl_pin = GPIO_PIN_23,
  290. #endif
  291. .sda_mode = ALT5,
  292. .scl_mode = ALT5,
  293. };
  294. struct rt_i2c_bus_device device6 =
  295. {
  296. .ops = &raspi_i2c_ops,
  297. .priv = (void *)&hw_device6,
  298. };
  299. #endif
  300. int rt_hw_i2c_init(void)
  301. {
  302. #if defined(BSP_USING_I2C0)
  303. raspi_i2c_configure(&hw_device0);
  304. rt_i2c_bus_device_register(&device0, I2C0_BUS_NAME);
  305. #endif
  306. #if defined(BSP_USING_I2C1)
  307. raspi_i2c_configure(&hw_device1);
  308. rt_i2c_bus_device_register(&device1, I2C1_BUS_NAME);
  309. #endif
  310. #if defined(BSP_USING_I2C3)
  311. raspi_i2c_configure(&hw_device3);
  312. rt_i2c_bus_device_register(&device3, I2C3_BUS_NAME);
  313. #endif
  314. #if defined(BSP_USING_I2C4)
  315. raspi_i2c_configure(&hw_device4);
  316. rt_i2c_bus_device_register(&device4, I2C4_BUS_NAME);
  317. #endif
  318. #if defined(BSP_USING_I2C5)
  319. raspi_i2c_configure(&hw_device5);
  320. rt_i2c_bus_device_register(&device5, I2C5_BUS_NAME);
  321. #endif
  322. #if defined(BSP_USING_I2C6)
  323. raspi_i2c_configure(&hw_device6);
  324. rt_i2c_bus_device_register(&device6, I2C6_BUS_NAME);
  325. #endif
  326. return 0;
  327. }
  328. INIT_DEVICE_EXPORT(rt_hw_i2c_init);