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cpuport.h 1.7 KB

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  1. /*
  2. * Copyright (c) 2011-2024, Shanghai Real-Thread Electronic Technology Co.,Ltd
  3. *
  4. * Change Logs:
  5. * Date Author Notes
  6. * 2022-08-29 RT-Thread first version
  7. */
  8. #ifndef CPUPORT_H__
  9. #define CPUPORT_H__
  10. /* the exception stack without VFP registers */
  11. struct rt_hw_exp_stack
  12. {
  13. unsigned long r0;
  14. unsigned long r1;
  15. unsigned long r2;
  16. unsigned long r3;
  17. unsigned long r4;
  18. unsigned long r5;
  19. unsigned long r6;
  20. unsigned long r7;
  21. unsigned long r8;
  22. unsigned long r9;
  23. unsigned long r10;
  24. unsigned long fp;
  25. unsigned long ip;
  26. unsigned long sp;
  27. unsigned long lr;
  28. unsigned long pc;
  29. unsigned long cpsr;
  30. };
  31. struct rt_hw_stack
  32. {
  33. unsigned long cpsr;
  34. unsigned long r0;
  35. unsigned long r1;
  36. unsigned long r2;
  37. unsigned long r3;
  38. unsigned long r4;
  39. unsigned long r5;
  40. unsigned long r6;
  41. unsigned long r7;
  42. unsigned long r8;
  43. unsigned long r9;
  44. unsigned long r10;
  45. unsigned long fp;
  46. unsigned long ip;
  47. unsigned long lr;
  48. unsigned long pc;
  49. };
  50. #define USERMODE 0x10
  51. #define FIQMODE 0x11
  52. #define IRQMODE 0x12
  53. #define SVCMODE 0x13
  54. #define MONITORMODE 0x16
  55. #define ABORTMODE 0x17
  56. #define HYPMODE 0x1b
  57. #define UNDEFMODE 0x1b
  58. #define MODEMASK 0x1f
  59. #define NOINT 0xc0
  60. #define T_Bit (1<<5)
  61. #define F_Bit (1<<6)
  62. #define I_Bit (1<<7)
  63. #define A_Bit (1<<8)
  64. #define E_Bit (1<<9)
  65. #define J_Bit (1<<24)
  66. // rt_inline void rt_hw_isb(void)
  67. // {
  68. // __asm volatile ("isb":::"memory");
  69. // }
  70. // rt_inline void rt_hw_dmb(void)
  71. // {
  72. // __asm volatile ("dmb":::"memory");
  73. // }
  74. // rt_inline void rt_hw_dsb(void)
  75. // {
  76. // __asm volatile ("dsb":::"memory");
  77. // }
  78. #endif /*CPUPORT_H__*/