interrupt.c 6.4 KB

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  1. /*
  2. * Copyright (c) 2006-2024, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2013-07-06 Bernard first version
  9. * 2018-11-22 Jesven add smp support
  10. */
  11. #include <rthw.h>
  12. #include <rtthread.h>
  13. #include "interrupt.h"
  14. #include "gicv3.h"
  15. /* exception and interrupt handler table */
  16. struct rt_irq_desc isr_table[MAX_HANDLERS];
  17. #ifndef RT_USING_SMP
  18. /* Those varibles will be accessed in ISR, so we need to share them. */
  19. rt_uint32_t rt_interrupt_from_thread = 0;
  20. rt_uint32_t rt_interrupt_to_thread = 0;
  21. rt_uint32_t rt_thread_switch_interrupt_flag = 0;
  22. #ifdef RT_USING_HOOK
  23. static void (*rt_interrupt_switch_hook)(void);
  24. void rt_interrupt_switch_sethook(void (*hook)(void))
  25. {
  26. rt_interrupt_switch_hook = hook;
  27. }
  28. #endif
  29. void rt_interrupt_hook(void)
  30. {
  31. RT_OBJECT_HOOK_CALL(rt_interrupt_switch_hook, ());
  32. }
  33. #endif
  34. const unsigned int VECTOR_BASE = 0x00;
  35. extern void rt_cpu_vector_set_base(unsigned int addr);
  36. extern int system_vectors;
  37. void rt_hw_vector_init(void)
  38. {
  39. rt_cpu_vector_set_base((unsigned int)&system_vectors);
  40. }
  41. /**
  42. * This function will initialize hardware interrupt
  43. * Called by the primary cpu(cpu0)
  44. */
  45. void rt_hw_interrupt_init(void)
  46. {
  47. rt_uint32_t gic_dist_base;
  48. rt_uint32_t gic_irq_start;
  49. /* initialize vector table */
  50. /* rt_hw_vector_init(); */
  51. /* initialize exceptions table */
  52. rt_memset(isr_table, 0x00, sizeof(isr_table));
  53. /* initialize ARM GIC */
  54. gic_dist_base = platform_get_gic_dist_base();
  55. gic_irq_start = GIC_IRQ_START;
  56. arm_gic_dist_init(0, gic_dist_base, gic_irq_start);
  57. arm_gic_cpu_init(0);
  58. arm_gic_redist_init(0);
  59. }
  60. /**
  61. * This function will mask a interrupt.
  62. * @param vector the interrupt number
  63. */
  64. void rt_hw_interrupt_mask(int vector)
  65. {
  66. arm_gic_mask(0, vector);
  67. }
  68. /**
  69. * This function will un-mask a interrupt.
  70. * @param vector the interrupt number
  71. */
  72. void rt_hw_interrupt_umask(int vector)
  73. {
  74. arm_gic_umask(0, vector);
  75. }
  76. /**
  77. * This function returns the active interrupt number.
  78. * @param none
  79. */
  80. int rt_hw_interrupt_get_irq(void)
  81. {
  82. return arm_gic_get_active_irq(0);
  83. }
  84. /**
  85. * This function acknowledges the interrupt.
  86. * @param vector the interrupt number
  87. */
  88. void rt_hw_interrupt_ack(int vector)
  89. {
  90. arm_gic_ack(0, vector);
  91. }
  92. /**
  93. * This function set interrupt CPU targets.
  94. * @param vector: the interrupt number
  95. * cpu_mask: target cpus mask, one bit for one core
  96. */
  97. void rt_hw_interrupt_set_target_cpus(int vector, unsigned int cpu_mask)
  98. {
  99. arm_gic_set_cpu(0, vector, cpu_mask);
  100. }
  101. /**
  102. * This function get interrupt CPU targets.
  103. * @param vector: the interrupt number
  104. * @return target cpus mask, one bit for one core
  105. */
  106. unsigned int rt_hw_interrupt_get_target_cpus(int vector)
  107. {
  108. return arm_gic_get_target_cpu(0, vector);
  109. }
  110. /**
  111. * This function set interrupt triger mode.
  112. * @param vector: the interrupt number
  113. * mode: interrupt triger mode; 0: level triger, 1: edge triger
  114. */
  115. void rt_hw_interrupt_set_triger_mode(int vector, unsigned int mode)
  116. {
  117. arm_gic_set_configuration(0, vector, mode);
  118. }
  119. /**
  120. * This function get interrupt triger mode.
  121. * @param vector: the interrupt number
  122. * @return interrupt triger mode; 0: level triger, 1: edge triger
  123. */
  124. unsigned int rt_hw_interrupt_get_triger_mode(int vector)
  125. {
  126. return arm_gic_get_configuration(0, vector);
  127. }
  128. /**
  129. * This function set interrupt pending flag.
  130. * @param vector: the interrupt number
  131. */
  132. void rt_hw_interrupt_set_pending(int vector)
  133. {
  134. arm_gic_set_pending_irq(0, vector);
  135. }
  136. /**
  137. * This function get interrupt pending flag.
  138. * @param vector: the interrupt number
  139. * @return interrupt pending flag, 0: not pending; 1: pending
  140. */
  141. unsigned int rt_hw_interrupt_get_pending(int vector)
  142. {
  143. return arm_gic_get_pending_irq(0, vector);
  144. }
  145. /**
  146. * This function clear interrupt pending flag.
  147. * @param vector: the interrupt number
  148. */
  149. void rt_hw_interrupt_clear_pending(int vector)
  150. {
  151. arm_gic_clear_pending_irq(0, vector);
  152. }
  153. /**
  154. * This function set interrupt priority value.
  155. * @param vector: the interrupt number
  156. * priority: the priority of interrupt to set
  157. */
  158. void rt_hw_interrupt_set_priority(int vector, unsigned int priority)
  159. {
  160. arm_gic_set_priority(0, vector, priority);
  161. }
  162. /**
  163. * This function get interrupt priority.
  164. * @param vector: the interrupt number
  165. * @return interrupt priority value
  166. */
  167. unsigned int rt_hw_interrupt_get_priority(int vector)
  168. {
  169. return arm_gic_get_priority(0, vector);
  170. }
  171. /**
  172. * This function set priority masking threshold.
  173. * @param priority: priority masking threshold
  174. */
  175. void rt_hw_interrupt_set_priority_mask(unsigned int priority)
  176. {
  177. arm_gic_set_interface_prior_mask(0, priority);
  178. }
  179. /**
  180. * This function get priority masking threshold.
  181. * @param none
  182. * @return priority masking threshold
  183. */
  184. unsigned int rt_hw_interrupt_get_priority_mask(void)
  185. {
  186. return arm_gic_get_interface_prior_mask(0);
  187. }
  188. /**
  189. * This function set priority grouping field split point.
  190. * @param bits: priority grouping field split point
  191. * @return 0: success; -1: failed
  192. */
  193. int rt_hw_interrupt_set_prior_group_bits(unsigned int bits)
  194. {
  195. int status;
  196. if (bits < 8)
  197. {
  198. arm_gic_set_binary_point(0, (7 - bits));
  199. status = 0;
  200. }
  201. else
  202. {
  203. status = -1;
  204. }
  205. return (status);
  206. }
  207. /**
  208. * This function get priority grouping field split point.
  209. * @param none
  210. * @return priority grouping field split point
  211. */
  212. unsigned int rt_hw_interrupt_get_prior_group_bits(void)
  213. {
  214. unsigned int bp;
  215. bp = arm_gic_get_binary_point(0) & 0x07;
  216. return (7 - bp);
  217. }
  218. /**
  219. * This function will install a interrupt service routine to a interrupt.
  220. * @param vector the interrupt number
  221. * @param new_handler the interrupt service routine to be installed
  222. * @param old_handler the old interrupt service routine
  223. */
  224. rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
  225. void *param, const char *name)
  226. {
  227. rt_isr_handler_t old_handler = RT_NULL;
  228. if (vector < MAX_HANDLERS)
  229. {
  230. old_handler = isr_table[vector].handler;
  231. if (handler != RT_NULL)
  232. {
  233. #ifdef RT_USING_INTERRUPT_INFO
  234. rt_strncpy(isr_table[vector].name, name, RT_NAME_MAX);
  235. #endif /* RT_USING_INTERRUPT_INFO */
  236. isr_table[vector].handler = handler;
  237. isr_table[vector].param = param;
  238. }
  239. }
  240. return old_handler;
  241. }