mmu.h 2.7 KB

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  1. /*
  2. * Copyright (c) 2006-2021, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2021-01-30 lizhirui first version
  9. * 2023-10-12 Shell Add permission control API
  10. */
  11. #ifndef __MMU_H__
  12. #define __MMU_H__
  13. #include "riscv.h"
  14. #include "riscv_mmu.h"
  15. #include <mm_aspace.h>
  16. #include <stddef.h>
  17. /* RAM, Flash, or ROM */
  18. #define NORMAL_MEM 0
  19. /* normal nocache memory mapping type */
  20. #define NORMAL_NOCACHE_MEM 1
  21. /* MMIO region */
  22. #define DEVICE_MEM 2
  23. typedef size_t rt_pte_t;
  24. struct mem_desc
  25. {
  26. rt_size_t vaddr_start;
  27. rt_size_t vaddr_end;
  28. rt_size_t paddr_start;
  29. rt_size_t attr;
  30. struct rt_varea varea;
  31. };
  32. #define GET_PF_ID(addr) ((addr) >> PAGE_OFFSET_BIT)
  33. #define GET_PF_OFFSET(addr) __MASKVALUE(addr, PAGE_OFFSET_MASK)
  34. #define GET_L1(addr) __PARTBIT(addr, VPN2_SHIFT, VPN2_BIT)
  35. #define GET_L2(addr) __PARTBIT(addr, VPN1_SHIFT, VPN1_BIT)
  36. #define GET_L3(addr) __PARTBIT(addr, VPN0_SHIFT, VPN0_BIT)
  37. #define GET_PPN(pte) \
  38. (__PARTBIT(pte, PTE_PPN_SHIFT, PHYSICAL_ADDRESS_WIDTH_BITS - PTE_PPN_SHIFT))
  39. #define GET_PADDR(pte) (GET_PPN(pte) << PAGE_OFFSET_BIT)
  40. #define VPN_TO_PPN(vaddr, pv_off) (((rt_size_t)(vaddr)) + (pv_off))
  41. #define PPN_TO_VPN(paddr, pv_off) (((rt_size_t)(paddr)) - (pv_off))
  42. #define COMBINEVADDR(l1_off, l2_off, l3_off) \
  43. (((l1_off) << VPN2_SHIFT) | ((l2_off) << VPN1_SHIFT) | \
  44. ((l3_off) << VPN0_SHIFT))
  45. #define COMBINEPTE(paddr, attr) \
  46. ((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr))
  47. #define MMU_MAP_ERROR_VANOTALIGN -1
  48. #define MMU_MAP_ERROR_PANOTALIGN -2
  49. #define MMU_MAP_ERROR_NOPAGE -3
  50. #define MMU_MAP_ERROR_CONFLICT -4
  51. void *rt_hw_mmu_tbl_get(void);
  52. int rt_hw_mmu_map_init(rt_aspace_t aspace, void *v_address, rt_size_t size,
  53. rt_size_t *vtable, rt_size_t pv_off);
  54. void rt_hw_mmu_setup(rt_aspace_t aspace, struct mem_desc *mdesc, int desc_nr);
  55. void rt_hw_mmu_kernel_map_init(rt_aspace_t aspace, rt_size_t vaddr_start,
  56. rt_size_t size);
  57. void *rt_hw_mmu_map(rt_aspace_t aspace, void *v_addr, void *p_addr, size_t size,
  58. size_t attr);
  59. void rt_hw_mmu_unmap(rt_aspace_t aspace, void *v_addr, size_t size);
  60. void rt_hw_aspace_switch(rt_aspace_t aspace);
  61. void *rt_hw_mmu_v2p(rt_aspace_t aspace, void *vaddr);
  62. int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size,
  63. enum rt_mmu_cntl cmd);
  64. void *rt_hw_mmu_pgtbl_create(void);
  65. void rt_hw_mmu_pgtbl_delete(void *pgtbl);
  66. #endif