Merge pull request #3799 from OpenNuvoton/m480

[nuvoton] Sync drivers of Nuvoton-M480 platform.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_eadc.h

@@ -433,11 +433,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[0] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[0] = (((eadc)->CMP[0] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Configure the comparator 1 and enable it.
@@ -458,11 +459,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[1] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[1] = (((eadc)->CMP[1] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Configure the comparator 2 and enable it.
@@ -483,11 +485,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[2] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[2] = (((eadc)->CMP[2] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Configure the comparator 3 and enable it.
@@ -508,11 +511,12 @@ extern "C"
                          u32ModuleNum,\
                          u32Condition,\
                          u16CMPData,\
-                         u32MatchCount) ((eadc)->CMP[3] |=(((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
+                         u32MatchCount) ((eadc)->CMP[3] = (((eadc)->CMP[3] & ~(EADC_CMP_CMPSPL_Msk|EADC_CMP_CMPCOND_Msk|EADC_CMP_CMPDAT_Msk|EADC_CMP_CMPMCNT_Msk))|\
+                                                            (((u32ModuleNum) << EADC_CMP_CMPSPL_Pos)|\
                                                             (u32Condition) |\
                                                             ((u16CMPData) << EADC_CMP_CMPDAT_Pos)| \
                                                             (((u32MatchCount) - 1) << EADC_CMP_CMPMCNT_Pos)|\
-                                                            EADC_CMP_ADCMPEN_Msk))
+                                                            EADC_CMP_ADCMPEN_Msk)))
 
 /**
   * @brief Enable the compare window mode.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_qspi.h

@@ -95,6 +95,15 @@ extern "C"
   */
 #define QSPI_TRIGGER_TX_PDMA(qspi)   ((qspi)->PDMACTL |= QSPI_PDMACTL_TXPDMAEN_Msk)
 
+/**
+  * @brief      Trigger TX and RX PDMA function.
+  * @param[in]  qspi The pointer of the specified QSPI module.
+  * @return     None.
+  * @details    Set TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to enable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define QSPI_TRIGGER_TX_RX_PDMA(qspi)   ((qspi)->PDMACTL |= (QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk))
+
 /**
   * @brief      Disable RX PDMA transfer.
   * @param[in]  qspi The pointer of the specified QSPI module.
@@ -113,6 +122,15 @@ extern "C"
   */
 #define QSPI_DISABLE_TX_PDMA(qspi) ( (qspi)->PDMACTL &= ~QSPI_PDMACTL_TXPDMAEN_Msk )
 
+/**
+  * @brief      Disable TX and RX PDMA transfer.
+  * @param[in]  qspi The pointer of the specified QSPI module.
+  * @return     None.
+  * @details    Clear TXPDMAEN bit and RXPDMAEN bit of QSPI_PDMACTL register to disable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define QSPI_DISABLE_TX_RX_PDMA(qspi) ( (qspi)->PDMACTL &= ~(QSPI_PDMACTL_TXPDMAEN_Msk | QSPI_PDMACTL_RXPDMAEN_Msk) )
+
 /**
   * @brief      Get the count of available data in RX FIFO.
   * @param[in]  qspi The pointer of the specified QSPI module.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_spi.h

@@ -133,6 +133,15 @@ extern "C"
   */
 #define SPI_TRIGGER_TX_PDMA(spi)   ((spi)->PDMACTL |= SPI_PDMACTL_TXPDMAEN_Msk)
 
+/**
+  * @brief      Trigger TX and RX PDMA function.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Set TXPDMAEN bit and RXPDMAEN bit of SPI_PDMACTL register to enable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define SPI_TRIGGER_TX_RX_PDMA(spi)   ((spi)->PDMACTL |= (SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RXPDMAEN_Msk))
+
 /**
   * @brief      Disable RX PDMA transfer.
   * @param[in]  spi The pointer of the specified SPI module.
@@ -151,6 +160,15 @@ extern "C"
   */
 #define SPI_DISABLE_TX_PDMA(spi) ( (spi)->PDMACTL &= ~SPI_PDMACTL_TXPDMAEN_Msk )
 
+/**
+  * @brief      Disable TX and RX PDMA transfer.
+  * @param[in]  spi The pointer of the specified SPI module.
+  * @return     None.
+  * @details    Clear TXPDMAEN bit and RXPDMAEN bit of SPI_PDMACTL register to disable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define SPI_DISABLE_TX_RX_PDMA(spi) ( (spi)->PDMACTL &= ~(SPI_PDMACTL_TXPDMAEN_Msk | SPI_PDMACTL_RXPDMAEN_Msk) )
+
 /**
   * @brief      Get the count of available data in RX FIFO.
   * @param[in]  spi The pointer of the specified SPI module.

bsp/nuvoton/libraries/m480/StdDriver/inc/nu_usci_spi.h

@@ -361,6 +361,15 @@ extern "C"
   */
 #define USPI_TRIGGER_TX_PDMA(uspi)   ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
 
+/**
+  * @brief      Trigger TX and RX PDMA function.
+  * @param[in]  uspi The pointer of the specified USCI_SPI module.
+  * @return     None.
+  * @details    Set TXPDMAEN bit and RXPDMAEN bit of USPI_PDMACTL register to enable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define USPI_TRIGGER_TX_RX_PDMA(uspi)   ((uspi)->PDMACTL |= USPI_PDMACTL_TXPDMAEN_Msk|USPI_PDMACTL_RXPDMAEN_Msk|USPI_PDMACTL_PDMAEN_Msk)
+
 /**
   * @brief      Disable RX PDMA transfer.
   * @param[in]  uspi The pointer of the specified USCI_SPI module.
@@ -379,6 +388,15 @@ extern "C"
   */
 #define USPI_DISABLE_TX_PDMA(uspi) ( (uspi)->PDMACTL &= ~USPI_PDMACTL_TXPDMAEN_Msk )
 
+/**
+  * @brief      Disable TX and RX PDMA transfer.
+  * @param[in]  uspi The pointer of the specified USCI_SPI module.
+  * @return     None.
+  * @details    Clear TXPDMAEN bit and RXPDMAEN bit of USPI_PDMACTL register to disable TX and RX PDMA transfer function.
+  * \hideinitializer
+  */
+#define USPI_DISABLE_TX_RX_PDMA(uspi) ( (uspi)->PDMACTL &= ~(USPI_PDMACTL_TXPDMAEN_Msk | USPI_PDMACTL_RXPDMAEN_Msk))
+
 uint32_t USPI_Open(USPI_T *uspi, uint32_t u32MasterSlave, uint32_t u32SPIMode,  uint32_t u32DataWidth, uint32_t u32BusClock);
 void USPI_Close(USPI_T *uspi);
 void USPI_ClearRxBuf(USPI_T *uspi);

bsp/nuvoton/libraries/m480/rtt_port/Kconfig

@@ -57,7 +57,7 @@ config SOC_SERIES_M480
         select RT_USING_NETDEV
 
         config NU_EMAC_PDMA_MEMCOPY
-            bool "Use PDMA for data tranferring"
+            bool "Use PDMA for data transferring"
             select BSP_USING_PDMA
             depends on BSP_USING_EMAC
             default y
@@ -82,14 +82,15 @@ config SOC_SERIES_M480
 
     menuconfig BSP_USING_EADC
         bool "Enable Enhanced Analog-to-Digital Converter(EADC)"
+        select RT_USING_ADC
 
-        config BSP_USING_EADC0
-            bool "Enable EADC0"
-            depends on BSP_USING_EADC && RT_USING_ADC
+        if BSP_USING_EADC
+            config BSP_USING_EADC0
+                bool "Enable EADC0"
 
-        config BSP_USING_EADC1
-            bool "Enable EADC1"
-            depends on BSP_USING_EADC && RT_USING_ADC
+            config BSP_USING_EADC1
+                bool "Enable EADC1"
+        endif
 
     menuconfig BSP_USING_TMR
         bool "Enable Timer Controller(TIMER)"
@@ -371,12 +372,14 @@ config SOC_SERIES_M480
 
                 config BSP_USING_UI2C0
                     select RT_USING_I2C
+                    select BSP_USING_UI2C
                     bool "UI2C0"
                     help
                         Choose this option if you need I2C function mode.
 
                 config BSP_USING_USPI0
                     select RT_USING_SPI
+                    select BSP_USING_USPI
                     bool "USPI0"
                     help
                         Choose this option if you need SPI function mode.
@@ -391,7 +394,7 @@ config SOC_SERIES_M480
                 depends on BSP_USING_UUART0 && RT_SERIAL_USING_DMA
 
             config BSP_USING_USPI0_PDMA
-                bool "Use PDMA for data tranferring"
+                bool "Use PDMA for data transferring"
                 select BSP_USING_USPI_PDMA
                 depends on BSP_USING_USPI0
         endif
@@ -405,21 +408,21 @@ config SOC_SERIES_M480
 
                     config BSP_USING_UUART1
                         select RT_USING_SERIAL
-                         select BSP_USING_UUART
+                        select BSP_USING_UUART
                         bool "UUART1"
                         help
                           Choose this option if you need UART function mode.
 
                     config BSP_USING_UI2C1
                         select RT_USING_I2C
-                           select BSP_USING_UI2C
+                        select BSP_USING_UI2C
                         bool "UI2C1"
                         help
                           Choose this option if you need I2C function mode.
 
                      config BSP_USING_USPI1
                         select RT_USING_SPI
-                           select BSP_USING_USPI
+                        select BSP_USING_USPI
                         bool "USPI1"
                         help
                           Choose this option if you need SPI function mode.
@@ -434,7 +437,7 @@ config SOC_SERIES_M480
                     depends on BSP_USING_UUART1 && RT_SERIAL_USING_DMA
 
                 config BSP_USING_USPI1_PDMA
-                    bool "Use PDMA for data tranferring"
+                    bool "Use PDMA for data transferring"
                     select BSP_USING_USPI_PDMA
                     depends on BSP_USING_USPI1
             endif
@@ -459,6 +462,10 @@ config SOC_SERIES_M480
             config NU_SDH_HOTPLUG
                 bool "Using HOTPLUG"
                 default y
+
+            config NU_SDH_MOUNT_ON_ROOT
+                bool "Mount on root"
+
         endif
 
     menuconfig BSP_USING_CAN
@@ -652,7 +659,7 @@ config SOC_SERIES_M480
                        select BSP_USING_SPI_PDMA
                        depends on BSP_USING_SPI1
               endif
- 
+
             choice
                 prompt "Select SPI2 function mode"
                 config BSP_USING_SPI2_NONE
@@ -686,7 +693,7 @@ config SOC_SERIES_M480
                 bool "NONE"
                 help
                     Choose this option if you need not SPI3.
-                
+
                 config BSP_USING_SPI3
                 bool "Enable SPI3"
                 help
@@ -724,20 +731,23 @@ config SOC_SERIES_M480
         bool "Enable Quad Serial Peripheral Interface(QSPI)"
         select RT_USING_SPI
         select RT_USING_QSPI
+        select BSP_USING_SPI
 
-           if BSP_USING_QSPI
+        if BSP_USING_QSPI
            config BSP_USING_QSPI0
                bool "Enable QSPI0"
 
            config BSP_USING_QSPI0_PDMA
                 bool "Enable PDMA for QSPI0"
+                select BSP_USING_SPI_PDMA
                 depends on BSP_USING_QSPI0
 
            config BSP_USING_QSPI1
                 bool "Enable QSPI1"
 
            config BSP_USING_QSPI1_PDMA
-                   bool "Enable PDMA for QSPI1"
+                bool "Enable PDMA for QSPI1"
+                select BSP_USING_SPI_PDMA
                 depends on BSP_USING_QSPI1
         endif
 
@@ -857,7 +867,7 @@ config SOC_SERIES_M480
 
             if BSP_USING_CRC
                 config NU_CRC_USE_PDMA
-                bool "Use PDMA for data tranferring."
+                bool "Use PDMA for data transferring."
                 select BSP_USING_PDMA
                 default y
             endif

bsp/nuvoton/libraries/m480/rtt_port/drv_can.c

@@ -97,7 +97,7 @@ static struct nu_can nu_can_arr[] =
     },
 #endif
     {0}
-}; /* usart nu_usart */
+}; /* struct nu_can */
 
 /* Public functions ------------------------------------------------------------*/
 
@@ -112,7 +112,7 @@ static const struct rt_can_ops nu_can_ops =
 
 static const struct can_configure nu_can_default_config = NU_CAN_CONFIG_DEFAULT;
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function  ----------------------------------------------------*/
 #if defined(BSP_USING_CAN0)
 /* CAN0 interrupt entry */
 void CAN0_IRQHandler(void)
@@ -238,7 +238,7 @@ static rt_err_t nu_can_configure(struct rt_can_device *can, struct can_configure
     RT_ASSERT(can != RT_NULL);
     RT_ASSERT(cfg != RT_NULL);
 
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -312,7 +312,7 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
 #ifdef RT_CAN_USING_HDR
     struct rt_can_filter_config *filter_cfg;
 #endif
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -346,7 +346,6 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
         {
             /* Enable Status Change Interrupt  */
             CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk);
-            NVIC_SetPriority(((nu_can_t)can)->can_irq_n, (1 << __NVIC_PRIO_BITS) - 2);
             /* Enable NVIC interrupt. */
             NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
 
@@ -355,7 +354,6 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
         {
             /* Enable Error Status and Status Change Interrupt  */
             CAN_EnableInt(can_base, CAN_CON_IE_Msk | CAN_CON_SIE_Msk | CAN_CON_EIE_Msk);
-            NVIC_SetPriority(((nu_can_t)can)->can_irq_n, (1 << __NVIC_PRIO_BITS) - 2);
             /* Enable NVIC interrupt. */
             NVIC_EnableIRQ(((nu_can_t)can)->can_irq_n);
         }
@@ -440,6 +438,9 @@ static rt_err_t nu_can_control(struct rt_can_device *can, int cmd, void *arg)
         rt_memcpy(arg, &can->status, sizeof(can->status));
     }
     break;
+    default:
+       return -(RT_EINVAL);
+
     }
 
     return RT_EOK;
@@ -449,7 +450,7 @@ static int nu_can_sendmsg(struct rt_can_device *can, const void *buf, rt_uint32_
 {
     STR_CANMSG_T tMsg;
     struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -495,7 +496,7 @@ static int nu_can_recvmsg(struct rt_can_device *can, void *buf, rt_uint32_t boxn
 {
     STR_CANMSG_T tMsg;
     struct rt_can_msg *pmsg = (struct rt_can_msg *) buf;
-    /* Get base address of uart register */
+    /* Get base address of CAN register */
     CAN_T *can_base = ((nu_can_t)can)->can_base;
 
     RT_ASSERT(can_base != RT_NULL);
@@ -558,7 +559,7 @@ static int rt_hw_can_init(void)
         RT_ASSERT(ret == RT_EOK);
     }
 
-    return ret;
+    return (int)ret;
 }
 INIT_DEVICE_EXPORT(rt_hw_can_init);
 #endif  //#if defined(BSP_USING_CAN)

bsp/nuvoton/libraries/m480/rtt_port/drv_clk.c

@@ -165,8 +165,8 @@ static void pm_run(struct rt_pm *pm, rt_uint8_t mode)
 
     SYS_UnlockReg();
 
-    /* Switch run mdoe frequency using PLL + HXT if HXT is enabled.
-       Otherwise, the systme clock will use PLL + HIRC. */
+    /* Switch run mode frequency using PLL + HXT if HXT is enabled.
+       Otherwise, the system clock will use PLL + HIRC. */
     switch (mode)
     {
     case PM_RUN_MODE_HIGH_SPEED:
@@ -209,7 +209,7 @@ static void hw_timer_init(void)
     CLK_EnableModuleClock(PM_TIMER_MODULE);
     SYS_LockReg();
 
-    /* Initialise timer and enable wakeup function. */
+    /* Initialize timer and enable wakeup function. */
     TIMER_Open(PM_TIMER, TIMER_CONTINUOUS_MODE, 1);
     TIMER_SET_PRESCALE_VALUE(PM_TIMER, 0);
     TIMER_EnableInt(PM_TIMER);
@@ -262,7 +262,7 @@ static void pm_timer_start(struct rt_pm *pm, rt_uint32_t timeout)
     if (timeout == RT_TICK_MAX)
         return;
 
-    /* start pm timer to compenstate the os tick in power down mode */
+    /* start pm timer to compensate the os tick in power down mode */
     tick = pm_tick_from_os_tick(timeout);
     TIMER_SET_CMP_VALUE(PM_TIMER, tick);
     TIMER_Start(PM_TIMER);
@@ -277,7 +277,7 @@ static void pm_timer_stop(struct rt_pm *pm)
 }
 
 
-/* pm device driver initialise. */
+/* pm device driver initialize. */
 int rt_hw_pm_init(void)
 {
     rt_uint8_t timer_mask;

bsp/nuvoton/libraries/m480/rtt_port/drv_fmc.c

@@ -21,9 +21,9 @@
 #endif
 
 /* Private define ---------------------------------------------------------------*/
-#define NU_GETBYTE_OFST(addr)         ((addr&0x3)*8)
-#define NU_GET_WALIGN(addr)           (addr&~0x3)
-#define NU_GET_LSB2BIT(addr)          (addr&0x3)
+#define NU_GETBYTE_OFST(addr)         (((addr)&0x3)*8)
+#define NU_GET_WALIGN(addr)           ((addr)&~0x3)
+#define NU_GET_LSB2BIT(addr)          ((addr)&0x3)
 /* Private typedef --------------------------------------------------------------*/
 
 /* Private functions ------------------------------------------------------------*/
@@ -159,7 +159,8 @@ int nu_fmc_erase(long addr, size_t size)
     uint32_t addr_end = addr + size;
 
 #if defined(NU_SUPPORT_NONALIGN)
-    uint8_t *page_sdtemp = RT_NULL, *page_edtemp = RT_NULL;
+    uint8_t *page_sdtemp = RT_NULL; 
+    uint8_t *page_edtemp = RT_NULL;
 
 
     addrptr = addr & (FMC_FLASH_PAGE_SIZE - 1);
@@ -315,7 +316,7 @@ static int nu_fmc_init(void)
 
     g_mutex_fmc = rt_mutex_create("nu_fmc_lock", RT_IPC_FLAG_FIFO);
 
-    return RT_EOK;
+    return (int)RT_EOK;
 }
 INIT_APP_EXPORT(nu_fmc_init);
 

bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.c

@@ -166,7 +166,7 @@ static rt_err_t nu_gpio_attach_irq(struct rt_device *device, rt_int32_t pin, rt_
     if ((irqindex = nu_find_irqindex(pin)) >= 0)
         goto exit_nu_gpio_attach_irq;
 
-    // Find avaiable index of pin in pool.
+    // Find available index of pin in pool.
     if ((irqindex = nu_cto(g_u32PinIrqMask)) < IRQ_MAX_NUM)  // Count Trailing Ones ==> Find First Zero
         goto exit_nu_gpio_attach_irq;
 

bsp/nuvoton/libraries/m480/rtt_port/drv_gpio.h

@@ -26,7 +26,7 @@ typedef enum
     NU_PORT_CNT,
 } nu_gpio_port;
 
-#define NU_GET_PININDEX(port, pin)        (port*16+pin)
+#define NU_GET_PININDEX(port, pin)        ((port)*16+(pin))
 #define NU_GET_PINS(rt_pin_index)         ((rt_pin_index) & 0x0000000F)
 #define NU_GET_PORT(rt_pin_index)         (((rt_pin_index)>>4) & 0x0000000F)
 #define NU_GET_PIN_MASK(nu_gpio_pin)      (1 << (nu_gpio_pin))

bsp/nuvoton/libraries/m480/rtt_port/drv_i2s.c

@@ -306,6 +306,10 @@ static rt_err_t nu_i2s_getcaps(struct rt_audio_device *audio, struct rt_audio_ca
         } // switch (caps->sub_type)
         break;
 
+    default:
+        result = -RT_ERROR;
+        break;
+
     } // switch (caps->main_type)
 
     return result;
@@ -449,6 +453,9 @@ static rt_err_t nu_i2s_start(struct rt_audio_device *audio, int stream)
         LOG_I("Start record.");
     }
     break;
+
+    default:
+        return -RT_ERROR;
     }
 
     return RT_EOK;

bsp/nuvoton/libraries/m480/rtt_port/drv_qspi.c

@@ -12,6 +12,14 @@
 #include <rtconfig.h>
 
 #if defined(BSP_USING_QSPI)
+
+#define LOG_TAG                 "drv.qspi"
+#define DBG_ENABLE
+#define DBG_SECTION_NAME        LOG_TAG
+#define DBG_LEVEL               DBG_INFO
+#define DBG_COLOR
+#include <rtdbg.h>
+
 #include <rthw.h>
 #include <rtdef.h>
 
@@ -87,8 +95,8 @@ static rt_err_t nu_qspi_bus_configure(struct rt_spi_device *device,
                                       struct rt_spi_configuration *configuration)
 {
     struct nu_spi *spi_bus;
-    uint32_t u32SPIMode;
-    uint32_t u32BusClock;
+    rt_uint32_t u32SPIMode;
+    rt_uint32_t u32BusClock;
     rt_err_t ret = RT_EOK;
 
     RT_ASSERT(device != RT_NULL);
@@ -130,7 +138,7 @@ static rt_err_t nu_qspi_bus_configure(struct rt_spi_device *device,
     u32BusClock = QSPI_SetBusClock((QSPI_T *)spi_bus->spi_base, configuration->max_hz);
     if (configuration->max_hz > u32BusClock)
     {
-        rt_kprintf("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
+        LOG_W("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
         configuration->max_hz = u32BusClock;
     }
 
@@ -173,7 +181,7 @@ exit_nu_qspi_bus_configure:
 }
 
 #if defined(RT_SFUD_USING_QSPI)
-static int nu_qspi_mode_config(struct nu_spi *qspi_bus, uint8_t *tx, uint8_t *rx, int qspi_lines)
+static int nu_qspi_mode_config(struct nu_spi *qspi_bus, rt_uint8_t *tx, rt_uint8_t *rx, int qspi_lines)
 {
     QSPI_T *qspi_base = (QSPI_T *)qspi_bus->spi_base;
     if (qspi_lines > 1)
@@ -188,6 +196,9 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, uint8_t *tx, uint8_t *rx
             case 4:
                 QSPI_ENABLE_QUAD_OUTPUT_MODE(qspi_base);
                 break;
+            default:
+                LOG_E("Data line is not supported.\n");
+                break;
             }
         }
         else
@@ -200,6 +211,9 @@ static int nu_qspi_mode_config(struct nu_spi *qspi_bus, uint8_t *tx, uint8_t *rx
             case 4:
                 QSPI_ENABLE_QUAD_INPUT_MODE(qspi_base);
                 break;
+            default:
+                LOG_E("Data line is not supported.\n");
+                break;
             }
         }
     }
@@ -218,11 +232,11 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     struct rt_qspi_configuration *qspi_configuration;
 #if defined(RT_SFUD_USING_QSPI)
     struct rt_qspi_message *qspi_message;
-    int last = 1;
+    rt_uint8_t u8last = 1;
 #endif
-    uint8_t bytes_per_word;
+    rt_uint8_t bytes_per_word;
     QSPI_T *qspi_base;
-    int len = 0;
+    rt_uint32_t u32len = 0;
 
     RT_ASSERT(device != RT_NULL);
     RT_ASSERT(message != RT_NULL);
@@ -252,9 +266,9 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     /* Command stage */
     if (qspi_message->instruction.content != 0)
     {
-        last = nu_qspi_mode_config(qspi_bus, (uint8_t *) &qspi_message->instruction.content, RT_NULL, qspi_message->instruction.qspi_lines);
+        u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) &qspi_message->instruction.content, RT_NULL, qspi_message->instruction.qspi_lines);
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) &qspi_message->instruction.content,
+                        (rt_uint8_t *) &qspi_message->instruction.content,
                         RT_NULL,
                         1,
                         1);
@@ -263,29 +277,29 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     /* Address stage */
     if (qspi_message->address.size != 0)
     {
-        uint32_t u32ReversedAddr = 0;
-        uint32_t u32AddrNumOfByte = qspi_message->address.size / 8;
+        rt_uint32_t u32ReversedAddr = 0;
+        rt_uint32_t u32AddrNumOfByte = qspi_message->address.size / 8;
         switch (u32AddrNumOfByte)
         {
         case 1:
             u32ReversedAddr = (qspi_message->address.content & 0xff);
             break;
         case 2:
-            nu_set16_be((uint8_t *)&u32ReversedAddr, qspi_message->address.content);
+            nu_set16_be((rt_uint8_t *)&u32ReversedAddr, qspi_message->address.content);
             break;
         case 3:
-            nu_set24_be((uint8_t *)&u32ReversedAddr, qspi_message->address.content);
+            nu_set24_be((rt_uint8_t *)&u32ReversedAddr, qspi_message->address.content);
             break;
         case 4:
-            nu_set32_be((uint8_t *)&u32ReversedAddr, qspi_message->address.content);
+            nu_set32_be((rt_uint8_t *)&u32ReversedAddr, qspi_message->address.content);
             break;
         default:
             RT_ASSERT(0);
             break;
         }
-        last = nu_qspi_mode_config(qspi_bus, (uint8_t *)&u32ReversedAddr, RT_NULL, qspi_message->address.qspi_lines);
+        u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *)&u32ReversedAddr, RT_NULL, qspi_message->address.qspi_lines);
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) &u32ReversedAddr,
+                        (rt_uint8_t *) &u32ReversedAddr,
                         RT_NULL,
                         u32AddrNumOfByte,
                         1);
@@ -294,32 +308,32 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
     /* Dummy_cycles stage */
     if (qspi_message->dummy_cycles != 0)
     {
-        qspi_bus->dummy = 0xff;
+        qspi_bus->dummy = 0x00;
 
-        last = nu_qspi_mode_config(qspi_bus, (uint8_t *) &qspi_bus->dummy, RT_NULL, last);
+        u8last = nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) &qspi_bus->dummy, RT_NULL, u8last);
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) &qspi_bus->dummy,
+                        (rt_uint8_t *) &qspi_bus->dummy,
                         RT_NULL,
-                        qspi_message->dummy_cycles / (8 / last),
+                        qspi_message->dummy_cycles / (8 / u8last),
                         1);
     }
 
     /* Data stage */
-    nu_qspi_mode_config(qspi_bus, (uint8_t *) message->send_buf, (uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
+    nu_qspi_mode_config(qspi_bus, (rt_uint8_t *) message->send_buf, (rt_uint8_t *) message->recv_buf, qspi_message->qspi_data_lines);
 #endif //#if defined(RT_SFUD_USING_QSPI)
 
     if (message->length != 0)
     {
         nu_spi_transfer((struct nu_spi *)qspi_bus,
-                        (uint8_t *) message->send_buf,
-                        (uint8_t *) message->recv_buf,
+                        (rt_uint8_t *) message->send_buf,
+                        (rt_uint8_t *) message->recv_buf,
                         message->length,
                         bytes_per_word);
-        len = message->length;
+        u32len = message->length;
     }
     else
     {
-        len = 1;
+        u32len = 1;
     }
 
     if (message->cs_release && !(qspi_configuration->parent.mode & RT_SPI_NO_CS))
@@ -334,12 +348,12 @@ static rt_uint32_t nu_qspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_
         }
     }
 
-    return len;
+    return u32len;
 }
 
-static int nu_qspi_register_bus(struct nu_spi *qspi_device, const char *name)
+static int nu_qspi_register_bus(struct nu_spi *qspi_bus, const char *name)
 {
-    return rt_qspi_bus_register(&qspi_device->dev, name, &nu_qspi_poll_ops);
+    return rt_qspi_bus_register(&qspi_bus->dev, name, &nu_qspi_poll_ops);
 }
 
 /**
@@ -347,19 +361,21 @@ static int nu_qspi_register_bus(struct nu_spi *qspi_device, const char *name)
  */
 static int rt_hw_qspi_init(void)
 {
-    int i;
+    rt_uint8_t i;
 
     for (i = (QSPI_START + 1); i < QSPI_CNT; i++)
     {
         nu_qspi_register_bus(&nu_qspi_arr[i], nu_qspi_arr[i].name);
-#if defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
         nu_qspi_arr[i].pdma_chanid_tx = -1;
         nu_qspi_arr[i].pdma_chanid_rx = -1;
+#endif
+#if defined(BSP_USING_QSPI_PDMA)
         if ((nu_qspi_arr[i].pdma_perp_tx != NU_PDMA_UNUSED) && (nu_qspi_arr[i].pdma_perp_rx != NU_PDMA_UNUSED))
         {
             if (nu_hw_spi_pdma_allocate(&nu_qspi_arr[i]) != RT_EOK)
             {
-                rt_kprintf("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_qspi_arr[i].name);
+                LOG_E("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_qspi_arr[i].name);
             }
         }
 #endif
@@ -381,7 +397,7 @@ rt_err_t nu_qspi_bus_attach_device(const char *bus_name, const char *device_name
     qspi_device = (struct rt_qspi_device *)rt_malloc(sizeof(struct rt_qspi_device));
     if (qspi_device == RT_NULL)
     {
-        rt_kprintf("no memory, qspi bus attach device failed!\n");
+        LOG_E("no memory, qspi bus attach device failed!\n");
         result = -RT_ENOMEM;
         goto __exit;
     }

bsp/nuvoton/libraries/m480/rtt_port/drv_scuart.c

@@ -1,25 +1,26 @@
 /**************************************************************************//**
-*
-* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
-*
-* SPDX-License-Identifier: Apache-2.0
-*
-* Change Logs:
-* Date            Author       Notes
-* 2020-5-31       Egbert       First version
-*
-******************************************************************************/
+ *
+ * @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date            Author       Notes
+ * 2020-7-21       Egbert       First version
+ *
+ ******************************************************************************/
 
 #include <rtconfig.h>
 
 #if defined(BSP_USING_SCUART)
 
+#include <NuMicro.h>
 #include <rtdevice.h>
 #include <rthw.h>
-#include <NuMicro.h>
 
-/* Private define ---------------------------------------------------------------*/
-#define LOG_TAG         "drv.scuart"
+/* Private definition
+ * ---------------------------------------------------------------*/
+#define LOG_TAG "drv.scuart"
 #define DBG_ENABLE
 #define DBG_SECTION_NAME "drv.scuart"
 #define DBG_LEVEL DBG_ERROR
@@ -41,7 +42,8 @@ enum
     SCUART_CNT
 };
 
-/* Private typedef --------------------------------------------------------------*/
+/* Private typedef
+ * --------------------------------------------------------------*/
 struct nu_scuart
 {
     rt_serial_t dev;
@@ -49,34 +51,32 @@ struct nu_scuart
     SC_T *scuart_base;
     uint32_t scuart_rst;
     IRQn_Type scuart_irq_n;
-
 };
 typedef struct nu_scuart *nu_scuart_t;
 
-/* Private functions ------------------------------------------------------------*/
-static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
-static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void *arg);
+/* Private functions
+ * ------------------------------------------------------------*/
+static rt_err_t nu_scuart_configure(struct rt_serial_device *serial,
+                                    struct serial_configure *cfg);
+static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd,
+                                  void *arg);
 static int nu_scuart_send(struct rt_serial_device *serial, char c);
 static int nu_scuart_receive(struct rt_serial_device *serial);
 static void nu_scuart_isr(nu_scuart_t serial);
 
-/* Public functions ------------------------------------------------------------*/
-
-/* Private variables ------------------------------------------------------------*/
-
 static const struct rt_uart_ops nu_scuart_ops =
 {
-    .configure      = nu_scuart_configure,
-    .control        = nu_scuart_control,
-    .putc           = nu_scuart_send,
-    .getc           = nu_scuart_receive,
-    .dma_transmit   = RT_NULL /* not support DMA mode */
+    .configure = nu_scuart_configure,
+    .control = nu_scuart_control,
+    .putc = nu_scuart_send,
+    .getc = nu_scuart_receive,
+    .dma_transmit = RT_NULL /* not support DMA mode */
 };
 
 static const struct serial_configure nu_scuart_default_config =
         RT_SERIAL_CONFIG_DEFAULT;
 
-static struct nu_scuart nu_scuart_arr [] =
+static struct nu_scuart nu_scuart_arr[] =
 {
 #if defined(BSP_USING_SCUART0)
     {
@@ -108,7 +108,8 @@ static struct nu_scuart nu_scuart_arr [] =
     {0}
 }; /* scuart nu_scuart */
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function
+ * ----------------------------------------------------*/
 #if defined(BSP_USING_SCUART0)
 /* SCUART0 interrupt entry */
 void SC0_IRQHandler(void)
@@ -151,8 +152,6 @@ void SC2_IRQHandler(void)
 }
 #endif
 
-
-
 /**
  * All SCUART interrupt service routine
  */
@@ -177,9 +176,10 @@ static void nu_scuart_isr(nu_scuart_t serial)
 }
 
 /**
- * Configurae scuart port
+ * Configure scuart port
  */
-static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+static rt_err_t nu_scuart_configure(struct rt_serial_device *serial,
+                                    struct serial_configure *cfg)
 {
     rt_err_t ret = RT_EOK;
     uint32_t scuart_word_len = 0;
@@ -189,7 +189,7 @@ static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct seri
     /* Get base address of scuart register */
     SC_T *scuart_base = ((nu_scuart_t)serial)->scuart_base;
 
-    /* Check baudrate */
+    /* Check baud rate */
     RT_ASSERT(cfg->baud_rate != 0);
 
     /* Check word len */
@@ -258,11 +258,12 @@ static rt_err_t nu_scuart_configure(struct rt_serial_device *serial, struct seri
     /* Reset this module */
     SYS_ResetModule(((nu_scuart_t)serial)->scuart_rst);
 
-    /* Open SCUART and set SCUART Baudrate */
+    /* Open SCUART and set SCUART baud rate */
     SCUART_Open(scuart_base, cfg->baud_rate);
 
     /* Set line configuration. */
-    SCUART_SetLineConfig(scuart_base, 0, scuart_word_len, scuart_parity, scuart_stop_bit);
+    SCUART_SetLineConfig(scuart_base, 0, scuart_word_len, scuart_parity,
+                         scuart_stop_bit);
 
     /* Enable NVIC interrupt. */
     NVIC_EnableIRQ(((nu_scuart_t)serial)->scuart_irq_n);
@@ -278,14 +279,14 @@ exit_nu_scuart_configure:
 /**
  * SCUART interrupt control
  */
-static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void *arg)
+static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd,
+                                  void *arg)
 {
     rt_err_t result = RT_EOK;
     rt_uint32_t flag;
     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
 
     RT_ASSERT(serial != RT_NULL);
-    RT_ASSERT(arg != RT_NULL);
 
     /* Get base address of scuart register */
     SC_T *scuart_base = ((nu_scuart_t)serial)->scuart_base;
@@ -298,10 +299,6 @@ static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void
             flag = SC_INTEN_RDAIEN_Msk | SC_INTEN_RXTOIEN_Msk;
             SCUART_DISABLE_INT(scuart_base, flag);
         }
-        else if (ctrl_arg == RT_DEVICE_FLAG_DMA_RX) /* Disable DMA-RX */
-        {
-            LOG_E("SCUART does not support dma transmission");
-        }
         break;
 
     case RT_DEVICE_CTRL_SET_INT:
@@ -312,6 +309,21 @@ static rt_err_t nu_scuart_control(struct rt_serial_device *serial, int cmd, void
         }
         break;
 
+    case RT_DEVICE_CTRL_CLOSE:
+        /* Disable NVIC interrupt. */
+        NVIC_DisableIRQ(((nu_scuart_t)serial)->scuart_irq_n);
+
+        /* Reset this module */
+        SYS_ResetModule(((nu_scuart_t)serial)->scuart_rst);
+
+        /* Close SCUART port */
+        SCUART_Close(scuart_base);
+
+        break;
+
+    default:
+        result = -RT_EINVAL;
+        break;
     }
     return result;
 }
@@ -327,7 +339,8 @@ static int nu_scuart_send(struct rt_serial_device *serial, char c)
     SC_T *scuart_base = ((nu_scuart_t)serial)->scuart_base;
 
     /* Waiting if TX-FIFO is full. */
-    while (SCUART_IS_TX_FULL(scuart_base));
+    while (SCUART_IS_TX_FULL(scuart_base))
+        ;
 
     /* Put char into TX-FIFO */
     SCUART_WRITE(scuart_base, c);
@@ -368,10 +381,11 @@ static int rt_hw_scuart_init(void)
     {
         flag = RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX;
 
-        nu_scuart_arr[i].dev.ops    = &nu_scuart_ops;
+        nu_scuart_arr[i].dev.ops = &nu_scuart_ops;
         nu_scuart_arr[i].dev.config = nu_scuart_default_config;
 
-        ret = rt_hw_serial_register(&nu_scuart_arr[i].dev, nu_scuart_arr[i].name, flag, NULL);
+        ret = rt_hw_serial_register(&nu_scuart_arr[i].dev, nu_scuart_arr[i].name,
+                                    flag, NULL);
         RT_ASSERT(ret == RT_EOK);
     }
 

bsp/nuvoton/libraries/m480/rtt_port/drv_sdh.c

@@ -25,17 +25,30 @@
 #endif
 
 /* Private define ---------------------------------------------------------------*/
-// RT_DEV_NAME_PREFIX sdh
 
-#ifndef NU_SDH_MOUNTPOINT_ROOT
-    #define NU_SDH_MOUNTPOINT_ROOT  "/mnt"
+#if defined(NU_SDH_MOUNT_ON_ROOT)
+
+    #if !defined(NU_SDH_MOUNTPOINT_SDH0)
+        #define NU_SDH_MOUNTPOINT_SDH0  "/"
+    #endif
+
+    #if !defined(NU_SDH_MOUNTPOINT_SDH1)
+        #define NU_SDH_MOUNTPOINT_SDH1  NU_SDH_MOUNTPOINT_SDH0"/sd1"
+    #endif
+
+#else
+
+    #if !defined(NU_SDH_MOUNTPOINT_ROOT)
+        #define NU_SDH_MOUNTPOINT_ROOT  "/mnt"
+    #endif
+
 #endif
 
-#ifndef NU_SDH_MOUNTPOINT_SDH0
+#if !defined(NU_SDH_MOUNTPOINT_SDH0)
     #define NU_SDH_MOUNTPOINT_SDH0  NU_SDH_MOUNTPOINT_ROOT"/sd0"
 #endif
 
-#ifndef NU_SDH_MOUNTPOINT_SDH1
+#if !defined(NU_SDH_MOUNTPOINT_SDH1)
     #define NU_SDH_MOUNTPOINT_SDH1  NU_SDH_MOUNTPOINT_ROOT"/sd1"
 #endif
 
@@ -66,11 +79,9 @@ enum
 #if defined(NU_SDH_HOTPLUG)
 enum
 {
-    NU_SDH_CARD_INSERTED_SD0 = (1 << 0),
-    NU_SDH_CARD_REMOVED_SD0 = (1 << 1),
-    NU_SDH_CARD_INSERTED_SD1 = (1 << 2),
-    NU_SDH_CARD_REMOVED_SD1 = (1 << 3),
-    NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_INSERTED_SD0 | NU_SDH_CARD_REMOVED_SD0 | NU_SDH_CARD_INSERTED_SD1 | NU_SDH_CARD_REMOVED_SD1)
+    NU_SDH_CARD_DETECTED_SD0 = (1 << 0),
+    NU_SDH_CARD_DETECTED_SD1 = (1 << 1),
+    NU_SDH_CARD_EVENT_ALL = (NU_SDH_CARD_DETECTED_SD0 | NU_SDH_CARD_DETECTED_SD1)
 };
 #endif
 
@@ -166,40 +177,12 @@ static void nu_sdh_isr(nu_sdh_t sdh)
 
     if (isr & SDH_INTSTS_CDIF_Msk)   // card detect
     {
-        /* SD interrupt status */
-        // it is work to delay 50 times for SD_CLK = 200KHz
-        {
-            int volatile i;         // delay 30 fail, 50 OK
-            for (i = 0; i < 0x500; i++); // delay to make sure got updated value from REG_SDISR.
-            isr = sdh_base->INTSTS;
-        }
-
-        if (isr & SDH_INTSTS_CDSTS_Msk)
-        {
-            /* Card removed */
-#if defined(NU_SDH_HOTPLUG)
-            if (sdh->base == SDH0)
-                rt_event_send(&sdh_event, NU_SDH_CARD_REMOVED_SD0);
-            else if (sdh->base == SDH1)
-                rt_event_send(&sdh_event, NU_SDH_CARD_REMOVED_SD1);
-#endif
-            sdh->info->IsCardInsert = FALSE;   // SDISR_CD_Card = 1 means card remove for GPIO mode
-            rt_memset((void *)sdh->info, 0, sizeof(SDH_INFO_T));
-        }
-        else
-        {
-            SDH_Open(sdh_base, CardDetect_From_GPIO);
-            if (!SDH_Probe(sdh_base))
-            {
-                /* Card inserted */
 #if defined(NU_SDH_HOTPLUG)
-                if (sdh->base == SDH0)
-                    rt_event_send(&sdh_event, NU_SDH_CARD_INSERTED_SD0);
-                else if (sdh->base == SDH1)
-                    rt_event_send(&sdh_event, NU_SDH_CARD_INSERTED_SD1);
+        if (sdh->base == SDH0)
+            rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD0);
+        else if (sdh->base == SDH1)
+            rt_event_send(&sdh_event, NU_SDH_CARD_DETECTED_SD1);
 #endif
-            }
-        }
         /* Clear CDIF interrupt flag */
         SDH_CLR_INT_FLAG(sdh_base, SDH_INTSTS_CDIF_Msk);
     }
@@ -210,14 +193,14 @@ static void nu_sdh_isr(nu_sdh_t sdh)
         if (!(isr & SDH_INTSTS_CRC16_Msk))
         {
             /* CRC_16 error */
-            // handle CRC 16 error
+            // TODO: handle CRC 16 error
         }
         else if (!(isr & SDH_INTSTS_CRC7_Msk))
         {
             if (!pSD->R3Flag)
             {
                 /* CRC_7 error */
-                // handle CRC 7 error
+                // TODO: handle CRC 7 error
             }
         }
         /* Clear CRCIF interrupt flag */
@@ -502,6 +485,7 @@ static rt_err_t nu_sdh_hotplug_mount(nu_sdh_t sdh)
     {
         closedir(t);
     }
+#if !defined(NU_SDH_MOUNT_ON_ROOT)
     else
     {
 
@@ -523,6 +507,7 @@ static rt_err_t nu_sdh_hotplug_mount(nu_sdh_t sdh)
         }
 
     } //else
+#endif
 
     if ((ret = dfs_mount(sdh->name, sdh->mounted_point, "elm", 0, 0)) == 0)
     {
@@ -567,6 +552,29 @@ exit_nu_sdh_hotplug_unmount:
 
     return -(ret);
 }
+
+static void nu_card_detector(nu_sdh_t sdh)
+{
+    SDH_T *sdh_base = sdh->base;
+    unsigned int volatile isr = sdh_base->INTSTS;
+    if (isr & SDH_INTSTS_CDSTS_Msk)
+    {
+        /* Card removed */
+        sdh->info->IsCardInsert = FALSE;   // SDISR_CD_Card = 1 means card remove for GPIO mode
+        rt_memset((void *)sdh->info, 0, sizeof(SDH_INFO_T));
+        nu_sdh_hotplug_unmount(sdh);
+    }
+    else
+    {
+        SDH_Open(sdh_base, CardDetect_From_GPIO);
+        if (!SDH_Probe(sdh_base))
+        {
+            /* Card inserted */
+            nu_sdh_hotplug_mount(sdh);
+        }
+    }
+}
+
 static void sdh_hotplugger(void *param)
 {
     rt_uint32_t e;
@@ -586,24 +594,18 @@ static void sdh_hotplugger(void *param)
                           RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
                           RT_WAITING_FOREVER, &e) == RT_EOK)
         {
-            /* Debouce */
+            /* Debounce */
             rt_thread_delay(200);
             switch (e)
             {
 #if defined(BSP_USING_SDH0)
-            case NU_SDH_CARD_INSERTED_SD0:
-                nu_sdh_hotplug_mount(&nu_sdh_arr[SDH0_IDX]);
-                break;
-            case NU_SDH_CARD_REMOVED_SD0:
-                nu_sdh_hotplug_unmount(&nu_sdh_arr[SDH0_IDX]);
+            case NU_SDH_CARD_DETECTED_SD0:
+                nu_card_detector(&nu_sdh_arr[SDH0_IDX]);
                 break;
 #endif
 #if defined(BSP_USING_SDH1)
-            case NU_SDH_CARD_INSERTED_SD1:
-                nu_sdh_hotplug_mount(&nu_sdh_arr[SDH1_IDX]);
-                break;
-            case NU_SDH_CARD_REMOVED_SD1:
-                nu_sdh_hotplug_unmount(&nu_sdh_arr[SDH1_IDX]);
+            case NU_SDH_CARD_DETECTED_SD1:
+                nu_card_detector(&nu_sdh_arr[SDH1_IDX]);
                 break;
 #endif
             default:

bsp/nuvoton/libraries/m480/rtt_port/drv_softi2c.c

@@ -24,7 +24,6 @@
 #define DBG_ENABLE
 #define DBG_SECTION_NAME LOG_TAG
 #define DBG_LEVEL        DBG_INFO
-#define DBG_COLOR
 #include <rtdbg.h>
 
 #ifdef BSP_USING_SOFT_I2C0
@@ -58,7 +57,7 @@ struct nu_soft_i2c_config
     rt_uint8_t sda;
     const char *bus_name;
 };
-/* soft i2c dirver class */
+/* soft i2c driver class */
 struct nu_soft_i2c
 {
     struct rt_i2c_bit_ops ops;

bsp/nuvoton/libraries/m480/rtt_port/drv_spi.c

@@ -11,7 +11,15 @@
 ******************************************************************************/
 #include <rtconfig.h>
 
-#if defined(BSP_USING_SPI) || defined(BSP_USING_QSPI)
+#if defined(BSP_USING_SPI)
+
+#define LOG_TAG                 "drv.spi"
+#define DBG_ENABLE
+#define DBG_SECTION_NAME        LOG_TAG
+#define DBG_LEVEL               DBG_INFO
+#define DBG_COLOR
+#include <rtdbg.h>
+
 #include <rthw.h>
 #include <rtdevice.h>
 #include <rtdef.h>
@@ -22,7 +30,7 @@
 /* Private define ---------------------------------------------------------------*/
 
 #ifndef NU_SPI_USE_PDMA_MIN_THRESHOLD
-    #define NU_SPI_USE_PDMA_MIN_THRESHOLD 128
+    #define NU_SPI_USE_PDMA_MIN_THRESHOLD (128)
 #endif
 
 enum
@@ -52,9 +60,8 @@ static int nu_spi_register_bus(struct nu_spi *spi_bus, const char *name);
 static rt_uint32_t nu_spi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message);
 static rt_err_t nu_spi_bus_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     static void nu_pdma_spi_rx_cb(void *pvUserData, uint32_t u32EventFilter);
-    static void nu_pdma_spi_tx_cb(void *pvUserData, uint32_t u32EventFilter);
     static rt_err_t nu_pdma_spi_rx_config(struct nu_spi *spi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word);
     static rt_err_t nu_pdma_spi_tx_config(struct nu_spi *spi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word);
     static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
@@ -63,10 +70,6 @@ static rt_err_t nu_spi_bus_configure(struct rt_spi_device *device, struct rt_spi
 void nu_spi_transfer(struct nu_spi *spi_bus, uint8_t *tx, uint8_t *rx, int length, uint8_t bytes_per_word);
 void nu_spi_drain_rxfifo(SPI_T *spi_base);
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
-    rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus);
-#endif
-
 /* Private variables ------------------------------------------------------------*/
 static struct rt_spi_ops nu_spi_poll_ops =
 {
@@ -193,7 +196,7 @@ static rt_err_t nu_spi_bus_configure(struct rt_spi_device *device,
     u32BusClock = SPI_SetBusClock(spi_bus->spi_base, configuration->max_hz);
     if (configuration->max_hz > u32BusClock)
     {
-        rt_kprintf("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
+        LOG_W("%s clock max frequency is %dHz (!= %dHz)\n", spi_bus->name, u32BusClock, configuration->max_hz);
         configuration->max_hz = u32BusClock;
     }
 
@@ -235,21 +238,14 @@ exit_nu_spi_bus_configure:
     return -(ret);
 }
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
 static void nu_pdma_spi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
 {
-    struct nu_spi *spi_bus;
-    spi_bus = (struct nu_spi *)pvUserData;
+    struct nu_spi *spi_bus = (struct nu_spi *)pvUserData;
 
     RT_ASSERT(spi_bus != RT_NULL);
 
-    /* Get base address of spi register */
-    SPI_T *spi_base = spi_bus->spi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        SPI_DISABLE_RX_PDMA(spi_base);  // Stop DMA TX transfer
-    }
+    rt_sem_release(spi_bus->m_psSemBus);
 }
 static rt_err_t nu_pdma_spi_rx_config(struct nu_spi *spi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
 {
@@ -299,24 +295,6 @@ exit_nu_pdma_spi_rx_config:
     return result;
 }
 
-static void nu_pdma_spi_tx_cb(void *pvUserData, uint32_t u32EventFilter)
-{
-    struct nu_spi *spi_bus;
-    spi_bus = (struct nu_spi *)pvUserData;
-
-    RT_ASSERT(spi_bus != RT_NULL);
-
-    /* Get base address of spi register */
-    SPI_T *spi_base = spi_bus->spi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        SPI_DISABLE_TX_PDMA(spi_base);  // Stop DMA TX transfer
-    }
-    rt_sem_release(spi_bus->m_psSemBus);
-
-}
-
 static rt_err_t nu_pdma_spi_tx_config(struct nu_spi *spi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word)
 {
     rt_err_t result = RT_EOK;
@@ -328,15 +306,6 @@ static rt_err_t nu_pdma_spi_tx_config(struct nu_spi *spi_bus, const uint8_t *pu8
 
     rt_uint8_t spi_pdma_tx_chid = spi_bus->pdma_chanid_tx;
 
-    result = nu_pdma_callback_register(spi_pdma_tx_chid,
-                                       nu_pdma_spi_tx_cb,
-                                       (void *)spi_bus,
-                                       NU_PDMA_EVENT_TRANSFER_DONE);
-    if (result != RT_EOK)
-    {
-        goto exit_nu_pdma_spi_tx_config;
-    }
-
     if (pu8Buf == RT_NULL)
     {
         spi_bus->dummy = 0;
@@ -382,14 +351,14 @@ static rt_size_t nu_spi_pdma_transmit(struct nu_spi *spi_bus, const uint8_t *sen
     result = nu_pdma_spi_tx_config(spi_bus, send_addr, length, bytes_per_word);
     RT_ASSERT(result == RT_EOK);
 
-    /* Trigger TX/RX at the same time. */
-    SPI_TRIGGER_TX_PDMA(spi_base);
-    SPI_TRIGGER_RX_PDMA(spi_base);
+    /* Trigger TX/RX PDMA transfer. */
+    SPI_TRIGGER_TX_RX_PDMA(spi_base);
 
-    /* Wait PDMA transfer done */
+    /* Wait RX-PDMA transfer done */
     rt_sem_take(spi_bus->m_psSemBus, RT_WAITING_FOREVER);
 
-    while (SPI_IS_BUSY(spi_base));
+    /* Stop TX/RX DMA transfer. */
+    SPI_DISABLE_TX_RX_PDMA(spi_base);
 
     return result;
 }
@@ -416,7 +385,7 @@ exit_nu_hw_spi_pdma_allocate:
 
     return -(RT_ERROR);
 }
-#endif /* #if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA) */
+#endif /* #if defined(BSP_USING_SPI_PDMA) */
 
 void nu_spi_drain_rxfifo(SPI_T *spi_base)
 {
@@ -432,11 +401,11 @@ void nu_spi_drain_rxfifo(SPI_T *spi_base)
 static int nu_spi_read(SPI_T *spi_base, uint8_t *recv_addr, uint8_t bytes_per_word)
 {
     int size = 0;
-    uint32_t val;
 
     // Read RX data
     if (!SPI_GET_RX_FIFO_EMPTY_FLAG(spi_base))
     {
+        uint32_t val;
         // Read data from SPI RX FIFO
         switch (bytes_per_word)
         {
@@ -455,6 +424,9 @@ static int nu_spi_read(SPI_T *spi_base, uint8_t *recv_addr, uint8_t bytes_per_wo
         case 1:
             *recv_addr = SPI_READ_RX(spi_base);
             break;
+        default:
+            LOG_E("Data length is not supported.\n");
+            break;
         }
         size = bytes_per_word;
     }
@@ -481,6 +453,9 @@ static int nu_spi_write(SPI_T *spi_base, const uint8_t *send_addr, uint8_t bytes
     case 1:
         SPI_WRITE_TX(spi_base, *((uint8_t *)send_addr));
         break;
+    default:
+        LOG_E("Data length is not supported.\n");
+        break;
     }
 
     return bytes_per_word;
@@ -534,7 +509,7 @@ static void nu_spi_transmission_with_poll(struct nu_spi *spi_bus,
         }
     } // else
 
-    /* Wait RX or drian RX-FIFO */
+    /* Wait RX or drain RX-FIFO */
     if (recv_addr)
     {
         // Wait SPI transmission done
@@ -565,8 +540,8 @@ void nu_spi_transfer(struct nu_spi *spi_bus, uint8_t *tx, uint8_t *rx, int lengt
 #if defined(BSP_USING_SPI_PDMA)
     /* DMA transfer constrains */
     if ((spi_bus->pdma_chanid_rx >= 0) &&
-            (!(uint32_t)tx % bytes_per_word) &&
-            (!(uint32_t)rx % bytes_per_word) &&
+            !((uint32_t)tx % bytes_per_word) &&
+            !((uint32_t)rx % bytes_per_word) &&
             (bytes_per_word != 3) &&
             (length >= NU_SPI_USE_PDMA_MIN_THRESHOLD))
         nu_spi_pdma_transmit(spi_bus, tx, rx, length, bytes_per_word);
@@ -594,7 +569,7 @@ static rt_uint32_t nu_spi_bus_xfer(struct rt_spi_device *device, struct rt_spi_m
     if ((message->length % bytes_per_word) != 0)
     {
         /* Say bye. */
-        rt_kprintf("%s: error payload length(%d%%%d != 0).\n", spi_bus->name, message->length, bytes_per_word);
+        LOG_E("%s: error payload length(%d%%%d != 0).\n", spi_bus->name, message->length, bytes_per_word);
         return 0;
     }
 
@@ -653,7 +628,7 @@ static int rt_hw_spi_init(void)
         {
             if (nu_hw_spi_pdma_allocate(&nu_spi_arr[i]) != RT_EOK)
             {
-                rt_kprintf("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_spi_arr[i].name);
+                LOG_W("Failed to allocate DMA channels for %s. We will use poll-mode for this bus.\n", nu_spi_arr[i].name);
             }
         }
 #endif

bsp/nuvoton/libraries/m480/rtt_port/drv_spi.h

@@ -13,11 +13,13 @@
 #ifndef __DRV_SPI_H__
 #define __DRV_SPI_H__
 
+#include <rtconfig.h>
+
 #include <rtdevice.h>
 #include <NuMicro.h>
 #include <nu_bitutil.h>
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_QSPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     #include <drv_pdma.h>
 #endif
 
@@ -27,7 +29,7 @@ struct nu_spi
     char *name;
     SPI_T *spi_base;
     uint32_t dummy;
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_SPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     int16_t pdma_perp_tx;
     int8_t  pdma_chanid_tx;
     int16_t pdma_perp_rx;
@@ -42,7 +44,7 @@ typedef struct nu_spi *nu_spi_t;
 void nu_spi_drain_rxfifo(SPI_T *spi_base);
 void nu_spi_transfer(struct nu_spi *spi_bus, uint8_t *tx, uint8_t *rx, int length, uint8_t bytes_per_word);
 
-#if defined(BSP_USING_SPI_PDMA) || defined(BSP_USING_SPI_PDMA)
+#if defined(BSP_USING_SPI_PDMA)
     rt_err_t nu_hw_spi_pdma_allocate(struct nu_spi *spi_bus);
 #endif
 

bsp/nuvoton/libraries/m480/rtt_port/drv_tpwm.c

@@ -19,7 +19,6 @@
 #define DBG_ENABLE
 #define DBG_SECTION_NAME        LOG_TAG
 #define DBG_LEVEL               DBG_INFO
-#define DBG_COLOR
 #define TPWM_CHANNEL_NUM        2
 #include <rtdbg.h>
 

bsp/nuvoton/libraries/m480/rtt_port/drv_uart.c

@@ -291,7 +291,7 @@ static struct nu_uart nu_uart_arr [] =
     {0}
 }; /* uart nu_uart */
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function  ----------------------------------------------------*/
 #if defined(BSP_USING_UART0)
 /* UART0 interrupt entry */
 void UART0_IRQHandler(void)
@@ -419,6 +419,8 @@ static void nu_uart_isr(nu_uart_t serial)
 #if defined(RT_SERIAL_USING_DMA)
     if (u32IntSts & UART_INTSTS_HWRLSIF_Msk)
     {
+        /* Drain RX FIFO to remove remain FEF frames in FIFO. */
+        uart_base->FIFO |= UART_FIFO_RXRST_Msk;
         uart_base->FIFOSTS |= (UART_FIFOSTS_BIF_Msk | UART_FIFOSTS_FEF_Msk | UART_FIFOSTS_PEF_Msk);
         return;
     }
@@ -434,7 +436,7 @@ static void nu_uart_isr(nu_uart_t serial)
 }
 
 /**
- * Configurae uart port
+ * Configure uart port
  */
 static rt_err_t nu_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
@@ -544,6 +546,10 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
                                        nu_pdma_uart_rx_cb,
                                        (void *)serial,
                                        NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
+    if ( result != RT_EOK )
+    {
+        goto exit_nu_pdma_uart_rx_config;
+    }
 
     result = nu_pdma_transfer(((nu_uart_t)serial)->pdma_chanid_rx,
                               8,
@@ -551,17 +557,24 @@ static rt_err_t nu_pdma_uart_rx_config(struct rt_serial_device *serial, uint8_t
                               (uint32_t)pu8Buf,
                               i32TriggerLen,
                               1000);  //Idle-timeout, 1ms
+    if ( result != RT_EOK )
+    {
+        goto exit_nu_pdma_uart_rx_config;
+    }
 
     /* Enable Receive Line interrupt & Start DMA RX transfer. */
     UART_ENABLE_INT(uart_base, UART_INTEN_RLSIEN_Msk);
     UART_PDMA_ENABLE(uart_base, UART_INTEN_RXPDMAEN_Msk);
 
+
+exit_nu_pdma_uart_rx_config:
+
     return result;
 }
 
 static void nu_pdma_uart_rx_cb(void *pvOwner, uint32_t u32Events)
 {
-    rt_size_t recv_len=0;
+    rt_size_t recv_len = 0;
     rt_size_t transferred_rxbyte = 0;
     struct rt_serial_device *serial = (struct rt_serial_device *)pvOwner;
     nu_uart_t puart = (nu_uart_t)serial;
@@ -715,7 +728,6 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *
     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
 
     RT_ASSERT(serial != RT_NULL);
-    RT_ASSERT(arg != RT_NULL);
 
     /* Get base address of uart register */
     UART_T *uart_base = ((nu_uart_t)serial)->uart_base;
@@ -763,6 +775,27 @@ static rt_err_t nu_uart_control(struct rt_serial_device *serial, int cmd, void *
         break;
 #endif
 
+    case RT_DEVICE_CTRL_CLOSE:
+        /* Disable NVIC interrupt. */
+        NVIC_DisableIRQ(((nu_uart_t)serial)->uart_irq_n);
+
+#if defined(RT_SERIAL_USING_DMA)
+        nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_tx);
+        nu_pdma_channel_terminate(((nu_uart_t)serial)->pdma_chanid_rx);
+#endif
+
+        /* Reset this module */
+        SYS_ResetModule(((nu_uart_t)serial)->uart_rst);
+
+        /* Close UART port */
+        UART_Close(uart_base);
+
+        break;
+
+    default:
+        result = -RT_EINVAL;
+        break;
+
     }
     return result;
 }

bsp/nuvoton/libraries/m480/rtt_port/drv_ui2c.c

@@ -22,7 +22,6 @@
 #define DBG_ENABLE
 #define DBG_SECTION_NAME LOG_TAG
 #define DBG_LEVEL        DBG_INFO
-#define DBG_COLOR
 #include <rtdbg.h>
 
 #define SLV_10BIT_ADDR (0x1E<<2)             //1111+0xx+r/w
@@ -110,7 +109,7 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
         LOG_D("addr1: %d, addr2: %d\n", addr1, addr2);
 
         ret = nu_ui2c_send_data(nu_ui2c, addr1);
-        if (ret != RT_EOK) //for timeout conditrion
+        if (ret != RT_EOK) //for timeout condition
             return -RT_EIO;
 
         if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk) && !ignore_nack)
@@ -122,7 +121,7 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
         UI2C_CLR_PROT_INT_FLAG(nu_ui2c->ui2c_base, UI2C_PROTSTS_ACKIF_Msk);
 
         ret = nu_ui2c_send_data(nu_ui2c,  addr2);
-        if (ret != RT_EOK) //for timeout conditrion
+        if (ret != RT_EOK) //for timeout condition
             return -RT_EIO;
 
         if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk) && !ignore_nack)
@@ -139,7 +138,7 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
 
             UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, (UI2C_CTL_PTRG | UI2C_CTL_STA));
             ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-            if (ret != RT_EOK) //for timeout conditrion
+            if (ret != RT_EOK) //for timeout condition
                 return -RT_EIO;
 
             if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_STARIF_Msk) != UI2C_PROTSTS_STARIF_Msk) && !ignore_nack)
@@ -150,16 +149,15 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
             }
             UI2C_CLR_PROT_INT_FLAG(nu_ui2c->ui2c_base, UI2C_PROTSTS_STARIF_Msk);
 
-            addr1 |= 0x01;
+            addr1 |= RT_I2C_RD;
 
             ret = nu_ui2c_send_data(nu_ui2c,  addr1);
-            if (ret != RT_EOK) //for timeout conditrion
+            if (ret != RT_EOK) //for timeout condition
                 return -RT_EIO;
 
             if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk) && !ignore_nack)
             {
                 LOG_E("NACK: sending repeated addr\n");
-
                 return -RT_EIO;
             }
             UI2C_CLR_PROT_INT_FLAG(nu_ui2c->ui2c_base, UI2C_PROTSTS_ACKIF_Msk);
@@ -170,11 +168,11 @@ static rt_err_t nu_ui2c_send_address(nu_ui2c_bus_t *nu_ui2c,
         /* 7-bit addr */
         addr1 = msg->addr << 1;
         if (flags & RT_I2C_RD)
-            addr1 |= 1;
+            addr1 |= RT_I2C_RD;
 
         /* Send device address */
         ret = nu_ui2c_send_data(nu_ui2c,  addr1); /* Send Address */
-        if (ret != RT_EOK) //for timeout conditrion
+        if (ret != RT_EOK) //for timeout condition
             return -RT_EIO;
 
         if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk)
@@ -210,7 +208,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
     UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, UI2C_CTL_STA);
     ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
 
-    if (ret != RT_EOK) //for timeout conditrion
+    if (ret != RT_EOK) //for timeout condition
     {
         rt_set_errno(-RT_ETIMEOUT);
         return 0;
@@ -235,7 +233,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
             {
                 UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, (UI2C_CTL_PTRG | UI2C_CTL_STA));/* Send repeat START */
                 ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-                if (ret != RT_EOK) //for timeout conditrion
+                if (ret != RT_EOK) //for timeout condition
                     break;
 
                 if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_STARIF_Msk) != UI2C_PROTSTS_STARIF_Msk)) /* Check Send repeat START */
@@ -272,7 +270,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
                 }
 
                 ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-                if (ret != RT_EOK) //for timeout conditrion
+                if (ret != RT_EOK) //for timeout condition
                     break;
 
                 if (nu_ui2c->ui2c_base->PROTCTL & UI2C_CTL_AA)
@@ -303,12 +301,12 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
             {
                 /* Send register number and MSB of data */
                 ret = nu_ui2c_send_data(nu_ui2c, (uint8_t)(nu_ui2c->msg[i].buf[cnt_data]));
-                if (ret != RT_EOK) //for timeout conditrion
+                if (ret != RT_EOK) //for timeout condition
                     break;
 
                 if (((UI2C_GET_PROT_STATUS(nu_ui2c->ui2c_base) & UI2C_PROTSTS_ACKIF_Msk) != UI2C_PROTSTS_ACKIF_Msk)
                         && !ignore_nack
-                   ) /* Send aata and get Ack */
+                   ) /* Send data and get Ack */
                 {
                     i = 0;
                     break;
@@ -320,7 +318,7 @@ static rt_size_t nu_ui2c_mst_xfer(struct rt_i2c_bus_device *bus,
 
     UI2C_SET_CONTROL_REG(nu_ui2c->ui2c_base, (UI2C_CTL_PTRG | UI2C_CTL_STO));            /* Send STOP signal */
     ret = nu_ui2c_wait_ready_with_timeout(nu_ui2c);
-    if (ret != RT_EOK) //for timeout conditrion
+    if (ret != RT_EOK) //for timeout condition
     {
         rt_set_errno(-RT_ETIMEOUT);
         return 0;
@@ -357,8 +355,11 @@ int rt_hw_ui2c_init(void)
 
 #if defined(BSP_USING_UI2C0)
     /* Enable UI2C0 clock */
+    SYS_UnlockReg();
     CLK_EnableModuleClock(USCI0_MODULE);
     SYS_ResetModule(USCI0_RST);
+    SYS_LockReg();
+
     nu_ui2c0.ui2c_dev.ops = &nu_ui2c_ops;
     ret = rt_i2c_bus_device_register(&nu_ui2c0.ui2c_dev, nu_ui2c0.dev_name);
     RT_ASSERT(RT_EOK == ret);
@@ -366,8 +367,11 @@ int rt_hw_ui2c_init(void)
 
 #if defined(BSP_USING_UI2C1)
     /* Enable UI2C1 clock */
+    SYS_UnlockReg();
     CLK_EnableModuleClock(USCI1_MODULE);
     SYS_ResetModule(USCI1_RST);
+    SYS_LockReg();
+
     nu_ui2c1.ui2c_dev.ops = &nu_ui2c_ops;
     ret = rt_i2c_bus_device_register(&nu_ui2c1.ui2c_dev, nu_ui2c1.dev_name);
     RT_ASSERT(RT_EOK == ret);

bsp/nuvoton/libraries/m480/rtt_port/drv_uspi.c

@@ -56,14 +56,12 @@ typedef struct nu_uspi *uspi_t;
 /* Private functions ------------------------------------------------------------*/
 static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device, struct rt_spi_configuration *configuration);
 static rt_uint32_t nu_uspi_bus_xfer(struct rt_spi_device *device, struct rt_spi_message *message);
-static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
-        uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
+static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus, uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
 static int nu_uspi_register_bus(struct nu_uspi *uspi_bus, const char *name);
 static void nu_uspi_drain_rxfifo(USPI_T *uspi_base);
 
 #if defined(BSP_USING_USPI_PDMA)
     static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter);
-    static void nu_pdma_uspi_tx_cb(void *pvUserData, uint32_t u32EventFilter);
     static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word);
     static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word);
     static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word);
@@ -187,12 +185,12 @@ static rt_err_t nu_uspi_bus_configure(struct rt_spi_device *device,
         if (configuration->mode & RT_SPI_MSB)
         {
             /* Set sequence to MSB first */
-            SPI_SET_MSB_FIRST(uspi_bus->uspi_base);
+            USPI_SET_MSB_FIRST(uspi_bus->uspi_base);
         }
         else
         {
             /* Set sequence to LSB first */
-            SPI_SET_LSB_FIRST(uspi_bus->uspi_base);
+            USPI_SET_LSB_FIRST(uspi_bus->uspi_base);
         }
     }
 
@@ -212,17 +210,11 @@ static void nu_pdma_uspi_rx_cb(void *pvUserData, uint32_t u32EventFilter)
 
     RT_ASSERT(uspi_bus != RT_NULL);
 
-    /* Get base address of uspi register */
-    USPI_T *uspi_base = uspi_bus->uspi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        USPI_DISABLE_RX_PDMA(uspi_base);  // Stop DMA TX transfer
-    }
+    rt_sem_release(uspi_bus->m_psSemBus);
 }
 static rt_err_t nu_pdma_uspi_rx_config(struct nu_uspi *uspi_bus, uint8_t *pu8Buf, int32_t i32RcvLen, uint8_t bytes_per_word)
 {
-    rt_err_t result = RT_EOK;
+    rt_err_t result = RT_ERROR;
     rt_uint8_t *dst_addr = NULL;
     nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
 
@@ -269,27 +261,9 @@ exit_nu_pdma_uspi_rx_config:
     return result;
 }
 
-static void nu_pdma_uspi_tx_cb(void *pvUserData, uint32_t u32EventFilter)
-{
-    struct nu_uspi *uspi_bus;
-    uspi_bus = (struct nu_uspi *)pvUserData;
-
-    RT_ASSERT(uspi_bus != RT_NULL);
-
-    /* Get base address of uspi register */
-    USPI_T *uspi_base = uspi_bus->uspi_base;
-
-    if (u32EventFilter & NU_PDMA_EVENT_TRANSFER_DONE)
-    {
-        USPI_DISABLE_TX_PDMA(uspi_base);  // Stop DMA TX transfer
-    }
-    rt_sem_release(uspi_bus->m_psSemBus);
-
-}
-
 static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *pu8Buf, int32_t i32SndLen, uint8_t bytes_per_word)
 {
-    rt_err_t result = RT_EOK;
+    rt_err_t result = RT_ERROR;
     rt_uint8_t *src_addr = NULL;
     nu_pdma_memctrl_t memctrl = eMemCtl_Undefined;
 
@@ -298,15 +272,6 @@ static rt_err_t nu_pdma_uspi_tx_config(struct nu_uspi *uspi_bus, const uint8_t *
 
     rt_uint8_t uspi_pdma_tx_chid = uspi_bus->pdma_chanid_tx;
 
-    result = nu_pdma_callback_register(uspi_pdma_tx_chid,
-                                       nu_pdma_uspi_tx_cb,
-                                       (void *)uspi_bus,
-                                       NU_PDMA_EVENT_TRANSFER_DONE);
-    if (result != RT_EOK)
-    {
-        goto exit_nu_pdma_uspi_tx_config;
-    }
-
     if (pu8Buf == RT_NULL)
     {
         uspi_bus->dummy = 0;
@@ -343,7 +308,7 @@ exit_nu_pdma_uspi_tx_config:
  */
 static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *send_addr, uint8_t *recv_addr, int length, uint8_t bytes_per_word)
 {
-    rt_err_t result = RT_EOK;
+    rt_err_t result = RT_ERROR;
 
     /* Get base address of uspi register */
     USPI_T *uspi_base = uspi_bus->uspi_base;
@@ -354,13 +319,13 @@ static rt_size_t nu_uspi_pdma_transmit(struct nu_uspi *uspi_bus, const uint8_t *
     RT_ASSERT(result == RT_EOK);
 
     /* Trigger TX/RX at the same time. */
-    USPI_TRIGGER_TX_PDMA(uspi_base);
-    USPI_TRIGGER_RX_PDMA(uspi_base);
+    USPI_TRIGGER_TX_RX_PDMA(uspi_base);
 
     /* Wait PDMA transfer done */
     rt_sem_take(uspi_bus->m_psSemBus, RT_WAITING_FOREVER);
 
-    while (USPI_IS_BUSY(uspi_base));
+    /* Stop DMA TX/RX transfer */
+    USPI_DISABLE_TX_RX_PDMA(uspi_base);
 
     return result;
 }
@@ -404,7 +369,6 @@ static void nu_uspi_drain_rxfifo(USPI_T *uspi_base)
 static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per_word)
 {
     int size = 0;
-    uint32_t val;
 
     // Read RX data
     if (!USPI_GET_RX_EMPTY_FLAG(uspi_base))
@@ -412,6 +376,7 @@ static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per
         // Read data from USPI RX FIFO
         switch (bytes_per_word)
         {
+            uint32_t val;
         case 2:
             val = USPI_READ_RX(uspi_base);
             nu_set16_le(recv_addr, val);
@@ -419,6 +384,8 @@ static int nu_uspi_read(USPI_T *uspi_base, uint8_t *recv_addr, uint8_t bytes_per
         case 1:
             *recv_addr = USPI_READ_RX(uspi_base);
             break;
+        default:
+            break;
         }
         size = bytes_per_word;
     }
@@ -439,6 +406,8 @@ static int nu_uspi_write(USPI_T *uspi_base, const uint8_t *send_addr, uint8_t by
     case 1:
         USPI_WRITE_TX(uspi_base, *((uint8_t *)send_addr));
         break;
+    default:
+        break;
     }
 
     return bytes_per_word;
@@ -475,6 +444,7 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
             length -= nu_uspi_write(uspi_base, (const uint8_t *)&uspi_bus->dummy, bytes_per_word);
 
             /* Read data from RX FIFO */
+            while (USPI_GET_RX_EMPTY_FLAG(uspi_base));
             recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
         }
     } // else if (send_addr == RT_NULL && recv_addr != RT_NULL)
@@ -488,11 +458,12 @@ static void nu_uspi_transmission_with_poll(struct nu_uspi *uspi_bus,
             length -= bytes_per_word;
 
             /* Read data from RX FIFO */
+            while (USPI_GET_RX_EMPTY_FLAG(uspi_base));
             recv_addr += nu_uspi_read(uspi_base, recv_addr, bytes_per_word);
         }
     } // else
 
-    /* Wait RX or drian RX-FIFO */
+    /* Wait RX or drain RX-FIFO */
     if (recv_addr)
     {
         // Wait SPI transmission done
@@ -521,9 +492,8 @@ static void nu_uspi_transfer(struct nu_uspi *uspi_bus, uint8_t *tx, uint8_t *rx,
 #if defined(BSP_USING_USPI_PDMA)
     /* DMA transfer constrains */
     if ((uspi_bus->pdma_chanid_rx >= 0) &&
-            (!(uint32_t)tx % bytes_per_word) &&
-            (!(uint32_t)rx % bytes_per_word) &&
-            (bytes_per_word != 3))
+            !((uint32_t)tx % bytes_per_word) &&
+            !((uint32_t)rx % bytes_per_word) )
         nu_uspi_pdma_transmit(uspi_bus, tx, rx, length, bytes_per_word);
     else
         nu_uspi_transmission_with_poll(uspi_bus, tx, rx, length, bytes_per_word);

bsp/nuvoton/libraries/m480/rtt_port/drv_uuart.c

@@ -139,7 +139,7 @@ static struct nu_uuart nu_uuart_arr [] =
     {0}
 }; /* uuart nu_uuart */
 
-/* Interrupt Handle Funtion  ----------------------------------------------------*/
+/* Interrupt Handle Function  ----------------------------------------------------*/
 #if defined(BSP_USING_UUART0)
 /* USCI0 interrupt entry */
 void USCI0_IRQHandler(void)
@@ -197,7 +197,7 @@ static void nu_uuart_isr(nu_uuart_t serial)
 }
 
 /**
- * Configurae uuart port
+ * Configure uuart port
  */
 static rt_err_t nu_uuart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
 {
@@ -209,12 +209,9 @@ static rt_err_t nu_uuart_configure(struct rt_serial_device *serial, struct seria
     /* Get base address of uuart register */
     UUART_T *uuart_base = ((nu_uuart_t)serial)->uuart_base;
 
-
-    /* Check baudrate */
+    /* Check baud rate */
     RT_ASSERT(cfg->baud_rate != 0);
 
-
-
     /* Check word len */
     switch (cfg->data_bits)
     {
@@ -280,8 +277,7 @@ static rt_err_t nu_uuart_configure(struct rt_serial_device *serial, struct seria
     /* Reset this module */
     SYS_ResetModule(((nu_uuart_t)serial)->uuart_rst);
 
-
-    /* Open UUart and set UUART Baudrate */
+    /* Open UUart and set UUART baud rate */
     UUART_Open(uuart_base, cfg->baud_rate);
 
     /* Set line configuration. */
@@ -311,6 +307,11 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
                                        (void *)serial,
                                        NU_PDMA_EVENT_TRANSFER_DONE | NU_PDMA_EVENT_TIMEOUT);
 
+    if (result != RT_EOK)
+    {
+        goto exit_nu_pdma_uuart_rx_config;
+    }
+
     result = nu_pdma_transfer(((nu_uuart_t)serial)->pdma_chanid_rx,
                               8,
                               (uint32_t)&uuart_base->RXDAT,
@@ -318,7 +319,10 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
                               i32TriggerLen,
                               1000);  //Idle-timeout, 1ms
 
-
+    if (result != RT_EOK)
+    {
+        goto exit_nu_pdma_uuart_rx_config;
+    }
 
     //UUART PDMA reset
     UUART_PDMA_ENABLE(uuart_base, UUART_PDMACTL_PDMARST_Msk);
@@ -327,6 +331,7 @@ static rt_err_t nu_pdma_uuart_rx_config(struct rt_serial_device *serial, uint8_t
     UUART_EnableInt(uuart_base, UUART_RLS_INT_MASK);
     UUART_PDMA_ENABLE(uuart_base, UUART_PDMACTL_RXPDMAEN_Msk | UUART_PDMACTL_PDMAEN_Msk);
 
+exit_nu_pdma_uuart_rx_config:
 
     return result;
 }
@@ -483,7 +488,6 @@ static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void
     rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
 
     RT_ASSERT(serial != RT_NULL);
-    RT_ASSERT(arg != RT_NULL);
 
     /* Get base address of uuart register */
     UUART_T *uuart_base = ((nu_uuart_t)serial)->uuart_base;
@@ -530,6 +534,25 @@ static rt_err_t nu_uuart_control(struct rt_serial_device *serial, int cmd, void
         break;
 #endif
 
+    case RT_DEVICE_CTRL_CLOSE:
+        /* Disable NVIC interrupt. */
+        NVIC_DisableIRQ(((nu_uuart_t)serial)->uuart_irq_n);
+
+#if defined(RT_SERIAL_USING_DMA)
+        nu_pdma_channel_terminate(((nu_uuart_t)serial)->pdma_chanid_tx);
+        nu_pdma_channel_terminate(((nu_uuart_t)serial)->pdma_chanid_rx);
+#endif
+
+        /* Reset this module */
+        SYS_ResetModule(((nu_uuart_t)serial)->uuart_rst);
+
+        /* Close UUART port */
+        UUART_Close(uuart_base);
+
+        break;
+    default:
+        result = -RT_EINVAL;
+        break;
     }
     return result;
 }
@@ -599,7 +622,7 @@ static int rt_hw_uuart_init(void)
         RT_ASSERT(ret == RT_EOK);
     }
 
-    return ret;
+    return (int)ret;
 }
 
 INIT_DEVICE_EXPORT(rt_hw_uuart_init);

bsp/nuvoton/libraries/m480/rtt_port/drv_wdt.c

@@ -13,7 +13,6 @@
 #include <rtconfig.h>
 
 #if defined(BSP_USING_WDT)
-
 #include <rthw.h>
 #include <rtdevice.h>
 #include <rtdbg.h>
@@ -22,7 +21,7 @@
 /*-------------------------------------------------------------------------------*/
 /* watchdog timer timeout look up table                                          */
 /*-------------------------------------------------------------------------------*/
-/* clock = LIRC 10Khz.                                                           */
+/* clock = LIRC 10KHz.                                                           */
 /*                                                                               */
 /*      working hz   toutsel     exp     cycles      timeout (s)                 */
 /*      10000        0           4       16          0.0016                      */
@@ -34,7 +33,7 @@
 /*                   6           16      65536       6.5536                      */
 /*                   7           18      262144      26.2144                     */
 /*-------------------------------------------------------------------------------*/
-/* clock = LXT 32.76Khz.                                                         */
+/* clock = LXT 32768Hz.                                                          */
 /*                                                                               */
 /*      working hz   toutsel     exp     cycles      timeout (s)                 */
 /*      32768        0           4       16          0.0005                      */
@@ -46,7 +45,7 @@
 /*                   6           16      65536       2.0000                      */
 /*                   7           18      262144      8.0000                      */
 /*-------------------------------------------------------------------------------*/
-/* clock = 192Mhz HCLK divide 2048 = 93750 hz.                                   */
+/* clock = 192MHz HCLK divide 2048 = 93750 Hz.                                   */
 /*                                                                               */
 /*      working hz   toutsel     exp     cycles      timeout (s)                 */
 /*      93750        0           4       16          0.00017                     */
@@ -69,10 +68,10 @@
 #define MIN_CYCLES                  (1024)
 
 
-/* Macros to convert the value bewtween the timeout interval and the soft time iterations. */
+/* Macros to convert the value between the timeout interval and the soft time iterations. */
 #define ROUND_TO_INTEGER(value)         ((int)(((value) * 10 + 5) / 10))
-#define CONV_SEC_TO_IT(hz, secs)        ROUND_TO_INTEGER((float)((secs) * (hz)) / (float)MIN_CYCLES)
-#define CONV_IT_TO_SEC(hz, iterations)  ROUND_TO_INTEGER((float)(iterations * MIN_CYCLES) / (float)hz)
+#define CONV_SEC_TO_IT(hz, secs)        (ROUND_TO_INTEGER((float)((secs) * (hz)) / (float)(MIN_CYCLES)))
+#define CONV_IT_TO_SEC(hz, iterations)  (ROUND_TO_INTEGER((float)((iterations) * (MIN_CYCLES)) / (float)(hz)))
 
 
 /* Private typedef --------------------------------------------------------------*/
@@ -98,12 +97,10 @@ static void soft_time_setup(uint32_t wanted_sec, uint32_t hz, soft_time_handle_t
 static void soft_time_feed_dog(soft_time_handle_t *const soft_time);
 
 #if defined(RT_USING_PM)
-    static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
-    static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
-    static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
-
-    static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
-
+static int wdt_pm_suspend(const struct rt_device *device, rt_uint8_t mode);
+static void wdt_pm_resume(const struct rt_device *device, rt_uint8_t mode);
+static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mode);
+static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const soft_time);
 #endif
 
 /* Public functions -------------------------------------------------------------*/
@@ -129,8 +126,6 @@ static struct rt_device_pm_ops device_pm_ops =
 #endif
 
 
-
-
 #if defined(RT_USING_PM)
 
 /* device pm suspend() entry. */
@@ -204,7 +199,7 @@ static int wdt_pm_frequency_change(const struct rt_device *device, rt_uint8_t mo
         if (new_hz == soft_time.clock_hz)
             return (int)(RT_EOK);
 
-        /* frequency change occurs in critial section */
+        /* frequency change occurs in critical section */
         soft_time_freqeucy_change(new_hz, &soft_time);
     }
 
@@ -241,7 +236,7 @@ static void soft_time_freqeucy_change(uint32_t new_hz, soft_time_handle_t *const
 
     if (corner_case)
     {
-        LOG_W("pm frequency change cause wdt intenal left iterations convert to 0.\n\r  \
+        LOG_W("pm frequency change cause wdt internal left iterations convert to 0.\n\r  \
                wdt driver will add another 1 iteration for this corner case.");
     }
 }
@@ -263,7 +258,7 @@ static void hw_wdt_init(void)
 }
 
 
-/* wdt device driver initialise. */
+/* wdt device driver initialize. */
 int rt_hw_wdt_init(void)
 {
     rt_err_t ret;
@@ -278,13 +273,12 @@ int rt_hw_wdt_init(void)
     rt_pm_device_register((struct rt_device *)&device_wdt, &device_pm_ops);
 #endif
 
-
     return (int)ret;
 }
 INIT_BOARD_EXPORT(rt_hw_wdt_init);
 
 
-/* Reigster rt-thread device.init() entry. */
+/* Register rt-thread device.init() entry. */
 static rt_err_t wdt_init(rt_watchdog_t *dev)
 {
     soft_time_init(&soft_time);

bsp/nuvoton/numaker-iot-m487/README.md

@@ -35,7 +35,7 @@ NuMaker-IoT-M487 provides multiple networking, interfaces, audio recording, play
 |Ethernet PHY| IP101GR | Supported |
 |Sensor| BMX055 | Supported |
 |Wi-Fi module| ESP8266-ESP12, AT firmware v1.7 | Supported |
-|Audio Codec| NAU88L25, Supports MIC and earphone | Coming soon |
+|Audio Codec| NAU88L25, Supports MIC and earphone | Supported |
 
 ## 2. Supported compiler
 Support GCC, MDK4, MDK5, IAR IDE/compilers. More information of these compiler version as following:

bsp/nuvoton/numaker-iot-m487/applications/main.c

@@ -10,7 +10,7 @@
 *
 ******************************************************************************/
 
-#include <rtthread.h>
+#include <rtconfig.h>
 #include <rtdevice.h>
 #include <drv_gpio.h>
 
@@ -19,6 +19,8 @@
 
 int main(int argc, char **argv)
 {
+#if defined(RT_USING_PIN)
+
     int counter = 0;
 
     /* set LEDR1 pin mode to output */
@@ -32,5 +34,6 @@ int main(int argc, char **argv)
         rt_thread_mdelay(500);
     }
 
+#endif
     return 0;
 }

bsp/nuvoton/numaker-iot-m487/board/board_dev.c

@@ -145,7 +145,8 @@ INIT_APP_EXPORT(rt_hw_bmx055_port);
 #if defined(BOARD_USING_ESP8266)
 #include <at_device_esp8266.h>
 
-#define LOG_TAG                        "at.sample.esp"
+#define LOG_TAG    "at.sample.esp"
+#undef DBG_TAG
 #include <at_log.h>
 
 static struct at_device_esp8266 esp0 =

bsp/nuvoton/numaker-pfm-m487/README.md

@@ -32,7 +32,7 @@ NuMaker-PFM-M487 provides multiple networking, interfaces, audio recording, play
 | -- | -- | -- |
 |SPI flash | W25Q32 | Supported |
 |Ethernet PHY| IP101GR | Supported |
-|Audio Codec| NAU88L25, Supports MIC and earphone | Coming soon |
+|Audio Codec| NAU88L25, Supports MIC and earphone | Supported |
 
 ## 2. Supported compiler
 Support GCC, MDK4, MDK5, IAR IDE/compilers. More information of these compiler version as following: