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@@ -7,103 +7,95 @@
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* Date Author Notes
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* 2019-07-15 Magicoe The first version for LPC55S6x
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*/
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-#include "drv_spi.h"
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+#include "rtdevice.h"
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#include "fsl_common.h"
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#include "fsl_iocon.h"
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#include "fsl_spi.h"
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+#include "fsl_spi_dma.h"
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-#if defined(BSP_USING_SPIBUS0) || \
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- defined(BSP_USING_SPIBUS1) || \
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- defined(BSP_USING_SPIBUS2) || \
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- defined(BSP_USING_SPIBUS3) || \
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- defined(BSP_USING_SPIBUS4) || \
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- defined(BSP_USING_SPIBUS5) || \
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- defined(BSP_USING_SPIBUS6) || \
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- defined(BSP_USING_SPIBUS7) || \
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- defined(BSP_USING_SPIBUS8)
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-
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-#if defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL
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- #error "Please don't define 'FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL'!"
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+enum
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+{
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+#ifdef BSP_USING_SPI3
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+ SPI3_INDEX,
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+#endif
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+#ifdef BSP_USING_SPI8
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+ SPI8_INDEX,
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#endif
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+};
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+
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struct lpc_spi
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{
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- SPI_Type *base;
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- struct rt_spi_configuration *cfg;
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- SYSCON_RSTn_t spi_rst;
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+ struct rt_spi_bus parent;
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+ SPI_Type *SPIx;
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+ clock_attach_id_t clock_attach_id;
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+ clock_ip_name_t clock_name;
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+
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+ DMA_Type *DMAx;
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+ uint8_t tx_dma_chl;
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+ uint8_t rx_dma_chl;
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+ dma_handle_t dma_tx_handle;
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+ dma_handle_t dma_rx_handle;
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+ spi_dma_handle_t spi_dma_handle;
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+
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+ rt_sem_t sem;
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+ char *device_name;
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};
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-static uint32_t lpc_get_spi_freq(SPI_Type *base)
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+static struct lpc_spi lpc_obj[] =
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{
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- uint32_t freq = 0;
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+#ifdef BSP_USING_SPI3
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+ {
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+ .SPIx = SPI3,
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+ .clock_attach_id = kMAIN_CLK_to_FLEXCOMM3,
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+ .clock_name = kCLOCK_FlexComm3,
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+ .device_name = "spi3",
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-#if defined(BSP_USING_SPIBUS0)
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- if(base == SPI0)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(0);
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- }
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-#endif
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+ .DMAx = DMA0,
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+ .tx_dma_chl = 9,
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+ .rx_dma_chl = 8,
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-#if defined(BSP_USING_SPIBUS1)
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- if(base == SPI1)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(1);
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- }
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+ },
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#endif
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+ #ifdef BSP_USING_SPI8
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+ {
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+ .SPIx = SPI8,
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+ .clock_attach_id = kMAIN_CLK_to_HSLSPI,
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+ .clock_name = kCLOCK_Hs_Lspi,
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+ .device_name = "spi8",
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-#if defined(BSP_USING_SPIBUS2)
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- if(base == SPI2)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(2);
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- }
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-#endif
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+ .DMAx = DMA0,
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+ .tx_dma_chl = 3,
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+ .rx_dma_chl = 2,
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-#if defined(BSP_USING_SPIBUS3)
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- if(base == SPI3)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(3);
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- }
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+ },
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#endif
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+};
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-#if defined(BSP_USING_SPIBUS4)
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- if(base == SPI4)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(4);
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- }
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-#endif
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-#if defined(BSP_USING_SPIBUS5)
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- if(base == SPI5)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(5);
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- }
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-#endif
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+struct lpc_sw_spi_cs
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+{
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+ rt_uint32_t pin;
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+};
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-#if defined(BSP_USING_SPIBUS6)
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- if(base == SPI6)
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- {
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- freq = CLOCK_GetFlexCommClkFreq(6);
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- }
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-#endif
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-#if defined(BSP_USING_SPIBUS7)
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- if(base == SPI7)
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+static uint32_t lpc_get_spi_freq(SPI_Type *base)
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+{
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+ uint32_t freq = 0;
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+
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+
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+ if(base == SPI3)
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{
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- freq = CLOCK_GetFlexCommClkFreq(7);
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+ freq = CLOCK_GetFlexCommClkFreq(kCLOCK_FlexComm3);
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}
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-#endif
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- /* High Speed SPI - 50MHz */
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-#if defined(BSP_USING_SPIBUS8)
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if(base == SPI8)
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{
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- freq = CLOCK_GetHsLspiClkFreq();
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+ freq = CLOCK_GetFlexCommClkFreq(kCLOCK_Hs_Lspi);
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}
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-#endif
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-
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return freq;
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}
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@@ -111,30 +103,12 @@ static rt_err_t lpc_spi_init(SPI_Type *base, struct rt_spi_configuration *cfg)
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{
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spi_master_config_t masterConfig = {0};
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- RT_ASSERT(cfg != RT_NULL);
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-
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- if(cfg->data_width != 8 && cfg->data_width != 16)
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- {
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- return (-RT_EINVAL);
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- }
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-
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-
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SPI_MasterGetDefaultConfig(&masterConfig);
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-#if defined(BSP_USING_SPIBUS8)
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- if(base == SPI8)
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- {
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- if(cfg->max_hz > 50*1000*1000)
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- {
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- cfg->max_hz = 50*1000*1000;
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- }
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- }
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-#else
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- if(cfg->max_hz > 12*1000*1000)
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+ if(cfg->data_width != 8 && cfg->data_width != 16)
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{
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- cfg->max_hz = 12*1000*1000;
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+ cfg->data_width = 8;
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}
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-#endif
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masterConfig.baudRate_Bps = cfg->max_hz;
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@@ -179,183 +153,106 @@ static rt_err_t lpc_spi_init(SPI_Type *base, struct rt_spi_configuration *cfg)
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return RT_EOK;
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}
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-rt_err_t lpc_spi_bus_attach_device(const char *bus_name, const char *device_name, rt_uint32_t pin)
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+rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
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{
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rt_err_t ret = RT_EOK;
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struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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- RT_ASSERT(spi_device != RT_NULL);
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+ struct lpc_sw_spi_cs *cs_pin = (struct lpc_sw_spi_cs *)rt_malloc(sizeof(struct lpc_sw_spi_cs));
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+ cs_pin->pin = pin;
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rt_pin_mode(pin, PIN_MODE_OUTPUT);
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rt_pin_write(pin, PIN_HIGH);
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- ret = rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, pin, NULL);
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+ ret = rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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return ret;
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}
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+
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+
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static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
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{
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rt_err_t ret = RT_EOK;
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struct lpc_spi *spi = RT_NULL;
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-
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- RT_ASSERT(cfg != RT_NULL);
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- RT_ASSERT(device != RT_NULL);
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-
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spi = (struct lpc_spi *)(device->bus->parent.user_data);
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- spi->cfg = cfg;
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- ret = lpc_spi_init(spi->base, cfg);
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+ ret = lpc_spi_init(spi->SPIx, cfg);
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return ret;
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}
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-#define SPISTEP(datalen) (((datalen) == 8) ? 1 : 2)
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-static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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+
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+static void SPI_MasterUserCallback(SPI_Type *base, spi_dma_handle_t *handle, status_t status, void *userData)
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+{
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+ struct lpc_spi *spi = (struct lpc_spi*)userData;
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+ rt_sem_release(spi->sem);
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+}
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+
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+static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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- uint32_t length;
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+ int i;
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+ spi_transfer_t transfer = {0};
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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+
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struct lpc_spi *spi = (struct lpc_spi *)(device->bus->parent.user_data);
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- int cs_pin = device->cs_pin;
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+ struct lpc_sw_spi_cs *cs = device->parent.user_data;
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if(message->cs_take)
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{
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- rt_pin_write(cs_pin, PIN_LOW);
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+ rt_pin_write(cs->pin, PIN_LOW);
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}
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- length = message->length;
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- const rt_uint8_t *txData = (uint8_t *)(message->send_buf);
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- rt_uint8_t *rxData = (uint8_t *)(message->recv_buf);
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-
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- rt_kprintf("*** spi send %d\r\n", length);
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+ transfer.dataSize = message->length;
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+ transfer.rxData = (uint8_t *)(message->recv_buf);
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+ transfer.txData = (uint8_t *)(message->send_buf);
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+ transfer.configFlags = kSPI_FrameAssert;
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- while (length)
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+ // if(message->length < MAX_DMA_TRANSFER_SIZE)
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+ if(0)
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{
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- /* clear tx/rx errors and empty FIFOs */
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- spi->base->FIFOCFG |= SPI_FIFOCFG_EMPTYTX_MASK | SPI_FIFOCFG_EMPTYRX_MASK;
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- spi->base->FIFOSTAT |= SPI_FIFOSTAT_TXERR_MASK | SPI_FIFOSTAT_RXERR_MASK;
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- spi->base->FIFOWR = *txData | 0x07300000;
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- /* wait if TX FIFO of previous transfer is not empty */
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- while ((spi->base->FIFOSTAT & SPI_FIFOSTAT_RXNOTEMPTY_MASK) == 0) {
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- }
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- if(rxData != NULL)
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- {
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- *rxData = spi->base->FIFORD;
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- rxData += SPISTEP(spi->cfg->data_width);
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- }
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- txData += SPISTEP(spi->cfg->data_width);;
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- length--;
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+ SPI_MasterTransferBlocking(spi->SPIx, &transfer);
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}
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-
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- if(message->cs_release)
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+ else
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{
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- rt_pin_write(cs_pin, PIN_HIGH);
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- }
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+ uint32_t block, remain;
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+ block = message->length / DMA_MAX_TRANSFER_COUNT;
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+ remain = message->length % DMA_MAX_TRANSFER_COUNT;
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- return (message->length - length);
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-}
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-
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-#if defined(BSP_USING_SPIBUS0)
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-static struct lpc_spi spi0 =
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-{
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- .base = SPI0
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-};
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-static struct rt_spi_bus spi0_bus =
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-{
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- .parent.user_data = &spi0
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-};
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-#endif
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+ for(i=0; i<block; i++)
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+ {
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+ transfer.dataSize = DMA_MAX_TRANSFER_COUNT;
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+ if(message->recv_buf) transfer.rxData = (uint8_t *)(message->recv_buf + i*DMA_MAX_TRANSFER_COUNT);
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+ if(message->send_buf) transfer.txData = (uint8_t *)(message->send_buf + i*DMA_MAX_TRANSFER_COUNT);
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-#if defined(BSP_USING_SPIBUS1)
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-static struct lpc_spi spi1 =
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-{
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- .base = SPI1
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-};
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-static struct rt_spi_bus spi1_bus =
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-{
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- .parent.user_data = &spi1
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-};
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-#endif
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+ SPI_MasterTransferDMA(spi->SPIx, &spi->spi_dma_handle, &transfer);
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+ rt_sem_take(spi->sem, RT_WAITING_FOREVER);
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+ }
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-#if defined(BSP_USING_SPIBUS2)
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-static struct lpc_spi spi2 =
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-{
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- .base = SPI2
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-};
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-static struct rt_spi_bus spi2_bus =
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-{
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- .parent.user_data = &spi2
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-};
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-#endif
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+ if(remain)
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+ {
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+ transfer.dataSize = remain;
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+ if(message->recv_buf) transfer.rxData = (uint8_t *)(message->recv_buf + i*DMA_MAX_TRANSFER_COUNT);
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+ if(message->send_buf) transfer.txData = (uint8_t *)(message->send_buf + i*DMA_MAX_TRANSFER_COUNT);
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-#if defined(BSP_USING_SPIBUS3)
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-static struct lpc_spi spi3 =
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-{
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- .base = SPI3
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-};
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-static struct rt_spi_bus spi3_bus =
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-{
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- .parent.user_data = &spi3
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-};
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-#endif
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+ SPI_MasterTransferDMA(spi->SPIx, &spi->spi_dma_handle, &transfer);
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+ rt_sem_take(spi->sem, RT_WAITING_FOREVER);
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+ }
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+ }
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-#if defined(BSP_USING_SPIBUS4)
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-static struct lpc_spi spi4 =
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-{
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- .base = SPI4
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-};
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-static struct rt_spi_bus spi4_bus =
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-{
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- .parent.user_data = &spi4
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-};
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-#endif
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-#if defined(BSP_USING_SPIBUS5)
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-static struct lpc_spi spi5 =
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-{
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- .base = SPI5
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-};
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-static struct rt_spi_bus spi5_bus =
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-{
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- .parent.user_data = &spi5
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-};
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-#endif
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-#if defined(BSP_USING_SPIBUS6)
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-static struct lpc_spi spi6 =
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-{
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- .base = SPI6
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-};
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-static struct rt_spi_bus spi6_bus =
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-{
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- .parent.user_data = &spi6
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-};
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-#endif
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+ if(message->cs_release)
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+ {
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+ rt_pin_write(cs->pin, PIN_HIGH);
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+ }
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-#if defined(BSP_USING_SPIBUS7)
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-static struct lpc_spi spi7 =
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-{
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- .base = SPI7
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-};
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-static struct rt_spi_bus spi7_bus =
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-{
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- .parent.user_data = &spi7
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-};
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-#endif
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+ return message->length;
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+}
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-#if defined(BSP_USING_SPIBUS8)
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-static struct lpc_spi spi8 =
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-{
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- .base = SPI8
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-};
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-static struct rt_spi_bus spi8_bus =
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-{
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- .parent.user_data = &spi8
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-};
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-#endif
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static struct rt_spi_ops lpc_spi_ops =
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@@ -364,76 +261,29 @@ static struct rt_spi_ops lpc_spi_ops =
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.xfer = spixfer
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};
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-int rt_hw_spi_init(void)
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-{
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-#if defined(BSP_USING_SPIBUS0)
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- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
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- RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
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- spi0.cfg = RT_NULL;
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- rt_spi_bus_register(&spi0_bus, "spi0", &lpc_spi_ops);
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-#endif
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-#if defined(BSP_USING_SPIBUS1)
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- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM1);
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- RESET_PeripheralReset(kFC1_RST_SHIFT_RSTn);
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-
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- spi1.cfg = RT_NULL;
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- rt_spi_bus_register(&spi1_bus, "spi1", &lpc_spi_ops);
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-#endif
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-#if defined(BSP_USING_SPIBUS2)
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- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM2);
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- RESET_PeripheralReset(kFC2_RST_SHIFT_RSTn);
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- spi2.cfg = RT_NULL;
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- rt_spi_bus_register(&spi2_bus, "spi2", &lpc_spi_ops);
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-#endif
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-
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-#if defined(BSP_USING_SPIBUS3)
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- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM3);
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- RESET_PeripheralReset(kFC3_RST_SHIFT_RSTn);
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- spi3.cfg = RT_NULL;
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- rt_spi_bus_register(&spi3_bus, "spi3", &lpc_spi_ops);
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-#endif
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-
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-#if defined(BSP_USING_SPIBUS4)
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- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM4);
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- RESET_PeripheralReset(kFC4_RST_SHIFT_RSTn);
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- spi4.cfg = RT_NULL;
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- rt_spi_bus_register(&spi4_bus, "spi4", &lpc_spi_ops);
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|
-#endif
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-
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|
|
-#if defined(BSP_USING_SPIBUS5)
|
|
|
- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM5);
|
|
|
- RESET_PeripheralReset(kFC5_RST_SHIFT_RSTn);
|
|
|
- spi5.cfg = RT_NULL;
|
|
|
- rt_spi_bus_register(&spi5_bus, "spi5", &lpc_spi_ops);
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPIBUS6)
|
|
|
- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM6);
|
|
|
- RESET_PeripheralReset(kFC6_RST_SHIFT_RSTn);
|
|
|
- spi6.cfg = RT_NULL;
|
|
|
- rt_spi_bus_register(&spi6_bus, "spi6", &lpc_spi_ops);
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPIBUS7)
|
|
|
- CLOCK_AttachClk(kFRO12M_to_FLEXCOMM7);
|
|
|
- RESET_PeripheralReset(kFC7_RST_SHIFT_RSTn);
|
|
|
- spi7.cfg = RT_NULL;
|
|
|
- rt_spi_bus_register(&spi7_bus, "spi7", &lpc_spi_ops);
|
|
|
-#endif
|
|
|
-
|
|
|
-#if defined(BSP_USING_SPIBUS8)
|
|
|
- CLOCK_AttachClk(kMAIN_CLK_to_HSLSPI);
|
|
|
- RESET_PeripheralReset(kHSLSPI_RST_SHIFT_RSTn);
|
|
|
- spi8.cfg = RT_NULL;
|
|
|
- spi8.spi_rst = kHSLSPI_RST_SHIFT_RSTn;
|
|
|
- rt_spi_bus_register(&spi8_bus, "spi8", &lpc_spi_ops);
|
|
|
-#endif
|
|
|
+int rt_hw_spi_init(void)
|
|
|
+{
|
|
|
+ int i;
|
|
|
|
|
|
+ for(i=0; i<ARRAY_SIZE(lpc_obj); i++)
|
|
|
+ {
|
|
|
+ CLOCK_AttachClk(lpc_obj[i].clock_attach_id);
|
|
|
+ lpc_obj[i].parent.parent.user_data = &lpc_obj[i];
|
|
|
+ lpc_obj[i].sem = rt_sem_create("sem_spi", 0, RT_IPC_FLAG_FIFO);
|
|
|
+
|
|
|
+ DMA_EnableChannel(lpc_obj[i].DMAx, lpc_obj[i].tx_dma_chl);
|
|
|
+ DMA_EnableChannel(lpc_obj[i].DMAx, lpc_obj[i].rx_dma_chl);
|
|
|
+ DMA_SetChannelPriority(lpc_obj[i].DMAx, lpc_obj[i].tx_dma_chl, kDMA_ChannelPriority3);
|
|
|
+ DMA_SetChannelPriority(lpc_obj[i].DMAx, lpc_obj[i].rx_dma_chl, kDMA_ChannelPriority2);
|
|
|
+ DMA_CreateHandle(&lpc_obj[i].dma_tx_handle, lpc_obj[i].DMAx, lpc_obj[i].tx_dma_chl);
|
|
|
+ DMA_CreateHandle(&lpc_obj[i].dma_rx_handle, lpc_obj[i].DMAx, lpc_obj[i].rx_dma_chl);
|
|
|
+ SPI_MasterTransferCreateHandleDMA(lpc_obj[i].SPIx, &lpc_obj[i].spi_dma_handle, SPI_MasterUserCallback, &lpc_obj[i], &lpc_obj[i].dma_tx_handle, &lpc_obj[i].dma_rx_handle);
|
|
|
+ rt_spi_bus_register(&lpc_obj[i].parent, lpc_obj[i].device_name, &lpc_spi_ops);
|
|
|
+ }
|
|
|
return RT_EOK;
|
|
|
}
|
|
|
|
|
|
-INIT_BOARD_EXPORT(rt_hw_spi_init);
|
|
|
+INIT_DEVICE_EXPORT(rt_hw_spi_init);
|
|
|
|
|
|
-#endif
|