Merge branch 'master' into stm32_uart_tx_dma

README.md

@@ -17,13 +17,13 @@ RT-Thread RTOS like a traditional real-time operating system. The kernel has rea
 
 * Device Driver;
 * Component;
-* Dyanmic Module
+* Dynamic Module
 
 The device driver is more like a driver framework, UART, IIC, SPI, SDIO, USB device/host, EMAC, MTD NAND etc. The developer can easily add low level driver and board configuration, then combined with the upper framework, he/she can use lots of features.
 
 The Component is a software concept upon RT-Thread kernel, for example a shell (finsh/msh shell), virtual file system (FAT, YAFFS, UFFS, ROM/RAM file system etc), TCP/IP protocol stack (lwIP), POSIX (thread) interface etc. One component must be a directory under RT-Thread/Components and one component can be descripted by a SConscript file (then be compiled and linked into the system).
 
-The Dyanmic Module, formerly named as User Applicaion (UA) is a dyanmic loaded module or library, it can be compiled standalone without Kernel. Each Dyanmic Module has its own object list to manage thread/semaphore/kernel object which was created or initialized inside this UA. More information about UA, please visit another [git repo](https://github.com/RT-Thread/rtthread-apps).
+The Dynamic Module, formerly named as User Applicaion (UA) is a dynamic loaded module or library, it can be compiled standalone without Kernel. Each Dynamic Module has its own object list to manage thread/semaphore/kernel object which was created or initialized inside this UA. More information about UA, please visit another [git repo](https://github.com/RT-Thread/rtthread-apps).
 
 ## Board Support Package ##
 

bsp/allwinner_tina/libcpu/interrupt.c

@@ -102,6 +102,7 @@ void rt_hw_interrupt_mask(int vector)
 }
 
 /**
+
  * This function will un-mask a interrupt.
  * @param vector the interrupt number
  */
@@ -167,7 +168,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
     return old_handler;
 }
 
-void rt_interrupt_dispatch(void)
+void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
 {
     void *param;
     int vector;

bsp/at91sam9g45/drivers/board.c

@@ -36,8 +36,8 @@
 extern int Image$$ER_ZI$$ZI$$Limit;
 #define HEAP_BEGIN  (&Image$$ER_ZI$$ZI$$Limit)
 #elif (defined (__GNUC__))
-extern unsigned char __bss_end__;
-#define HEAP_BEGIN  (&__bss_end__)
+extern unsigned char __bss_end;
+#define HEAP_BEGIN  (&__bss_end)
 #elif (defined (__ICCARM__))
 #pragma section=".noinit"
 #define HEAP_BEGIN  (__section_end(".noinit"))

bsp/at91sam9g45/link_scripts/at91sam9g45_ram.ld

@@ -1,6 +1,6 @@
 OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
 OUTPUT_ARCH(arm)
-ENTRY(start)
+ENTRY(system_vectors)
 SECTIONS
 {
     . = 0x70000000;
@@ -8,7 +8,7 @@ SECTIONS
     . = ALIGN(4);
     .text : 
     {
-        *(.init)
+        *(.vectors)
         *(.text)
         *(.gnu.linkonce.t*)
         
@@ -76,9 +76,9 @@ SECTIONS
     .nobss : { *(.nobss) }
     
     . = ALIGN(4);
-    __bss_start__ = .;
+    __bss_start = .;
     .bss : { *(.bss)}
-    __bss_end__ = .;
+    __bss_end = .;
 
     /* stabs debugging sections. */
     .stab 0 : { *(.stab) }

bsp/at91sam9g45/platform/interrupt.c

@@ -332,7 +332,7 @@ void rt_hw_interrupt_umask(int irq)
  * @return old handler
  */
 rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
-                                    void *param, char *name)
+                                    void *param, const char *name)
 {
     rt_isr_handler_t old_handler = RT_NULL;
 
@@ -419,6 +419,29 @@ void rt_hw_interrupt_ack(rt_uint32_t fiq_irq, rt_uint32_t id)
     AT91C_BASE_AIC->AIC_EOICR = 0x0;
 }
 
+void rt_interrupt_dispatch(rt_uint32_t fiq_irq)
+{
+    rt_isr_handler_t isr_func;
+    rt_uint32_t irq;
+    void *param;
+
+    /* get irq number */
+    irq = rt_hw_interrupt_get_active(fiq_irq);
+
+    /* get interrupt service routine */
+    isr_func = irq_desc[irq].handler;
+    param = irq_desc[irq].param;
+
+    /* turn to interrupt service routine */
+    isr_func(irq, param);
+
+    rt_hw_interrupt_ack(fiq_irq, irq);
+#ifdef RT_USING_INTERRUPT_INFO
+    irq_desc[irq].counter ++;
+#endif
+}
+
+
 #ifdef RT_USING_FINSH
 #ifdef RT_USING_INTERRUPT_INFO
 void list_irq(void)

bsp/at91sam9g45/rtconfig.py

@@ -10,7 +10,7 @@ if os.getenv('RTT_CC'):
 
 if  CROSS_TOOL == 'gcc':
 	PLATFORM 	= 'gcc'
-	EXEC_PATH = r'D:\arm-2013.11\bin'
+	EXEC_PATH = '/usr/bin'
 elif CROSS_TOOL == 'keil':
 	PLATFORM 	= 'armcc'
 	EXEC_PATH 	= 'C:/Keil_v5'

bsp/es32f0334/drivers/board.h

@@ -17,7 +17,7 @@
 #define ES32F0_SRAM_SIZE    0x8000
 #define ES32F0_SRAM_END     (0x20000000 + ES32F0_SRAM_SIZE)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
     extern int Image$$RW_IRAM1$$ZI$$Limit;
     #define HEAP_BEGIN  ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/es32f0334/drivers/drv_pm.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author        Notes
  * 2019-04-08     wangyq        the first version
+ * 2019-05-06     Zero-Free     adapt to the new power management interface
  */
 
 #include <rthw.h>
@@ -16,52 +17,26 @@
 
 #ifdef RT_USING_PM
 
-static void _drv_pm_enter(struct rt_pm *pm)
+static void _drv_pm_enter(struct rt_pm *pm, uint8_t mode)
 {
-    rt_uint32_t mode;
-
-    mode = pm->current_mode;
-
     switch (mode)
     {
-    case PM_RUN_MODE_NORMAL:
+    case PM_SLEEP_MODE_NONE:
         break;
 
-    case PM_SLEEP_MODE_SLEEP:
+    case PM_SLEEP_MODE_IDLE:
         __WFI();
         break;
 
-    case PM_SLEEP_MODE_TIMER:
-        pmu_stop2_enter();
-        break;
-
-    case PM_SLEEP_MODE_SHUTDOWN:
-        pmu_standby_enter(PMU_STANDBY_PORT_NONE);
-        break;
-
-    default:
-        RT_ASSERT(0);
-        break;
-    }
-}
-
-static void _drv_pm_exit(struct rt_pm *pm)
-{
-    rt_uint32_t mode;
-
-    RT_ASSERT(pm != RT_NULL);
-
-    mode = pm->current_mode;
-
-    switch (mode)
-    {
-    case PM_RUN_MODE_NORMAL:
+    case PM_SLEEP_MODE_LIGHT:
         break;
 
-    case PM_SLEEP_MODE_SLEEP:
+    case PM_SLEEP_MODE_DEEP:
+        pmu_stop2_enter();
         break;
 
-    case PM_SLEEP_MODE_TIMER:
+    case PM_SLEEP_MODE_STANDBY:
+        pmu_standby_enter(PMU_STANDBY_PORT_NONE);
         break;
 
     case PM_SLEEP_MODE_SHUTDOWN:
@@ -73,32 +48,21 @@ static void _drv_pm_exit(struct rt_pm *pm)
     }
 }
 
-#if PM_RUN_MODE_COUNT > 1
-static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency)
-{
-    return;
-}
-#endif
-
 static int drv_hw_pm_init(void)
 {
     static const struct rt_pm_ops _ops =
     {
         _drv_pm_enter,
-        _drv_pm_exit,
-
-#if PM_RUN_MODE_COUNT > 1
-        _drv_pm_frequency_change,
-#endif
+        RT_NULL,
         RT_NULL,
         RT_NULL,
         RT_NULL
     };
 
-    rt_uint8_t timer_mask;
+    rt_uint8_t timer_mask = 0;
 
-    /* initialize timer mask */
-    timer_mask = 1UL << PM_SLEEP_MODE_TIMER;
+    /* initialize timer mask(no need tickless) */
+    // timer_mask = 1UL << PM_SLEEP_MODE_DEEP;
 
     /* initialize system pm module */
     rt_system_pm_init(&_ops, timer_mask, RT_NULL);

bsp/es32f0654/drivers/board.h

@@ -17,7 +17,7 @@
 #define ES32F0_SRAM_SIZE    0x8000
 #define ES32F0_SRAM_END     (0x20000000 + ES32F0_SRAM_SIZE)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
     extern int Image$$RW_IRAM1$$ZI$$Limit;
     #define HEAP_BEGIN  ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/es32f0654/drivers/drv_pm.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author        Notes
  * 2019-04-01     wangyq        the first version
+ * 2019-05-06     Zero-Free     adapt to the new power management interface
  */
 
 #include <rthw.h>
@@ -16,52 +17,26 @@
 
 #ifdef RT_USING_PM
 
-static void _drv_pm_enter(struct rt_pm *pm)
+static void _drv_pm_enter(struct rt_pm *pm, uint8_t mode)
 {
-    rt_uint32_t mode;
-
-    mode = pm->current_mode;
-
     switch (mode)
     {
-    case PM_RUN_MODE_NORMAL:
+    case PM_SLEEP_MODE_NONE:
         break;
 
-    case PM_SLEEP_MODE_SLEEP:
+    case PM_SLEEP_MODE_IDLE:
         __WFI();
         break;
 
-    case PM_SLEEP_MODE_TIMER:
-        pmu_stop2_enter();
-        break;
-
-    case PM_SLEEP_MODE_SHUTDOWN:
-        pmu_standby_enter(PMU_STANDBY_PORT_NONE);
-        break;
-
-    default:
-        RT_ASSERT(0);
-        break;
-    }
-}
-
-static void _drv_pm_exit(struct rt_pm *pm)
-{
-    rt_uint32_t mode;
-
-    RT_ASSERT(pm != RT_NULL);
-
-    mode = pm->current_mode;
-
-    switch (mode)
-    {
-    case PM_RUN_MODE_NORMAL:
+    case PM_SLEEP_MODE_LIGHT:
         break;
 
-    case PM_SLEEP_MODE_SLEEP:
+    case PM_SLEEP_MODE_DEEP:
+        pmu_stop2_enter();
         break;
 
-    case PM_SLEEP_MODE_TIMER:
+    case PM_SLEEP_MODE_STANDBY:
+        pmu_standby_enter(PMU_STANDBY_PORT_NONE);
         break;
 
     case PM_SLEEP_MODE_SHUTDOWN:
@@ -73,32 +48,21 @@ static void _drv_pm_exit(struct rt_pm *pm)
     }
 }
 
-#if PM_RUN_MODE_COUNT > 1
-static void _drv_pm_frequency_change(struct rt_pm *pm, rt_uint32_t frequency)
-{
-    return;
-}
-#endif
-
 static int drv_hw_pm_init(void)
 {
     static const struct rt_pm_ops _ops =
     {
         _drv_pm_enter,
-        _drv_pm_exit,
-
-#if PM_RUN_MODE_COUNT > 1
-        _drv_pm_frequency_change,
-#endif
+        RT_NULL,
         RT_NULL,
         RT_NULL,
         RT_NULL
     };
 
-    rt_uint8_t timer_mask;
+    rt_uint8_t timer_mask = 0;
 
-    /* initialize timer mask */
-    timer_mask = 1UL << PM_SLEEP_MODE_TIMER;
+    /* initialize timer mask(no need tickless) */
+    timer_mask = 1UL << PM_SLEEP_MODE_DEEP;
 
     /* initialize system pm module */
     rt_system_pm_init(&_ops, timer_mask, RT_NULL);

bsp/gd32e230k-start/drivers/board.h

@@ -25,7 +25,7 @@ extern char __ICFEDIT_region_RAM_end__;
 #define GD32_SRAM_END          (0x20000000 + GD32_SRAM_SIZE * 1024)
 #endif
 
-#ifdef __ARMCC_VERSION
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/k210/.config

@@ -7,6 +7,7 @@
 # RT-Thread Kernel
 #
 CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 CONFIG_RT_USING_SMP=y
 CONFIG_RT_CPUS_NR=2
 CONFIG_RT_ALIGN_SIZE=8
@@ -19,7 +20,7 @@ CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
-CONFIG_IDLE_THREAD_STACK_SIZE=1024
+CONFIG_IDLE_THREAD_STACK_SIZE=4096
 # CONFIG_RT_USING_TIMER_SOFT is not set
 CONFIG_RT_DEBUG=y
 CONFIG_RT_DEBUG_COLOR=y
@@ -43,7 +44,7 @@ CONFIG_RT_USING_MUTEX=y
 CONFIG_RT_USING_EVENT=y
 CONFIG_RT_USING_MAILBOX=y
 CONFIG_RT_USING_MESSAGEQUEUE=y
-# CONFIG_RT_USING_SIGNALS is not set
+CONFIG_RT_USING_SIGNALS=y
 
 #
 # Memory Management
@@ -139,6 +140,7 @@ CONFIG_RT_USING_DFS_DEVFS=y
 #
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
@@ -202,6 +204,11 @@ CONFIG_RT_USING_POSIX=y
 #
 # CONFIG_RT_USING_SAL is not set
 
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
 #
 # light weight TCP/IP stack
 #
@@ -225,7 +232,6 @@ CONFIG_RT_USING_POSIX=y
 #
 # Utilities
 #
-# CONFIG_RT_USING_LOGTRACE is not set
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
@@ -267,6 +273,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
 
 #
@@ -279,6 +286,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_TENCENT_IOTKIT is not set
 # CONFIG_PKG_USING_NIMBLE is not set
 # CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
 
 #
 # security packages
@@ -299,6 +307,7 @@ CONFIG_RT_USING_POSIX=y
 #
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
 
 #
 # tools packages
@@ -327,39 +336,34 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
 
 #
 # peripheral libraries and drivers
 #
-
-#
-# sensors drivers
-#
-# CONFIG_PKG_USING_LSM6DSL is not set
-# CONFIG_PKG_USING_LPS22HB is not set
-# CONFIG_PKG_USING_HTS221 is not set
-# CONFIG_PKG_USING_LSM303AGR is not set
-# CONFIG_PKG_USING_BME280 is not set
-# CONFIG_PKG_USING_BMA400 is not set
-# CONFIG_PKG_USING_BMI160_BMX160 is not set
-# CONFIG_PKG_USING_SPL0601 is not set
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
-# CONFIG_PKG_USING_AHT10 is not set
 # CONFIG_PKG_USING_AP3216C is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
-# CONFIG_PKG_USING_MPU6XXX is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
-# CONFIG_PKG_USING_SIGNAL_LED is not set
 CONFIG_PKG_USING_KENDRYTE_SDK=y
 CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk"
-CONFIG_PKG_USING_KENDRYTE_SDK_V052=y
+# CONFIG_PKG_USING_KENDRYTE_SDK_V052 is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK_V053 is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK_V054 is not set
+CONFIG_PKG_USING_KENDRYTE_SDK_V055=y
 # CONFIG_PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set
-CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.2"
+CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.5"
+CONFIG_PKG_KENDRYTE_SDK_VERNUM=0x0055
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
 
 #
 # miscellaneous packages
@@ -385,6 +389,34 @@ CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.2"
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
+
+#
+# Privated Packages of RealThread
+#
+# CONFIG_PKG_USING_CODEC is not set
+# CONFIG_PKG_USING_PLAYER is not set
+# CONFIG_PKG_USING_MPLAYER is not set
+# CONFIG_PKG_USING_PERSIMMON_SRC is not set
+# CONFIG_PKG_USING_JS_PERSIMMON is not set
+# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
+
+#
+# Network Utilities
+#
+# CONFIG_PKG_USING_WICED is not set
+# CONFIG_PKG_USING_CLOUDSDK is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_POWER_MANAGER is not set
+# CONFIG_PKG_USING_RT_OTA is not set
+# CONFIG_PKG_USING_RDBD_SRC is not set
+# CONFIG_PKG_USING_RTINSIGHT is not set
+# CONFIG_PKG_USING_SMARTCONFIG is not set
+# CONFIG_PKG_USING_RTX is not set
+# CONFIG_RT_USING_TESTCASE is not set
+# CONFIG_PKG_USING_NGHTTP2 is not set
+# CONFIG_PKG_USING_AVS is not set
+# CONFIG_PKG_USING_STS is not set
+# CONFIG_PKG_USING_DLMS is not set
 CONFIG_BOARD_K210_EVB=y
 CONFIG_BSP_USING_UART_HS=y
 # CONFIG_BSP_USING_UART1 is not set

bsp/k210/driver/board.h

@@ -11,6 +11,12 @@
 #ifndef BOARD_H__
 #define BOARD_H__
 
+#include <rtconfig.h>
+
+#if PKG_KENDRYTE_SDK_VERNUM < 0x0054
+#error The version of Kendryte sdk is too old, please update to V0.5.4 or newer
+#endif
+
 extern unsigned int __bss_start;
 extern unsigned int __bss_end;
 

bsp/k210/rtconfig.h

@@ -7,6 +7,7 @@
 /* RT-Thread Kernel */
 
 #define RT_NAME_MAX 8
+/* RT_USING_ARCH_DATA_TYPE is not set */
 #define RT_USING_SMP
 #define RT_CPUS_NR 2
 #define RT_ALIGN_SIZE 8
@@ -19,7 +20,7 @@
 #define RT_USING_HOOK
 #define RT_USING_IDLE_HOOK
 #define RT_IDEL_HOOK_LIST_SIZE 4
-#define IDLE_THREAD_STACK_SIZE 1024
+#define IDLE_THREAD_STACK_SIZE 4096
 /* RT_USING_TIMER_SOFT is not set */
 #define RT_DEBUG
 #define RT_DEBUG_COLOR
@@ -42,7 +43,7 @@
 #define RT_USING_EVENT
 #define RT_USING_MAILBOX
 #define RT_USING_MESSAGEQUEUE
-/* RT_USING_SIGNALS is not set */
+#define RT_USING_SIGNALS
 
 /* Memory Management */
 
@@ -130,6 +131,7 @@
 
 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
+/* RT_USING_SYSTEM_WORKQUEUE is not set */
 #define RT_USING_SERIAL
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 64
@@ -187,6 +189,10 @@
 
 /* RT_USING_SAL is not set */
 
+/* Network interface device */
+
+/* RT_USING_NETDEV is not set */
+
 /* light weight TCP/IP stack */
 
 /* RT_USING_LWIP is not set */
@@ -205,7 +211,6 @@
 
 /* Utilities */
 
-/* RT_USING_LOGTRACE is not set */
 /* RT_USING_RYM is not set */
 /* RT_USING_ULOG is not set */
 /* RT_USING_UTEST is not set */
@@ -240,6 +245,7 @@
 /* PKG_USING_NOPOLL is not set */
 /* PKG_USING_NETUTILS is not set */
 /* PKG_USING_AT_DEVICE is not set */
+/* PKG_USING_ATSRV_SOCKET is not set */
 /* PKG_USING_WIZNET is not set */
 
 /* IoT Cloud */
@@ -251,6 +257,7 @@
 /* PKG_USING_TENCENT_IOTKIT is not set */
 /* PKG_USING_NIMBLE is not set */
 /* PKG_USING_OTA_DOWNLOADER is not set */
+/* PKG_USING_IPMSG is not set */
 
 /* security packages */
 
@@ -268,6 +275,7 @@
 
 /* PKG_USING_OPENMV is not set */
 /* PKG_USING_MUPDF is not set */
+/* PKG_USING_STEMWIN is not set */
 
 /* tools packages */
 
@@ -294,34 +302,31 @@
 /* PKG_USING_CMSIS is not set */
 /* PKG_USING_DFS_YAFFS is not set */
 /* PKG_USING_LITTLEFS is not set */
+/* PKG_USING_THREAD_POOL is not set */
 
 /* peripheral libraries and drivers */
 
-/* sensors drivers */
-
-/* PKG_USING_LSM6DSL is not set */
-/* PKG_USING_LPS22HB is not set */
-/* PKG_USING_HTS221 is not set */
-/* PKG_USING_LSM303AGR is not set */
-/* PKG_USING_BME280 is not set */
-/* PKG_USING_BMA400 is not set */
-/* PKG_USING_BMI160_BMX160 is not set */
-/* PKG_USING_SPL0601 is not set */
+/* PKG_USING_SENSORS_DRIVERS is not set */
 /* PKG_USING_REALTEK_AMEBA is not set */
 /* PKG_USING_SHT2X is not set */
-/* PKG_USING_AHT10 is not set */
 /* PKG_USING_AP3216C is not set */
 /* PKG_USING_STM32_SDIO is not set */
 /* PKG_USING_ICM20608 is not set */
 /* PKG_USING_U8G2 is not set */
 /* PKG_USING_BUTTON is not set */
-/* PKG_USING_MPU6XXX is not set */
 /* PKG_USING_PCF8574 is not set */
 /* PKG_USING_SX12XX is not set */
-/* PKG_USING_SIGNAL_LED is not set */
 #define PKG_USING_KENDRYTE_SDK
-#define PKG_USING_KENDRYTE_SDK_V052
+/* PKG_USING_KENDRYTE_SDK_V052 is not set */
+/* PKG_USING_KENDRYTE_SDK_V053 is not set */
+/* PKG_USING_KENDRYTE_SDK_V054 is not set */
+#define PKG_USING_KENDRYTE_SDK_V055
 /* PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set */
+#define PKG_KENDRYTE_SDK_VERNUM 0x0055
+/* PKG_USING_INFRARED is not set */
+/* PKG_USING_ROSSERIAL is not set */
+/* PKG_USING_AT24CXX is not set */
+/* PKG_USING_MOTIONDRIVER2RTT is not set */
 
 /* miscellaneous packages */
 
@@ -345,6 +350,32 @@
 /* PKG_USING_PERIPHERAL_SAMPLES is not set */
 /* PKG_USING_HELLO is not set */
 /* PKG_USING_VI is not set */
+
+/* Privated Packages of RealThread */
+
+/* PKG_USING_CODEC is not set */
+/* PKG_USING_PLAYER is not set */
+/* PKG_USING_MPLAYER is not set */
+/* PKG_USING_PERSIMMON_SRC is not set */
+/* PKG_USING_JS_PERSIMMON is not set */
+/* PKG_USING_JERRYSCRIPT_WIN32 is not set */
+
+/* Network Utilities */
+
+/* PKG_USING_WICED is not set */
+/* PKG_USING_CLOUDSDK is not set */
+/* PKG_USING_COREMARK is not set */
+/* PKG_USING_POWER_MANAGER is not set */
+/* PKG_USING_RT_OTA is not set */
+/* PKG_USING_RDBD_SRC is not set */
+/* PKG_USING_RTINSIGHT is not set */
+/* PKG_USING_SMARTCONFIG is not set */
+/* PKG_USING_RTX is not set */
+/* RT_USING_TESTCASE is not set */
+/* PKG_USING_NGHTTP2 is not set */
+/* PKG_USING_AVS is not set */
+/* PKG_USING_STS is not set */
+/* PKG_USING_DLMS is not set */
 #define BOARD_K210_EVB
 #define BSP_USING_UART_HS
 /* BSP_USING_UART1 is not set */

bsp/k210/rtconfig.py

@@ -15,7 +15,7 @@ if os.getenv('RTT_CC'):
 
 if  CROSS_TOOL == 'gcc':
     PLATFORM    = 'gcc'
-    EXEC_PATH   = r'/opt/riscv64-unknown-elf/bin'
+    EXEC_PATH   = r'/opt/gnu-mcu-eclipse/riscv-none-gcc/8.2.0-2.1-20190425-1021/bin'
 else:
     print('Please make sure your toolchains is GNU GCC!')
     exit(0)
@@ -38,8 +38,8 @@ if PLATFORM == 'gcc':
     OBJDUMP = PREFIX + 'objdump'
     OBJCPY  = PREFIX + 'objcopy'
 
-    DEVICE  = ' -mcmodel=medany'
-    CFLAGS  = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields '
+    DEVICE  = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64d'
+    CFLAGS  = DEVICE + ' -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
     AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp'
     LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds'
     CPATH   = ''

bsp/lpc1114/.config

@@ -0,0 +1,295 @@
+#
+# Automatically generated file; DO NOT EDIT.
+# RT-Thread Configuration
+#
+
+#
+# RT-Thread Kernel
+#
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_ALIGN_SIZE=4
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=100
+# CONFIG_RT_USING_OVERFLOW_CHECK is not set
+# CONFIG_RT_USING_HOOK is not set
+# CONFIG_RT_USING_IDLE_HOOK is not set
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+# CONFIG_RT_USING_TIMER_SOFT is not set
+# CONFIG_RT_DEBUG is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_SIGNALS is not set
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+# CONFIG_RT_USING_MEMHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+CONFIG_RT_USING_HEAP=y
+
+#
+# Kernel Device Object
+#
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart"
+CONFIG_RT_VER_NUM=0x40001
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M0=y
+# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=512
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+
+#
+# C++ features
+#
+# CONFIG_RT_USING_CPLUSPLUS is not set
+
+#
+# Command shell
+#
+# CONFIG_RT_USING_FINSH is not set
+
+#
+# Device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+
+#
+# Device Drivers
+#
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_PIPE_BUFSZ=128
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CPUTIME is not set
+# CONFIG_RT_USING_I2C is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_MTD is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+# CONFIG_RT_USING_SPI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+
+#
+# Using WiFi
+#
+# CONFIG_RT_USING_WIFI is not set
+
+#
+# Using USB
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+
+#
+# POSIX layer and C standard library
+#
+CONFIG_RT_USING_LIBC=y
+# CONFIG_RT_USING_PTHREADS is not set
+
+#
+# Network
+#
+
+#
+# Socket abstraction layer
+#
+# CONFIG_RT_USING_SAL is not set
+
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
+#
+# light weight TCP/IP stack
+#
+# CONFIG_RT_USING_LWIP is not set
+
+#
+# Modbus master and slave stack
+#
+# CONFIG_RT_USING_MODBUS is not set
+
+#
+# AT commands
+#
+# CONFIG_RT_USING_AT is not set
+
+#
+# VBUS(Virtual Software BUS)
+#
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_EZXML is not set
+# CONFIG_PKG_USING_NANOPB is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_libsodium is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+
+#
+# language packages
+#
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+
+#
+# multimedia packages
+#
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+
+#
+# system packages
+#
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
+# CONFIG_PKG_USING_CMSIS is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+
+#
+# peripheral libraries and drivers
+#
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_AHT10 is not set
+# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+
+#
+# miscellaneous packages
+#
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_DSTR is not set
+
+#
+# sample package
+#
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+
+#
+# example package: hello
+#
+# CONFIG_PKG_USING_HELLO is not set
+CONFIG_SOC_LPC1114=y

bsp/lpc1114/Kconfig

@@ -0,0 +1,29 @@
+mainmenu "RT-Thread Configuration"
+
+config BSP_DIR
+    string
+    option env="BSP_ROOT"
+    default "."
+
+config RTT_DIR
+    string
+    option env="RTT_ROOT"
+    default "../.."
+
+# you can change the RTT_ROOT default "../.." to your rtthread_root,
+# example : default "F:/git_repositories/rt-thread"
+
+config PKGS_DIR
+    string
+    option env="PKGS_ROOT"
+    default "packages"
+
+source "$RTT_DIR/Kconfig"
+source "$PKGS_DIR/Kconfig"
+
+config SOC_LPC1114
+    bool 
+    select ARCH_ARM_CORTEX_M0
+    default y
+
+#source "$BSP_DIR/drivers/Kconfig"

bsp/lpc1114/SConscript

@@ -0,0 +1,14 @@
+# for module compiling
+import os
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/lpc1114/SConstruct

@@ -0,0 +1,27 @@
+import os
+import sys
+import rtconfig
+
+from rtconfig import RTT_ROOT
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
+    CXX = rtconfig.CC, CXXFLAGS = rtconfig.CXXFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/lpc1114/applications/SConscript

@@ -0,0 +1,9 @@
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c')
+CPPPATH = [cwd, str(Dir('#'))]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/lpc1114/applications/main.c

@@ -0,0 +1,56 @@
+/*
+ * Copyright (c) 2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-05     jg1uaa       the first version
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+/* for Z111xP board (LED is connected to PIO3_5, low=ON) */
+#define IOCON_PIO3_5    HWREG32(0x40044048)
+#define GPIO3DIR        HWREG32(0x50038000)
+#define GPIO3DATA_5     HWREG32(0x50030080)
+
+static void led_off(void)
+{
+    GPIO3DATA_5 = 0x20;
+}
+
+static void led_on(void)
+{
+    GPIO3DATA_5 = 0x00;
+}
+
+static void led_setup(void)
+{
+    IOCON_PIO3_5 = 0xd0;        // (default)
+    GPIO3DIR = 0x20;            // select output
+    led_off();
+}
+
+static void led_demo(void)
+{
+    led_setup();
+
+    while (1) {
+        led_on();
+        rt_thread_delay(50);    // 500msec, tick@100Hz
+        led_off();
+        rt_thread_delay(50);
+    }
+}
+
+int main(int argc, char **argv)
+{
+    rt_kprintf("Hello, world!\n");
+
+    led_demo();
+
+    /* NOTREACHED */
+    return 0;
+}

bsp/lpc1114/driver/SConscript

@@ -0,0 +1,16 @@
+from building import *
+
+cwd  = GetCurrentDir()
+src  = Glob('*.[cs]')
+list = os.listdir(cwd)
+CPPPATH = [cwd]
+objs = []
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+objs = objs + group
+Return('objs')

bsp/lpc1114/driver/board.c

@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-05     jg1uaa       the first version
+ */
+
+#include <rtthread.h>
+#include <rthw.h>
+
+#include "board.h"
+#include "drv_uart.h"
+
+#define SYSCON_BASE     0x40048000
+#define MEMMAP          HWREG32(SYSCON_BASE + 0x000)
+#define SYSPLLCTRL      HWREG32(SYSCON_BASE + 0x008)
+#define SYSPLLSTAT      HWREG32(SYSCON_BASE + 0x00c)
+#define SYSPLLCLKSEL    HWREG32(SYSCON_BASE + 0x040)
+#define SYSPLLCLKUEN    HWREG32(SYSCON_BASE + 0x044)
+#define MAINCLKSEL      HWREG32(SYSCON_BASE + 0x070)
+#define MAINCLKUEN      HWREG32(SYSCON_BASE + 0x074)
+#define AHBCLKCTRL      HWREG32(SYSCON_BASE + 0x080)
+#define PDRUNCFG        HWREG32(SYSCON_BASE + 0x238)
+
+#define SCB_BASE        0xe000e000
+#define SYST_CSR        HWREG32(SCB_BASE + 0x010)
+#define SYST_RVR        HWREG32(SCB_BASE + 0x014)
+#define NVIC_ISER       HWREG32(SCB_BASE + 0x100)
+#define NVIC_ICER       HWREG32(SCB_BASE + 0x180)
+#define NVIC_ISPR       HWREG32(SCB_BASE + 0x200)
+#define NVIC_ICPR       HWREG32(SCB_BASE + 0x280)
+#define NVIC_IPR(irqno) HWREG32(SCB_BASE + 0x400 + (((irqno) / 4) << 2))
+#define SCB_SHPR3       HWREG32(SCB_BASE + 0xd20) 
+
+extern unsigned char __bss_end__[];
+extern unsigned char _ram_end[];
+
+/**
+ * This is the timer interrupt service routine.
+ */
+void SysTick_Handler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    rt_tick_increase();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+void os_clock_init(void)
+{
+    /* bump up system clock 12MHz to 48MHz, using IRC (internal RC) osc. */
+
+    MAINCLKSEL = 0;             // main clock: IRC @12MHz (default, for safety)
+    MAINCLKUEN = 0;
+    MAINCLKUEN = 1;
+
+    PDRUNCFG &= ~0x80;           // power up System PLL
+
+    SYSPLLCLKSEL = 0;           // PLL clock source: IRC osc
+    SYSPLLCLKUEN = 0;
+    SYSPLLCLKUEN = 1;
+
+    SYSPLLCTRL = 0x23;          // Fcco = 2 x P x FCLKOUT
+                                //  192MHz = 2 x 2 x 48MHz
+                                // M = FCLKOUT / FCLKIN
+                                //  4 = 48MHz / 12MHz
+
+    while (!(SYSPLLSTAT & 1));  // wait for lock PLL
+
+    MAINCLKSEL = 3;             // main clock: system PLL
+    MAINCLKUEN = 0;
+    MAINCLKUEN = 1;
+
+    AHBCLKCTRL |= (1 << 16);    // power up IOCON
+}
+
+void SysTick_init(void)
+{
+    rt_uint32_t shpr3;
+
+    /* set SysTick interrupt priority */
+    shpr3 = SCB_SHPR3;
+    shpr3 &= ~0xff000000;
+    shpr3 |= 0x40 << 24;
+    SCB_SHPR3 = shpr3;
+
+    /* start SysTick */
+    SYST_CSR = 0x06;    // Clock source:Core, SysTick Exception:enable
+    SYST_RVR = (CPU_CLOCK / RT_TICK_PER_SECOND) - 1;
+    SYST_CSR = 0x07;    // Counter:enable
+}
+
+/**
+ * This function initializes LPC1114 SoC.
+ */
+void rt_hw_board_init(void)
+{
+    os_clock_init();
+
+    /* init SysTick */
+    SysTick_init();
+
+#ifdef RT_USING_HEAP
+    /* initialize system heap */
+    rt_system_heap_init((void *)&__bss_end__, (void *)&_ram_end);
+#endif
+    /* initialize uart */
+    rt_hw_uart_init();
+
+#ifdef RT_USING_CONSOLE
+    /* set console device */
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+#endif
+
+#ifdef RT_USING_COMPONENTS_INIT
+    rt_components_board_init();
+#endif
+}
+
+/**
+ * Enable External Interrupt
+ */
+void NVIC_EnableIRQ(rt_int32_t irqno)
+{
+    NVIC_ISER = 1UL << (irqno & 0x1f);
+}
+
+/**
+ * Disable External Interrupt
+ */
+void NVIC_DisableIRQ(rt_int32_t irqno)
+{
+    NVIC_ICER = 1UL << (irqno & 0x1f);
+}
+
+/**
+ * Get Pending Interrupt
+ *      Different from CMSIS implementation,
+ *      returns zero/non-zero, not zero/one.
+ */
+rt_uint32_t NVIC_GetPendingIRQ(rt_int32_t irqno)
+{
+    return NVIC_ISPR & (1UL << (irqno & 0x1f));
+}
+
+/**
+ * Set Pending Interrupt
+ */
+void NVIC_SetPendingIRQ(rt_int32_t irqno)
+{
+    NVIC_ISPR = 1UL << (irqno & 0x1f);
+}
+
+/**
+ * Clear Pending Interrupt
+ */
+void NVIC_ClearPendingIRQ(rt_int32_t irqno)
+{
+    NVIC_ICPR = 1UL << (irqno & 0x1f);
+}
+
+/**
+ * Set Interrupt Priority
+ *      Different from CMSIS implementation,
+ *      this code supports only external (device specific) interrupt.
+ */
+void NVIC_SetPriority(rt_int32_t irqno, rt_uint32_t priority)
+{
+    rt_uint32_t shift, ipr;
+
+    shift = (irqno % 4) * 8;
+    ipr = NVIC_IPR(irqno);
+    ipr &= ~(0xffUL << shift);
+    ipr |= (priority & 0xff) << shift;
+    NVIC_IPR(irqno) = ipr;
+}

bsp/lpc1114/driver/board.h

@@ -0,0 +1,25 @@
+/*
+ * Copyright (c) 2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-05     jg1uaa       the first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#define CPU_CLOCK       48000000        // Hz
+
+void rt_hw_board_init(void);
+
+void NVIC_EnableIRQ(rt_int32_t irqno);
+void NVIC_DisableIRQ(rt_int32_t irqno);
+rt_uint32_t NVIC_GetPendingIRQ(rt_int32_t irqno);
+void NVIC_SetPendingIRQ(rt_int32_t irqno);
+void NVIC_ClearPendingIRQ(rt_int32_t irqno);
+void NVIC_SetPriority(rt_int32_t irqno, rt_uint32_t priority);
+
+#endif /* __BOARD_H__ */

bsp/lpc1114/driver/drv_uart.c

@@ -0,0 +1,177 @@
+/*
+ * Copyright (c) 2006-2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2013-05-18     Bernard      The first version for LPC40xx
+ * 2019-05-05     jg1uaa       port to LPC1114
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <rthw.h>
+#include "board.h"      // CPU_CLOCK
+#include "drv_uart.h"
+
+#ifdef RT_USING_SERIAL
+
+#define UART_BASE       0x40008000              // UART (only one)
+#define UART_IRQ        21
+#define UART_CLOCK      (CPU_CLOCK / 1)         // Hz
+
+#define URBR            HWREG32(UART_BASE + 0x00)       // R-
+#define UTHR            HWREG32(UART_BASE + 0x00)       // -W
+#define UIER            HWREG32(UART_BASE + 0x04)       // RW
+#define UIIR            HWREG32(UART_BASE + 0x08)       // R-
+#define UFCR            HWREG32(UART_BASE + 0x08)       // -W
+#define ULCR            HWREG32(UART_BASE + 0x0c)       // RW
+#define UMCR            HWREG32(UART_BASE + 0x10)       // RW
+#define ULSR            HWREG32(UART_BASE + 0x14)       // R-
+#define UMSR            HWREG32(UART_BASE + 0x18)       // R-
+
+#define UDLL            HWREG32(UART_BASE + 0x00)       // RW
+#define UDLM            HWREG32(UART_BASE + 0x04)       // RW
+
+#define IOCONFIG_BASE   0x40044000
+#define IOCON_PIO1_6    HWREG32(IOCONFIG_BASE + 0xa4)
+#define IOCON_PIO1_7    HWREG32(IOCONFIG_BASE + 0xa8)
+
+#define SYSCON_BASE     0x40048000
+#define AHBCLKCTRL      HWREG32(SYSCON_BASE + 0x80)
+#define UARTCLKDIV      HWREG32(SYSCON_BASE + 0x98)
+
+static rt_err_t lpc_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
+{
+    rt_uint32_t Fdiv = 0;
+
+    RT_ASSERT(serial != RT_NULL);
+
+    /* Initialize UART Configuration parameter structure to default state:
+     * Baudrate = 115200 bps
+     * 8 data bit
+     * 1 Stop bit
+     * None parity
+     */
+    /* set DLAB=1 */
+    ULCR |= 0x80;
+    /* config uart baudrate */
+    Fdiv = UART_CLOCK / (cfg->baud_rate * 16);
+    UDLM = Fdiv / 256;
+    UDLL = Fdiv % 256;
+    /* set DLAB=0 */
+    ULCR &= ~0x80;
+    /* config to 8 data bit,1 Stop bit,None parity */
+    ULCR |= 0x03;
+
+    /*enable and reset FIFO*/
+    UFCR = 0x07;
+
+    return RT_EOK;
+}
+
+static rt_err_t lpc_control(struct rt_serial_device *serial, int cmd, void *arg)
+{
+    RT_ASSERT(serial != RT_NULL);
+
+    switch (cmd)
+    {
+    case RT_DEVICE_CTRL_CLR_INT:
+        /* disable rx irq */
+        UIER &= ~0x01;
+        break;
+    case RT_DEVICE_CTRL_SET_INT:
+        /* enable rx irq */
+        UIER |= 0x01;
+        break;
+    }
+
+    return RT_EOK;
+}
+
+static int lpc_putc(struct rt_serial_device *serial, char c)
+{
+    while (!(ULSR & 0x20));
+    UTHR = c;
+
+    return 1;
+}
+
+static int lpc_getc(struct rt_serial_device *serial)
+{
+    if (ULSR & 0x01)
+        return URBR;
+    else
+        return -1;
+}
+
+static const struct rt_uart_ops lpc_uart_ops =
+{
+    lpc_configure,
+    lpc_control,
+    lpc_putc,
+    lpc_getc,
+};
+
+struct rt_serial_device serial;
+
+void UART_IRQHandler(void)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    switch (UIIR & 0x0e)
+    {
+    case 0x04:
+    case 0x0C:
+        rt_hw_serial_isr(&serial, RT_SERIAL_EVENT_RX_IND);
+        break;
+    case 0x06:
+        (void)ULSR;
+        break;
+    default:
+        (void)ULSR;
+        break;
+    }
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+int rt_hw_uart_init(void)
+{
+    rt_err_t ret = RT_EOK;
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+    serial.ops    = &lpc_uart_ops;
+    serial.config = config;
+    serial.parent.user_data = NULL;
+
+    /*
+     * Initialize UART pin connect
+     * P1.6: U0_RXD
+     * P1.7: U0_TXD
+     */
+    IOCON_PIO1_6 = 0xc1;
+    IOCON_PIO1_7 = 0xc1;
+
+    /* setup the uart power and clock */
+    UARTCLKDIV = 0x01;          // UART PCLK = system clock / 1
+    AHBCLKCTRL |= (1 << 12);    // UART power-up
+
+    /* priority = 1 */
+    NVIC_SetPriority(UART_IRQ, 0x01 << 6);
+
+    /* Enable Interrupt for UART channel */
+    NVIC_EnableIRQ(UART_IRQ);
+
+    /* register UART device */
+    ret = rt_hw_serial_register(&serial, "uart",
+                                RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_STREAM,
+                                NULL);
+
+    return ret;
+}
+INIT_BOARD_EXPORT(rt_hw_uart_init);
+
+#endif /* RT_USING_SERIAL */

bsp/lpc1114/driver/drv_uart.h

@@ -0,0 +1,16 @@
+/*
+ * Copyright (c) 2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-05     jg1uaa       the first version
+ */
+
+#ifndef __DRV_UART_H__
+#define __DRV_UART_H__
+
+int rt_hw_uart_init(void);
+
+#endif

bsp/lpc1114/driver/startup_gcc.s

@@ -0,0 +1,130 @@
+/*
+ * Copyright (c) 2019, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-05     jg1uaa       the first version
+ */
+
+#include "../rtconfig.h"
+
+/* Interrupt Vectors */
+        .section .isr_vector
+        .thumb
+        .align 0
+
+        .long   _estack                 // MSP default value
+        .long   Reset_Handler + 1       //  1: Reset
+        .long   default_handler + 1     //  2: NMI
+        .long   HardFault_Handler + 1   //  3: HardFault
+        .long   default_handler + 1     //  4: reserved
+        .long   default_handler + 1     //  5: reserved
+        .long   default_handler + 1     //  6: reserved
+        .long   default_handler + 1     //  7: reserved
+        .long   default_handler + 1     //  8: reserved
+        .long   default_handler + 1     //  9: reserved
+        .long   default_handler + 1     // 10: reserved
+        .long   default_handler + 1     // 11: SVCall
+        .long   default_handler + 1     // 12: reserved
+        .long   default_handler + 1     // 13: reserved
+        .long   PendSV_Handler + 1     // 14: PendSV
+        .long   SysTick_Handler + 1     // 15: SysTick
+        .long   default_handler + 1     // 16: External Interrupt(0)
+        .long   default_handler + 1     // 17: External Interrupt(1)
+        .long   default_handler + 1     // 18: External Interrupt(2)
+        .long   default_handler + 1     // 19: External Interrupt(3)
+        .long   default_handler + 1     // 20: External Interrupt(4)
+        .long   default_handler + 1     // 21: External Interrupt(5)
+        .long   default_handler + 1     // 22: External Interrupt(6)
+        .long   default_handler + 1     // 23: External Interrupt(7)
+        .long   default_handler + 1     // 24: External Interrupt(8)
+        .long   default_handler + 1     // 25: External Interrupt(9)
+        .long   default_handler + 1     // 26: External Interrupt(10)
+        .long   default_handler + 1     // 27: External Interrupt(11)
+        .long   default_handler + 1     // 28: External Interrupt(12)
+        .long   default_handler + 1     // 29: External Interrupt(13) C_CAN
+        .long   default_handler + 1     // 30: External Interrupt(14) SPI/SSP1
+        .long   default_handler + 1     // 31: External Interrupt(15) I2C
+        .long   default_handler + 1     // 32: External Interrupt(16) CT16B0
+        .long   default_handler + 1     // 33: External Interrupt(17) CT16B1
+        .long   default_handler + 1     // 34: External Interrupt(18) CT32B0
+        .long   default_handler + 1     // 35: External Interrupt(19) CT32B1
+        .long   default_handler + 1     // 36: External Interrupt(20) SPI/SSP0
+        .long   UART_IRQHandler + 1     // 37: External Interrupt(21) UART
+        .long   default_handler + 1     // 38: External Interrupt(22)
+        .long   default_handler + 1     // 39: External Interrupt(23)
+        .long   default_handler + 1     // 40: External Interrupt(24) ADC
+        .long   default_handler + 1     // 41: External Interrupt(25) WDT
+        .long   default_handler + 1     // 42: External Interrupt(26) BOD
+        .long   default_handler + 1     // 43: External Interrupt(27)
+        .long   default_handler + 1     // 44: External Interrupt(28) PIO_3
+        .long   default_handler + 1     // 45: External Interrupt(29) PIO_2
+        .long   default_handler + 1     // 46: External Interrupt(30) PIO_1
+        .long   default_handler + 1     // 47: External Interrupt(31) PIO_0
+        .long   default_handler + 1     // 48: External Interrupt(32)
+        .long   default_handler + 1     // 49: External Interrupt(33)
+        .long   default_handler + 1     // 50: External Interrupt(34)
+        .long   default_handler + 1     // 51: External Interrupt(35)
+        .long   default_handler + 1     // 52: External Interrupt(36)
+        .long   default_handler + 1     // 53: External Interrupt(37)
+        .long   default_handler + 1     // 54: External Interrupt(38)
+        .long   default_handler + 1     // 55: External Interrupt(39)
+        .long   default_handler + 1     // 56: External Interrupt(40)
+        .long   default_handler + 1     // 57: External Interrupt(41)
+        .long   default_handler + 1     // 58: External Interrupt(42)
+        .long   default_handler + 1     // 59: External Interrupt(43)
+        .long   default_handler + 1     // 60: External Interrupt(44)
+        .long   default_handler + 1     // 61: External Interrupt(45)
+        .long   default_handler + 1     // 62: External Interrupt(46)
+        .long   default_handler + 1     // 63: External Interrupt(47)
+
+/* startup */
+        .section .text
+        .thumb
+        .align 0
+        .global Reset_Handler
+Reset_Handler:
+
+        /* initialize .data */
+data_init:
+        ldr     r1, =_sidata
+        ldr     r2, =_sdata
+        ldr     r3, =_edata
+        cmp     r2, r3
+        beq     bss_init
+data_loop:
+        ldrb    r0, [r1]
+        add     r1, r1, #1
+        strb    r0, [r2]
+        add     r2, r2, #1
+        cmp     r2, r3
+        bne     data_loop
+
+        /* initialize .bss */
+bss_init:
+        mov     r0, #0
+        ldr     r2, =_sbss      // sbss/ebss is 4byte aligned by link.lds
+        ldr     r3, =_ebss
+        cmp     r2, r3
+        beq     start_main
+bss_loop:
+        str     r0, [r2]
+        add     r2, r2, #4
+        cmp     r2, r3
+        bne     bss_loop
+
+        /* launch main() */
+start_main:
+#ifdef RT_USING_USER_MAIN
+        bl      entry
+#else
+        bl      main
+#endif
+
+default_handler:
+die:
+        b       die
+
+        .pool

bsp/lpc1114/link.lds

@@ -0,0 +1,138 @@
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    CODE (rx) : ORIGIN = 0x00000000, LENGTH = 32k /* 32KB flash */
+    DATA (rw) : ORIGIN = 0x10000000, LENGTH =  4k /* 4K sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x100;
+_ram_end = ORIGIN(DATA) + LENGTH(DATA);
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+        . = ALIGN(4);
+
+        . = ALIGN(4);
+        _etext = .;
+    } > CODE = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > CODE
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >DATA
+
+    .stack : 
+    {
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >DATA
+
+    __bss_start__ = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+        
+        *(.bss.init)
+    } > DATA
+    __bss_end__ = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}

bsp/lpc1114/rtconfig.h

@@ -0,0 +1,258 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* RT-Thread Configuration */
+
+/* RT-Thread Kernel */
+
+#define RT_NAME_MAX 8
+/* RT_USING_ARCH_DATA_TYPE is not set */
+/* RT_USING_SMP is not set */
+#define RT_ALIGN_SIZE 4
+/* RT_THREAD_PRIORITY_8 is not set */
+#define RT_THREAD_PRIORITY_32
+/* RT_THREAD_PRIORITY_256 is not set */
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 100
+/* RT_USING_OVERFLOW_CHECK is not set */
+/* RT_USING_HOOK is not set */
+/* RT_USING_IDLE_HOOK is not set */
+#define IDLE_THREAD_STACK_SIZE 256
+/* RT_USING_TIMER_SOFT is not set */
+/* RT_DEBUG is not set */
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+/* RT_USING_SIGNALS is not set */
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+/* RT_USING_MEMHEAP is not set */
+/* RT_USING_NOHEAP is not set */
+#define RT_USING_SMALL_MEM
+/* RT_USING_SLAB is not set */
+/* RT_USING_MEMTRACE is not set */
+#define RT_USING_HEAP
+
+/* Kernel Device Object */
+
+#define RT_USING_DEVICE
+/* RT_USING_DEVICE_OPS is not set */
+/* RT_USING_INTERRUPT_INFO is not set */
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart"
+#define RT_VER_NUM 0x40001
+#define ARCH_ARM
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M0
+/* ARCH_CPU_STACK_GROWS_UPWARD is not set */
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 512
+#define RT_MAIN_THREAD_PRIORITY 10
+
+/* C++ features */
+
+/* RT_USING_CPLUSPLUS is not set */
+
+/* Command shell */
+
+/* RT_USING_FINSH is not set */
+
+/* Device virtual file system */
+
+/* RT_USING_DFS is not set */
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_PIPE_BUFSZ 128
+/* RT_USING_SYSTEM_WORKQUEUE is not set */
+#define RT_USING_SERIAL
+/* RT_SERIAL_USING_DMA is not set */
+#define RT_SERIAL_RB_BUFSZ 64
+/* RT_USING_CAN is not set */
+/* RT_USING_HWTIMER is not set */
+/* RT_USING_CPUTIME is not set */
+/* RT_USING_I2C is not set */
+#define RT_USING_PIN
+/* RT_USING_ADC is not set */
+/* RT_USING_PWM is not set */
+/* RT_USING_MTD_NOR is not set */
+/* RT_USING_MTD_NAND is not set */
+/* RT_USING_MTD is not set */
+/* RT_USING_PM is not set */
+/* RT_USING_RTC is not set */
+/* RT_USING_SDIO is not set */
+/* RT_USING_SPI is not set */
+/* RT_USING_WDT is not set */
+/* RT_USING_AUDIO is not set */
+/* RT_USING_SENSOR is not set */
+
+/* Using WiFi */
+
+/* RT_USING_WIFI is not set */
+
+/* Using USB */
+
+/* RT_USING_USB_HOST is not set */
+/* RT_USING_USB_DEVICE is not set */
+
+/* POSIX layer and C standard library */
+
+#define RT_USING_LIBC
+/* RT_USING_PTHREADS is not set */
+
+/* Network */
+
+/* Socket abstraction layer */
+
+/* RT_USING_SAL is not set */
+
+/* Network interface device */
+
+/* RT_USING_NETDEV is not set */
+
+/* light weight TCP/IP stack */
+
+/* RT_USING_LWIP is not set */
+
+/* Modbus master and slave stack */
+
+/* RT_USING_MODBUS is not set */
+
+/* AT commands */
+
+/* RT_USING_AT is not set */
+
+/* VBUS(Virtual Software BUS) */
+
+/* RT_USING_VBUS is not set */
+
+/* Utilities */
+
+/* RT_USING_RYM is not set */
+/* RT_USING_ULOG is not set */
+/* RT_USING_UTEST is not set */
+/* RT_USING_LWP is not set */
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+/* PKG_USING_PAHOMQTT is not set */
+/* PKG_USING_WEBCLIENT is not set */
+/* PKG_USING_MONGOOSE is not set */
+/* PKG_USING_WEBTERMINAL is not set */
+/* PKG_USING_CJSON is not set */
+/* PKG_USING_JSMN is not set */
+/* PKG_USING_LJSON is not set */
+/* PKG_USING_EZXML is not set */
+/* PKG_USING_NANOPB is not set */
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+/* PKG_USING_WLANMARVELL is not set */
+
+/* Wiced WiFi */
+
+/* PKG_USING_WLAN_WICED is not set */
+/* PKG_USING_COAP is not set */
+/* PKG_USING_NOPOLL is not set */
+/* PKG_USING_NETUTILS is not set */
+/* PKG_USING_AT_DEVICE is not set */
+
+/* IoT Cloud */
+
+/* PKG_USING_ONENET is not set */
+/* PKG_USING_GAGENT_CLOUD is not set */
+/* PKG_USING_ALI_IOTKIT is not set */
+/* PKG_USING_AZURE is not set */
+
+/* security packages */
+
+/* PKG_USING_MBEDTLS is not set */
+/* PKG_USING_libsodium is not set */
+/* PKG_USING_TINYCRYPT is not set */
+
+/* language packages */
+
+/* PKG_USING_LUA is not set */
+/* PKG_USING_JERRYSCRIPT is not set */
+/* PKG_USING_MICROPYTHON is not set */
+
+/* multimedia packages */
+
+/* PKG_USING_OPENMV is not set */
+/* PKG_USING_MUPDF is not set */
+
+/* tools packages */
+
+/* PKG_USING_CMBACKTRACE is not set */
+/* PKG_USING_EASYFLASH is not set */
+/* PKG_USING_EASYLOGGER is not set */
+/* PKG_USING_SYSTEMVIEW is not set */
+
+/* system packages */
+
+/* PKG_USING_GUIENGINE is not set */
+/* PKG_USING_CAIRO is not set */
+/* PKG_USING_PIXMAN is not set */
+/* PKG_USING_LWEXT4 is not set */
+/* PKG_USING_PARTITION is not set */
+/* PKG_USING_FAL is not set */
+/* PKG_USING_SQLITE is not set */
+/* PKG_USING_RTI is not set */
+/* PKG_USING_LITTLEVGL2RTT is not set */
+/* PKG_USING_CMSIS is not set */
+/* PKG_USING_DFS_YAFFS is not set */
+
+/* peripheral libraries and drivers */
+
+/* PKG_USING_REALTEK_AMEBA is not set */
+/* PKG_USING_SHT2X is not set */
+/* PKG_USING_AHT10 is not set */
+/* PKG_USING_AP3216C is not set */
+/* PKG_USING_STM32_SDIO is not set */
+/* PKG_USING_ICM20608 is not set */
+
+/* miscellaneous packages */
+
+/* PKG_USING_LIBCSV is not set */
+/* PKG_USING_OPTPARSE is not set */
+/* PKG_USING_FASTLZ is not set */
+/* PKG_USING_MINILZO is not set */
+/* PKG_USING_QUICKLZ is not set */
+/* PKG_USING_MULTIBUTTON is not set */
+/* PKG_USING_CANFESTIVAL is not set */
+/* PKG_USING_ZLIB is not set */
+/* PKG_USING_DSTR is not set */
+
+/* sample package */
+
+/* samples: kernel and components samples */
+
+/* PKG_USING_KERNEL_SAMPLES is not set */
+/* PKG_USING_FILESYSTEM_SAMPLES is not set */
+/* PKG_USING_NETWORK_SAMPLES is not set */
+/* PKG_USING_PERIPHERAL_SAMPLES is not set */
+
+/* example package: hello */
+
+/* PKG_USING_HELLO is not set */
+#define SOC_LPC1114
+
+#endif

bsp/lpc1114/rtconfig.py

@@ -0,0 +1,58 @@
+import os
+
+# toolchains options
+ARCH        ='arm'
+CPU         ='cortex-m0'
+CROSS_TOOL  ='gcc'
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = '../..'
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'/usr/bin'
+else:
+    print 'Please make sure your toolchains is GNU GCC!'
+    exit(0)
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'release'
+# BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX  = 'arm-none-eabi-'
+    CC      = PREFIX + 'gcc'
+    CXX     = PREFIX + 'g++'
+    AS      = PREFIX + 'gcc'
+    AR      = PREFIX + 'ar'
+    LINK    = PREFIX + 'g++'
+    TARGET_EXT = 'elf'
+    SIZE    = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY  = PREFIX + 'objcopy'
+
+    DEVICE  = ' -mcpu=cortex-m0 -mthumb -ffunction-sections -fdata-sections'
+    CFLAGS  = DEVICE + ' -Wall'
+    AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp'
+    LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T link.lds'
+    CPATH   = ''
+    LPATH   = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -Os'
+
+    CXXFLAGS = CFLAGS
+
+DUMP_ACTION = OBJDUMP + ' -D -S $TARGET > rtt.asm\n'
+POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'

bsp/ls1cdev/drivers/drv_wdt.c

@@ -0,0 +1,199 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-06     sundm75       first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+
+#ifdef  RT_USING_WDT
+
+#include <drivers/watchdog.h>
+#include "drv_wdt.h"
+
+#include "ls1c_wdog.h"
+#include "ls1c_clock.h"
+
+typedef enum
+{
+    RESTENABLE      = 0x0,
+    INTERRUPTENABLE = 0x1,
+}wdt_enable_mode;
+
+static rt_uint32_t heartbeat = 0;
+
+static rt_err_t wdt_stop(void)
+{
+    rt_err_t ret = RT_EOK;
+
+    Wdog_Reset();
+    ret = (rt_err_t) Wdog_Disable();
+    if (ret != RT_EOK)
+    {
+        rt_kprintf("Wdog_Disable error!\n");
+        return RT_ERROR;
+    }
+    return ret;
+}
+
+static rt_err_t wdt_start(int mode)
+{
+    rt_err_t ret = RT_EOK;
+    wdt_enable_mode wdt_mode = RESTENABLE;
+
+    ret = (rt_err_t) Wdog_Disable();
+    if (ret != RT_EOK)
+    {
+        rt_kprintf("Wdog_Disable error!\n");
+        return RT_ERROR;
+    }
+
+    if((mode == RESTENABLE) || (mode == INTERRUPTENABLE))
+    {
+        wdt_mode = mode;
+    }
+    Wdog_Enable();
+    Wdog_Set();
+    if (ret != RT_EOK)
+    {
+        rt_kprintf("Wdog_Enable error!\n");
+        return RT_ERROR;
+    }
+
+    return ret;
+}
+
+static rt_err_t wdt_keepalive(void)
+{
+    rt_err_t ret = RT_EOK;
+    rt_uint32_t index = 0;
+
+    index = heartbeat * clk_get_apb_rate();
+    ret = (rt_err_t) Wdog_LoadValue(index);
+    Wdog_Set();
+    if (ret != 0)
+    {
+        rt_kprintf("LS1C_Wdog_ClrTimeout error!\n");
+        return RT_ERROR;
+    }
+
+    return ret;
+}
+
+static rt_uint32_t wdt_get_timeleft(void)
+{
+    rt_uint32_t  cnt = 0;
+    rt_uint32_t second  = 0;
+
+    cnt =  (rt_uint32_t) Wdog_GetValue();
+    second = cnt/clk_get_apb_rate();
+
+    return second;
+}
+
+static rt_err_t wdt_set_timeout(rt_uint32_t second)
+{
+    rt_err_t ret = RT_EOK;
+    rt_uint32_t index = 0;
+
+    index = second * clk_get_apb_rate();
+    ret = (rt_err_t) Wdog_LoadValue(index);
+    if (ret != RT_EOK)
+    {
+        rt_kprintf("Wdog_LoadValue error!\n");
+        return RT_ERROR;
+    }
+    return ret;
+}
+
+static rt_err_t watchdog_init(rt_watchdog_t *wdt)
+{
+    struct wdt_driver *wdt_drv = wdt->parent.user_data;
+    if (wdt_drv->in_use) return -RT_EBUSY;
+
+    Wdog_Init();
+
+    return RT_EOK;
+}
+
+static rt_err_t watchdog_ctrl(rt_watchdog_t *wdt, int cmd, void *arg)
+{
+    rt_uint32_t val;
+    int mode;
+
+    switch (cmd)
+    {
+        case RT_DEVICE_CTRL_WDT_START:
+            mode = *((int *)(arg));
+            wdt_start(mode);
+            break;
+
+        case RT_DEVICE_CTRL_WDT_STOP:
+            Wdog_Disable();
+            break;
+
+        case RT_DEVICE_CTRL_WDT_KEEPALIVE:
+            wdt_keepalive();
+            break;
+
+        case RT_DEVICE_CTRL_WDT_SET_TIMEOUT:
+            heartbeat = *((rt_uint32_t *)(arg));
+            wdt_set_timeout(heartbeat);
+            break;
+
+        case RT_DEVICE_CTRL_WDT_GET_TIMEOUT:
+            arg = &heartbeat;
+            break;
+
+        case RT_DEVICE_CTRL_WDT_GET_TIMELEFT:
+            val = (rt_uint32_t) wdt_get_timeleft();
+            arg = &val;
+            break;
+
+        default:
+            return -RT_EIO;
+    }
+    return RT_EOK;
+}
+
+struct rt_watchdog_ops watchdog_ops = 
+{
+    .init = &watchdog_init, 
+    .control = &watchdog_ctrl,
+};
+
+int wdt_exit(void *priv_data) 
+{ 
+    return 0;     
+}
+
+int rt_hw_wdt_init(void)
+{
+    rt_watchdog_t *wdt_dev;
+    struct wdt_driver *wdt_drv;
+
+    wdt_drv = (struct wdt_driver *)rt_malloc(sizeof(struct wdt_driver));
+    rt_memset(wdt_drv, 0, sizeof(struct wdt_driver));
+
+    wdt_dev = (rt_watchdog_t *)rt_malloc(sizeof(rt_watchdog_t));
+
+    if (wdt_dev == RT_NULL)
+    {
+        rt_kprintf("ERROR: %s rt_watchdog_t malloc failed\n", __func__);
+    }
+
+    wdt_dev->ops = &watchdog_ops;
+
+    rt_hw_watchdog_register(wdt_dev, "wdt", RT_DEVICE_OFLAG_RDWR, wdt_drv);
+
+    return 0;
+}
+
+INIT_BOARD_EXPORT(rt_hw_wdt_init);
+
+#endif

bsp/ls1cdev/drivers/drv_wdt.h

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-06     sundm75       first version
+ */
+
+#ifndef WDT_H_
+#define WDT_H_
+
+struct wdt_driver
+{
+    unsigned long in_use;
+
+    void* priv;
+};
+
+int rt_hw_wdt_init(void);
+
+#endif /* WDT_H_ */

bsp/ls1cdev/libraries/ls1c_wdog.c

@@ -0,0 +1,91 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-06     sundm75       first version
+ */
+
+#include "ls1c.h"
+#include "ls1c_wdog.h"
+
+/*
+系统先配置看门狗使能位 WDT_EN;
+然后配置看门狗计数器的初始值 WDT_TIMER;
+当设置 WDT_SET 后，计数器开始减计数;
+当还没有减到 0 时，重置看门狗计数器，系统不会重启;
+当看门狗计数器减到 0 时，则系统重启。
+*/
+
+static unsigned int WDT_timer = 0;
+
+/* 暂时为空 */
+unsigned int Wdog_Init(void)              
+{
+    return 0;
+}
+
+/* 配置看门狗使能寄存器(WDT_EN) */
+unsigned int Wdog_Enable(void)       
+{
+    unsigned int ctrl;
+    ctrl = (WDT_EN);
+    ctrl |= 0x01;
+
+    WDT_EN = ctrl;
+    return 0;
+}
+
+/* 配置看门狗失能寄存器(WDT_EN) */
+unsigned int Wdog_Disable(void)           
+{
+    unsigned int ctrl;
+    ctrl = (WDT_EN);
+    ctrl &= ~0x01;
+    WDT_EN = ctrl;
+    return 0;
+}
+
+/* 配置看门狗设置寄存器 (WDT_SET) */
+unsigned int Wdog_Set(void)               
+{
+    unsigned int ctrl;
+    ctrl = (WDT_SET);
+    ctrl |= 0x01;
+    WDT_SET = ctrl;
+    return 0;
+}
+
+/* 配置看门狗设置寄存器 (WDT_SET) */
+unsigned int Wdog_Reset(void)             
+{
+    unsigned int ctrl;
+    ctrl = (WDT_SET);
+    ctrl &= ~0x01;
+    WDT_SET = ctrl;
+    return 0;
+}
+
+/* 获得看门狗计数器(WDT_timer) 的值*/
+unsigned int Wdog_GetValue(void)          
+{
+    unsigned int cnt;
+    cnt = (WDT_TIMER);
+    return cnt;
+}
+
+/* 配置看门狗计数器(WDT_timer)的值*/
+unsigned int Wdog_LoadValue(unsigned int cnt)    
+{
+    WDT_TIMER = cnt;
+    WDT_timer = cnt;
+    return 0;
+}
+
+/* 获得看门狗计数器设定值 */
+unsigned int Wdog_GetPreValue(void)    
+{
+    return WDT_timer;
+}

bsp/ls1cdev/libraries/ls1c_wdog.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-06     sundm75       first version
+ */
+
+#ifndef _LS1C_WDOG_H_
+#define _LS1C_WDOG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+unsigned int Wdog_Init(void);                   // 暂时为空
+unsigned int Wdog_Enable(void);                 // 看门狗使能寄存器（WDT_EN）
+unsigned int Wdog_Disable(void);                // 看门狗失能寄存器（WDT_EN）
+unsigned int Wdog_Set(void);                    // 看门狗设置寄存器 (WDT_SET)
+unsigned int Wdog_Reset(void);                  // 看门狗设置寄存器 (WDT_SET)
+unsigned int Wdog_GetValue(void);               // 获得看门狗计数器（WDT_timer）
+unsigned int Wdog_LoadValue(unsigned int cnt);  // 设置看门狗计数器（WDT_timer）
+unsigned int Wdog_GetPreValue(void);            // 获得看门狗计数器设定值
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LS1C_WDOG_H_ */
+

bsp/mm32l07x/drivers/board.h

@@ -16,7 +16,7 @@
 #define SRAM_SIZE 0x2000
 
 #define SRAM_END (SRAM_BASE + SRAM_SIZE)
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
     extern int Image$$RW_IRAM1$$ZI$$Limit;
     #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/nuvoton_m451/applications/startup.c

@@ -29,7 +29,7 @@ extern int finsh_system_init(void);
 extern void finsh_set_device(const char* device);
 #endif
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define M451_SRAM_BEGIN    (&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/qemu-vexpress-a9/.cproject

@@ -17,43 +17,43 @@
 				<configuration artifactName="rtthread" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="${cross_rm} -rf" description="" id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094" name="Debug" parent="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug">
 					<folderInfo id="ilg.gnuarmeclipse.managedbuild.cross.config.elf.debug.553091094." name="/" resourcePath="">
 						<toolChain id="ilg.gnuarmeclipse.managedbuild.cross.toolchain.elf.debug.1201710416" name="ARM Cross GCC" superClass="ilg.gnuarmeclipse.managedbuild.cross.toolchain.elf.debug">
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createflash.251260409" name="Create flash image" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createflash" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createlisting.1365878149" name="Create extended listing" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createlisting"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.printsize.709136944" name="Print size" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.printsize" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.1986446770" name="Optimization Level" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level" value="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.none" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.messagelength.1312975261" name="Message length (-fmessage-length=0)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.messagelength" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.signedchar.1538128212" name="'char' is signed (-fsigned-char)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.signedchar" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.functionsections.2136804218" name="Function sections (-ffunction-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.functionsections" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.datasections.244767666" name="Data sections (-fdata-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.datasections" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.1055848773" name="Debug level" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level" value="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.default" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.501941135" name="Debug format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format" value="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.dwarf2" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.name.1696308067" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.name" value="GNU Tools for ARM Embedded Processors" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.architecture.1558403188" name="Architecture" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.architecture" value="ilg.gnuarmeclipse.managedbuild.cross.option.architecture.arm" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.family.749415257" name="ARM family" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.family" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.mcpu.default" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.2114153533" name="Instruction set" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.arm" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.prefix.1600865811" name="Prefix" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.prefix" value="arm-none-eabi-" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.c.1109963929" name="C compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.c" value="gcc" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.cpp.1040883831" name="C++ compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.cpp" value="g++" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.ar.1678200391" name="Archiver" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.ar" value="ar" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.objcopy.1171840296" name="Hex/Bin converter" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.objcopy" value="objcopy" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.objdump.342604837" name="Listing generator" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.objdump" value="objdump" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.size.898269225" name="Size command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.size" value="size" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.make.2016398076" name="Build command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.make" value="make" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.rm.1606171496" name="Remove command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.rm" value="rm" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.id.540792084" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.id" value="1287942917" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.architecture.430121817" name="Architecture" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.architecture" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.arch.armv7-a" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.966735324" name="Float ABI" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.soft" valueType="enumerated"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.allwarn.1381561249" name="Enable all common warnings (-Wall)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.allwarn" value="true" valueType="boolean"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.target.other.2041717463" name="Other target flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.target.other" value="" valueType="string"/>
-							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.1463655269" name="FPU Type" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.default" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createflash.251260409" name="Create flash image" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createflash" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createlisting.1365878149" name="Create extended listing" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.createlisting" useByScannerDiscovery="false"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.printsize.709136944" name="Print size" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.addtools.printsize" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.1986446770" name="Optimization Level" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.level.none" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.messagelength.1312975261" name="Message length (-fmessage-length=0)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.messagelength" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.signedchar.1538128212" name="'char' is signed (-fsigned-char)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.signedchar" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.functionsections.2136804218" name="Function sections (-ffunction-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.functionsections" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.datasections.244767666" name="Data sections (-fdata-sections)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.optimization.datasections" useByScannerDiscovery="true" value="false" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.1055848773" name="Debug level" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.level.default" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.501941135" name="Debug format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.debugging.format.dwarf2" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.name.1696308067" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.name" useByScannerDiscovery="false" value="GNU Tools for ARM Embedded Processors" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.architecture.1558403188" name="Architecture" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.architecture" useByScannerDiscovery="false" value="ilg.gnuarmeclipse.managedbuild.cross.option.architecture.arm" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.family.749415257" name="ARM family" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.family" useByScannerDiscovery="false" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.mcpu.default" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.2114153533" name="Instruction set" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset" useByScannerDiscovery="false" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.instructionset.arm" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.prefix.1600865811" name="Prefix" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.prefix" useByScannerDiscovery="false" value="arm-none-eabi-" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.c.1109963929" name="C compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.c" useByScannerDiscovery="false" value="gcc" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.cpp.1040883831" name="C++ compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.cpp" useByScannerDiscovery="false" value="g++" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.ar.1678200391" name="Archiver" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.ar" useByScannerDiscovery="false" value="ar" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.objcopy.1171840296" name="Hex/Bin converter" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.objcopy" useByScannerDiscovery="false" value="objcopy" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.objdump.342604837" name="Listing generator" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.objdump" useByScannerDiscovery="false" value="objdump" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.size.898269225" name="Size command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.size" useByScannerDiscovery="false" value="size" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.make.2016398076" name="Build command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.make" useByScannerDiscovery="false" value="make" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.command.rm.1606171496" name="Remove command" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.command.rm" useByScannerDiscovery="false" value="rm" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.id.540792084" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.toolchain.id" useByScannerDiscovery="false" value="1287942917" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.architecture.430121817" name="Architecture" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.architecture" useByScannerDiscovery="false" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.arch.armv7-a" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.966735324" name="Float ABI" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.abi.default" valueType="enumerated"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.allwarn.1381561249" name="Enable all common warnings (-Wall)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.warnings.allwarn" useByScannerDiscovery="true" value="true" valueType="boolean"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.target.other.2041717463" name="Other target flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.target.other" useByScannerDiscovery="true" value="" valueType="string"/>
+							<option id="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.1463655269" name="FPU Type" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit" useByScannerDiscovery="true" value="ilg.gnuarmeclipse.managedbuild.cross.option.arm.target.fpu.unit.default" valueType="enumerated"/>
 							<targetPlatform archList="all" binaryParser="org.eclipse.cdt.core.ELF" id="ilg.gnuarmeclipse.managedbuild.cross.targetPlatform.1798638225" isAbstract="false" osList="all" superClass="ilg.gnuarmeclipse.managedbuild.cross.targetPlatform"/>
 							<builder buildPath="${workspace_loc:/qemu-vexpress-a9}/Debug" cleanBuildTarget="clean2" id="ilg.gnuarmeclipse.managedbuild.cross.builder.1736709688" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="ilg.gnuarmeclipse.managedbuild.cross.builder"/>
 							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.1810966071" name="GNU ARM Cross Assembler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler">
-								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.usepreprocessor.1072524326" name="Use preprocessor" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.usepreprocessor" value="true" valueType="boolean"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.usepreprocessor.1072524326" name="Use preprocessor" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.usepreprocessor" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.paths.161242639" name="Include paths (-I)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.include.paths" useByScannerDiscovery="true" valueType="includePath">
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}}&quot;"/>
 								</option>
-								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs.1521934876" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs.1521934876" name="Defined symbols (-D)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.assembler.defs" useByScannerDiscovery="true" valueType="definedSymbols">
 									<listOptionValue builtIn="false" value="__ASSEMBLY__"/>
 								</option>
 								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input.1843333483" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.assembler.input"/>
@@ -105,6 +105,7 @@
 									<listOptionValue builtIn="false" value="HAVE_CCONFIG_H"/>
 									<listOptionValue builtIn="false" value="RT_USING_NEWLIB"/>
 								</option>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.other.2133065240" name="Other compiler flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.compiler.other" useByScannerDiscovery="true" value="" valueType="string"/>
 								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input.992053063" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.compiler.input"/>
 							</tool>
 							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker.869072473" name="Cross ARM C Linker" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker">
@@ -112,7 +113,7 @@
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nostart.351692886" name="Do not use standard start files (-nostartfiles)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nostdlibs.1009243715" name="No startup or default libs (-nostdlib)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nostdlibs" useByScannerDiscovery="false" value="false" valueType="boolean"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nodeflibs.2016026082" name="Do not use default libraries (-nodefaultlibs)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.nodeflibs" useByScannerDiscovery="false" value="false" valueType="boolean"/>
-								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.usenewlibnano.923990336" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="true" valueType="boolean"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.usenewlibnano.923990336" name="Use newlib-nano (--specs=nano.specs)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.usenewlibnano" useByScannerDiscovery="false" value="false" valueType="boolean"/>
 								<option defaultValue="true" id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.shared.548869459" name="Shared (-shared)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.shared" useByScannerDiscovery="false" valueType="boolean"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.scriptfile.1818777301" name="Script files (-T)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.scriptfile" useByScannerDiscovery="false" valueType="stringList">
 									<listOptionValue builtIn="false" value="&quot;${workspace_loc:/${ProjName}/link.lds}&quot;"/>
@@ -120,6 +121,7 @@
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.libs.1135656995" name="Libraries (-l)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.libs" useByScannerDiscovery="false"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.paths.36884122" name="Library search path (-L)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.paths" useByScannerDiscovery="false"/>
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.other.396049466" name="Other linker flags" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.other" useByScannerDiscovery="false" value="" valueType="string"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.cref.1645737861" name="Cross reference (-Xlinker --cref)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.c.linker.cref" useByScannerDiscovery="false" value="false" valueType="boolean"/>
 								<inputType id="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker.input.334732222" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.c.linker.input">
 									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
 									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
@@ -140,7 +142,7 @@
 								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.wide.1533725981" name="Wide lines (--wide|-w)" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.createlisting.wide" value="true" valueType="boolean"/>
 							</tool>
 							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize.1073550295" name="GNU ARM Cross Print Size" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.printsize">
-								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format.946451386" name="Size format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format"/>
+								<option id="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format.946451386" name="Size format" superClass="ilg.gnuarmeclipse.managedbuild.cross.option.printsize.format" useByScannerDiscovery="false"/>
 							</tool>
 							<tool id="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler.1302177015" name="GNU ARM Cross C++ Compiler" superClass="ilg.gnuarmeclipse.managedbuild.cross.tool.cpp.compiler"/>
 						</toolChain>

bsp/qemu-vexpress-a9/.gitignore

@@ -41,3 +41,4 @@ settings/
 *.uvguix*
 cconfig.h
 .settings
+drivers/automac.h

bsp/qemu-vexpress-a9/drivers/automac.h

@@ -0,0 +1,15 @@
+
+#ifndef __MAC_AUTO_GENERATE_H__
+#define __MAC_AUTO_GENERATE_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* mac configure file for RT-Thread qemu */
+
+#define AUTOMAC0  0x52
+#define AUTOMAC1  0x54
+#define AUTOMAC2  0x00
+#define AUTOMAC3  0x28
+#define AUTOMAC4  0xae
+#define AUTOMAC5  0xeb
+
+#endif

bsp/qemu-vexpress-a9/drivers/drv_sdio.c

@@ -440,14 +440,11 @@ int pl180_init(void)
     sdhci->priv = pdat;
     write32(pdat->virt + PL180_POWER, 0xbf);
 
-    // rt_kprintf("power:0x%08x\n", read32(pdat->virt + PL180_POWER));
-
     host->ops = &ops;
     host->freq_min = 400000;
     host->freq_max = 50000000;
     host->valid_ocr = VDD_32_33 | VDD_33_34;
-    // host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ | MMCSD_BUSWIDTH_4;
-    host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ;
+    host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_HIGHSPEED | MMCSD_SUP_SDIO_IRQ | MMCSD_BUSWIDTH_4;
     host->max_seg_size = 2048;
     host->max_dma_segs = 10;
     host->max_blk_size = 512;

bsp/qemu-vexpress-a9/drivers/drv_smc911x.c

@@ -2,6 +2,7 @@
 #include <rtthread.h>
 #include <netif/ethernetif.h>
 #include <lwipopts.h>
+#include <automac.h>
 
 #define MAX_ADDR_LEN                6
 #define SMC911X_EMAC_DEVICE(eth)    (struct eth_device_smc911x*)(eth)
@@ -512,12 +513,12 @@ int smc911x_emac_hw_init(void)
     smc911x_reg_write(&_emac, INT_CFG, INT_CFG_IRQ_POL | INT_CFG_IRQ_TYPE);
 
     /* test MAC address */
-    _emac.enetaddr[0] = 0x52;
-    _emac.enetaddr[1] = 0x54;
-    _emac.enetaddr[2] = 0x00;
-    _emac.enetaddr[3] = 0x11;
-    _emac.enetaddr[4] = 0x22;
-    _emac.enetaddr[5] = 0x33;
+    _emac.enetaddr[0] = AUTOMAC0;
+    _emac.enetaddr[1] = AUTOMAC1;
+    _emac.enetaddr[2] = AUTOMAC2;
+    _emac.enetaddr[3] = AUTOMAC3;
+    _emac.enetaddr[4] = AUTOMAC4;
+    _emac.enetaddr[5] = AUTOMAC5;
 
 #ifdef RT_USING_DEVICE_OPS
     _emac.parent.parent.ops        = &smc911x_emac_ops;

bsp/qemu-vexpress-a9/drivers/secondary_cpu.c

@@ -17,6 +17,8 @@
 #include "drv_timer.h"
 
 #ifdef RT_USING_SMP
+#include <interrupt.h>
+
 static void rt_hw_timer2_isr(int vector, void *param)
 {
     rt_tick_increase();

bsp/qemu-vexpress-a9/rtconfig.py

@@ -1,5 +1,29 @@
 import os
 
+import uuid
+def get_mac_address(): 
+    mac=uuid.UUID(int = uuid.getnode()).hex[-12:] 
+    return "#define AUTOMAC".join([str(e/2 + 1) + '  0x' + mac[e:e+2] + '\n' for e in range(5,11,2)])
+
+header = '''
+#ifndef __MAC_AUTO_GENERATE_H__
+#define __MAC_AUTO_GENERATE_H__
+
+/* Automatically generated file; DO NOT EDIT. */
+/* mac configure file for RT-Thread qemu */
+
+#define AUTOMAC0  0x52
+#define AUTOMAC1  0x54
+#define AUTOMAC2  0x00
+#define AUTOMAC'''
+
+end = '''
+#endif
+'''
+
+with open('drivers/automac.h', 'w') as f:
+    f.write(header + get_mac_address() + end)
+
 # toolchains options
 ARCH='arm'
 CPU='cortex-a'

bsp/samd21/applications/startup.c

@@ -29,7 +29,7 @@ extern void finsh_system_init(void);
 extern void finsh_set_device(const char* device);
 #endif
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #elif __ICCARM__
 #pragma section="HEAP"
@@ -78,7 +78,7 @@ void rtthread_startup(void)
     rt_system_timer_init();
 
 #ifdef RT_USING_HEAP
-    #ifdef __CC_ARM
+    #if defined(__CC_ARM) || defined(__CLANG_ARM)
         rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)CHIP_SRAM_END);
     #elif __ICCARM__
         rt_system_heap_init(__segment_end("HEAP"), (void*)CHIP_SRAM_END);

bsp/stm32/libraries/HAL_Drivers/SConscript

@@ -30,7 +30,7 @@ if GetDepend(['RT_USING_I2C', 'RT_USING_I2C_BITOPS']):
     if GetDepend('BSP_USING_I2C1') or GetDepend('BSP_USING_I2C2') or GetDepend('BSP_USING_I2C3') or GetDepend('BSP_USING_I2C4'):
         src += ['drv_soft_i2c.c']
 
-if GetDepend('RT_USING_LWIP'):
+if GetDepend('BSP_USING_ETH'):
     src += ['drv_eth.c']
 
 if GetDepend(['RT_USING_ADC']):
@@ -39,6 +39,10 @@ if GetDepend(['RT_USING_ADC']):
 if GetDepend(['RT_USING_CAN']):
     src += ['drv_can.c']
 
+if GetDepend(['RT_USING_PM', 'SOC_SERIES_STM32L4']):
+    src += ['drv_pm.c']
+    src += ['drv_lptim.c']
+
 if GetDepend('BSP_USING_SDRAM'):
     src += ['drv_sdram.c']
 

bsp/stm32/libraries/HAL_Drivers/drv_eth.c

@@ -91,10 +91,10 @@ static rt_err_t rt_stm32_eth_init(rt_device_t dev)
     EthHandle.Init.RxMode = ETH_RXINTERRUPT_MODE;
 #ifdef RT_LWIP_USING_HW_CHECKSUM
     EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_HARDWARE;
-#else    
+#else
     EthHandle.Init.ChecksumMode = ETH_CHECKSUM_BY_SOFTWARE;
 #endif
-    
+
     HAL_ETH_DeInit(&EthHandle);
 
     /* configure ethernet peripheral (GPIOs, clocks, MAC, DMA) */
@@ -431,31 +431,34 @@ static void phy_monitor_thread_entry(void *parameter)
     uint8_t phy_addr = 0xFF;
     uint8_t phy_speed_new = 0;
     rt_uint32_t status = 0;
+    uint8_t detected_count = 0;
 
-    /* phy search */
-    rt_uint32_t i, temp;
-    for (i = 0; i <= 0x1F; i++)
+    while(phy_addr == 0xFF)
     {
-        EthHandle.Init.PhyAddress = i;
+        /* phy search */
+        rt_uint32_t i, temp;
+        for (i = 0; i <= 0x1F; i++)
+        {
+            EthHandle.Init.PhyAddress = i;
+            HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ID1_REG, (uint32_t *)&temp);
+
+            if (temp != 0xFFFF && temp != 0x00)
+            {
+                phy_addr = i;
+                break;
+            }
+        }
 
-        HAL_ETH_ReadPHYRegister(&EthHandle, PHY_ID1_REG, (uint32_t *)&temp);
+        detected_count++;
+        rt_thread_mdelay(1000);
 
-        if (temp != 0xFFFF && temp != 0x00)
+        if (detected_count > 10)
         {
-            phy_addr = i;
-            break;
+            LOG_E("No PHY device was detected, please check hardware!");
         }
     }
 
-    if (phy_addr == 0xFF)
-    {
-        LOG_E("phy not probe!");
-        return;
-    }
-    else
-    {
-        LOG_D("found a phy, address:0x%02X", phy_addr);
-    }
+    LOG_D("Found a phy, address:0x%02X", phy_addr);
 
     /* RESET PHY */
     LOG_D("RESET PHY!");
@@ -667,4 +670,4 @@ __exit:
 
     return state;
 }
-INIT_APP_EXPORT(rt_hw_stm32_eth_init);
+INIT_DEVICE_EXPORT(rt_hw_stm32_eth_init);

bsp/stm32/libraries/HAL_Drivers/drv_lptim.c

@@ -0,0 +1,132 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author          Notes
+ * 2019-05-06     Zero-Free       first version
+ */
+
+#include <board.h>
+#include <drv_lptim.h>
+
+static LPTIM_HandleTypeDef LptimHandle;
+
+void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
+{
+    if (hlptim->Instance == LPTIM1)
+    {
+        /* Peripheral clock enable */
+        __HAL_RCC_LPTIM1_CLK_ENABLE();
+    }
+}
+
+void LPTIM1_IRQHandler(void)
+{
+    HAL_LPTIM_IRQHandler(&LptimHandle);
+}
+
+void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
+{
+    /* enter interrupt */
+    rt_interrupt_enter();
+
+    /* leave interrupt */
+    rt_interrupt_leave();
+}
+
+/**
+ * This function get current count value of LPTIM
+ *
+ * @return the count vlaue
+ */
+rt_uint32_t stm32l4_lptim_get_current_tick(void)
+{
+    return HAL_LPTIM_ReadCounter(&LptimHandle);
+}
+
+/**
+ * This function get the max value that LPTIM can count
+ *
+ * @return the max count
+ */
+rt_uint32_t stm32l4_lptim_get_tick_max(void)
+{
+    return (0xFFFF);
+}
+
+/**
+ * This function start LPTIM with reload value
+ *
+ * @param reload The value that LPTIM count down from
+ *
+ * @return RT_EOK
+ */
+rt_err_t stm32l4_lptim_start(rt_uint32_t reload)
+{
+    HAL_LPTIM_TimeOut_Start_IT(&LptimHandle, 0xFFFF, reload);
+
+    return (RT_EOK);
+}
+
+/**
+ * This function stop LPTIM
+ */
+void stm32l4_lptim_stop(void)
+{
+    rt_uint32_t _ier;
+
+    _ier = LptimHandle.Instance->IER;
+    LptimHandle.Instance->ICR = LptimHandle.Instance->ISR & _ier;
+}
+
+/**
+ * This function get the count clock of LPTIM
+ *
+ * @return the count clock frequency in Hz
+ */
+rt_uint32_t stm32l4_lptim_get_countfreq(void)
+{
+    return 32000 / 32;
+}
+
+/**
+ * This function initialize the lptim
+ */
+int stm32l4_hw_lptim_init(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef RCC_PeriphCLKInitStruct = {0};
+
+    /* Enable LSI clock */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI;
+    RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+    /* Select the LSI clock as LPTIM peripheral clock */
+    RCC_PeriphCLKInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPTIM1;
+    RCC_PeriphCLKInitStruct.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSI;
+    HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphCLKInitStruct);
+
+    LptimHandle.Instance = LPTIM1;
+    LptimHandle.Init.Clock.Source = LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC;
+    LptimHandle.Init.Clock.Prescaler = LPTIM_PRESCALER_DIV32;
+    LptimHandle.Init.Trigger.Source = LPTIM_TRIGSOURCE_SOFTWARE;
+    LptimHandle.Init.OutputPolarity = LPTIM_OUTPUTPOLARITY_HIGH;
+    LptimHandle.Init.UpdateMode = LPTIM_UPDATE_IMMEDIATE;
+    LptimHandle.Init.CounterSource = LPTIM_COUNTERSOURCE_INTERNAL;
+    if (HAL_LPTIM_Init(&LptimHandle) != HAL_OK)
+    {
+        return -1;
+    }
+
+    NVIC_ClearPendingIRQ(LPTIM1_IRQn);
+    NVIC_SetPriority(LPTIM1_IRQn, 0);
+    NVIC_EnableIRQ(LPTIM1_IRQn);
+
+    return 0;
+}
+
+INIT_DEVICE_EXPORT(stm32l4_hw_lptim_init);

bsp/stm32/libraries/HAL_Drivers/drv_lptim.h

@@ -0,0 +1,23 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author          Notes
+ * 2019-05-06     Zero-Free       first version
+ */
+
+#ifndef  __DRV_PMTIMER_H__
+#define  __DRV_PMTIMER_H__
+
+#include <rtthread.h>
+
+rt_uint32_t stm32l4_lptim_get_countfreq(void);
+rt_uint32_t stm32l4_lptim_get_tick_max(void);
+rt_uint32_t stm32l4_lptim_get_current_tick(void);
+
+rt_err_t stm32l4_lptim_start(rt_uint32_t load);
+void stm32l4_lptim_stop(void);
+
+#endif /* __DRV_PMTIMER_H__ */

bsp/stm32/libraries/HAL_Drivers/drv_pm.c

@@ -0,0 +1,248 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-06     Zero-Free    first version
+ */
+
+#include <board.h>
+#include <drv_lptim.h>
+
+static void uart_console_reconfig(void)
+{
+    struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
+
+    rt_device_control(rt_console_get_device(), RT_DEVICE_CTRL_CONFIG, &config);
+}
+
+/**
+ * This function will put STM32L4xx into sleep mode.
+ *
+ * @param pm pointer to power manage structure
+ */
+static void sleep(struct rt_pm *pm, uint8_t mode)
+{
+    switch (mode)
+    {
+    case PM_SLEEP_MODE_NONE:
+        break;
+
+    case PM_SLEEP_MODE_IDLE:
+        // __WFI();
+        break;
+
+    case PM_SLEEP_MODE_LIGHT:
+        if (pm->run_mode == PM_RUN_MODE_LOW_SPEED)
+        {
+            /* Enter LP SLEEP Mode, Enable low-power regulator */
+            HAL_PWR_EnterSLEEPMode(PWR_LOWPOWERREGULATOR_ON, PWR_SLEEPENTRY_WFI);
+        }
+        else
+        {
+            /* Enter SLEEP Mode, Main regulator is ON */
+            HAL_PWR_EnterSLEEPMode(PWR_MAINREGULATOR_ON, PWR_SLEEPENTRY_WFI);
+        }
+        break;
+
+    case PM_SLEEP_MODE_DEEP:
+        /* Enter STOP 2 mode  */
+        HAL_PWREx_EnterSTOP2Mode(PWR_STOPENTRY_WFI);
+        /* Re-configure the system clock */
+        SystemClock_ReConfig(pm->run_mode);
+        break;
+
+    case PM_SLEEP_MODE_STANDBY:
+        /* Enter STANDBY mode */
+        HAL_PWR_EnterSTANDBYMode();
+        break;
+
+    case PM_SLEEP_MODE_SHUTDOWN:
+        /* Enter SHUTDOWNN mode */
+        HAL_PWREx_EnterSHUTDOWNMode();
+        break;
+
+    default:
+        RT_ASSERT(0);
+        break;
+    }
+}
+
+static uint8_t run_speed[PM_RUN_MODE_MAX][2] =
+{
+    {80, 0},
+    {80, 1},
+    {24, 2},
+    {2,  3},
+};
+
+static void run(struct rt_pm *pm, uint8_t mode)
+{
+    static uint8_t last_mode;
+    static char *run_str[] = PM_RUN_MODE_NAMES;
+
+    if (mode == last_mode)
+        return;
+    last_mode = mode;
+
+    /* 1. 设置 MSI 作为 SYSCLK 时钟源,以修改 PLL */
+    SystemClock_MSI_ON();
+
+    /* 2. 根据RUN模式切换时钟频率(HSI) */
+    switch (mode)
+    {
+    case PM_RUN_MODE_HIGH_SPEED:
+    case PM_RUN_MODE_NORMAL_SPEED:
+        SystemClock_80M();
+        /* Configure the main internal regulator output voltage (Range1 by default)*/
+        HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+        break;
+    case PM_RUN_MODE_MEDIUM_SPEED:
+        SystemClock_24M();
+        /* Configure the main internal regulator output voltage */
+        HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE2);
+        break;
+    case PM_RUN_MODE_LOW_SPEED:
+        SystemClock_2M();
+        /* Enter LP RUN mode */
+        HAL_PWREx_EnableLowPowerRunMode();
+        break;
+    default:
+        break;
+    }
+
+    /* 3. 关闭 MSI 时钟 */
+    // SystemClock_MSI_OFF();
+
+    /* 4. 更新外设时钟 */
+    uart_console_reconfig();
+    /* Re-Configure the Systick time */
+    HAL_SYSTICK_Config(HAL_RCC_GetHCLKFreq() / RT_TICK_PER_SECOND);
+    /* Re-Configure the Systick */
+    HAL_SYSTICK_CLKSourceConfig(SYSTICK_CLKSOURCE_HCLK);
+
+    rt_kprintf("switch to %s mode, frequency = %d MHz\n", run_str[mode], run_speed[mode][0]);
+}
+
+/**
+ * This function caculate the PM tick from OS tick
+ *
+ * @param tick OS tick
+ *
+ * @return the PM tick
+ */
+static rt_tick_t stm32l4_pm_tick_from_os_tick(rt_tick_t tick)
+{
+    rt_uint32_t freq = stm32l4_lptim_get_countfreq();
+
+    return (freq * tick / RT_TICK_PER_SECOND);
+}
+
+/**
+ * This function caculate the OS tick from PM tick
+ *
+ * @param tick PM tick
+ *
+ * @return the OS tick
+ */
+static rt_tick_t stm32l4_os_tick_from_pm_tick(rt_uint32_t tick)
+{
+    static rt_uint32_t os_tick_remain = 0;
+    rt_uint32_t ret, freq;
+
+    freq = stm32l4_lptim_get_countfreq();
+    ret = (tick * RT_TICK_PER_SECOND + os_tick_remain) / freq;
+
+    os_tick_remain += (tick * RT_TICK_PER_SECOND);
+    os_tick_remain %= freq;
+
+    return ret;
+}
+
+/**
+ * This function start the timer of pm
+ *
+ * @param pm Pointer to power manage structure
+ * @param timeout How many OS Ticks that MCU can sleep
+ */
+static void pm_timer_start(struct rt_pm *pm, rt_uint32_t timeout)
+{
+    RT_ASSERT(pm != RT_NULL);
+    RT_ASSERT(timeout > 0);
+
+    if (timeout != RT_TICK_MAX)
+    {
+        /* Convert OS Tick to pmtimer timeout value */
+        timeout = stm32l4_pm_tick_from_os_tick(timeout);
+        if (timeout > stm32l4_lptim_get_tick_max())
+        {
+            timeout = stm32l4_lptim_get_tick_max();
+        }
+
+        /* Enter PM_TIMER_MODE */
+        stm32l4_lptim_start(timeout);
+    }
+}
+
+/**
+ * This function stop the timer of pm
+ *
+ * @param pm Pointer to power manage structure
+ */
+static void pm_timer_stop(struct rt_pm *pm)
+{
+    RT_ASSERT(pm != RT_NULL);
+
+    /* Reset pmtimer status */
+    stm32l4_lptim_stop();
+}
+
+/**
+ * This function calculate how many OS Ticks that MCU have suspended
+ *
+ * @param pm Pointer to power manage structure
+ *
+ * @return OS Ticks
+ */
+static rt_tick_t pm_timer_get_tick(struct rt_pm *pm)
+{
+    rt_uint32_t timer_tick;
+
+    RT_ASSERT(pm != RT_NULL);
+
+    timer_tick = stm32l4_lptim_get_current_tick();
+
+    return stm32l4_os_tick_from_pm_tick(timer_tick);
+}
+
+/**
+ * This function initialize the power manager
+ */
+int drv_pm_hw_init(void)
+{
+    static const struct rt_pm_ops _ops =
+    {
+        sleep,
+        run,
+        pm_timer_start,
+        pm_timer_stop,
+        pm_timer_get_tick
+    };
+
+    rt_uint8_t timer_mask = 0;
+
+    /* Enable Power Clock */
+    __HAL_RCC_PWR_CLK_ENABLE();
+
+    /* initialize timer mask */
+    timer_mask = 1UL << PM_SLEEP_MODE_DEEP;
+
+    /* initialize system pm module */
+    rt_system_pm_init(&_ops, timer_mask, RT_NULL);
+
+    return 0;
+}
+
+INIT_BOARD_EXPORT(drv_pm_hw_init);

bsp/stm32/libraries/STM32L4xx_HAL/SConscript

@@ -84,6 +84,9 @@ if GetDepend(['RT_USING_MTD_NOR']):
 if GetDepend(['RT_USING_MTD_NAND']):
     src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_nand.c']
 
+if GetDepend(['RT_USING_PM']):
+    src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_lptim.c']
+
 if GetDepend(['BSP_USING_ON_CHIP_FLASH']):
     src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash.c']
     src += ['STM32L4xx_HAL_Driver/Src/stm32l4xx_hal_flash_ex.c']

bsp/stm32/libraries/templates/stm32f0xx/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      32
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/libraries/templates/stm32f10x/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      20
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/libraries/templates/stm32l4xx/board/board.h

@@ -29,7 +29,7 @@ extern "C" {
 #define STM32_SRAM1_START              (0x20000000)
 #define STM32_SRAM1_END                (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f091-st-nucleo/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      32
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-atk-nano/board/board.h

@@ -27,7 +27,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      20
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-atk-warshipv3/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      64
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-dofly-M3S/board/board.h

@@ -29,7 +29,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      64
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-dofly-lyc8/board/board.h

@@ -23,7 +23,7 @@
 #define STM32_SRAM_SIZE      20
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-fire-arbitrary/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_FLASH_SIZE             (512 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-hw100k-ibox/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      64
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f103-mini-system/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      20
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f107-uc-eval/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      64
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f407-atk-explorer/board/board.h

@@ -27,7 +27,7 @@ extern "C" {
 #define STM32_FLASH_SIZE             (1024 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32f767-atk-apollo/board/Kconfig

@@ -24,7 +24,7 @@ menu "Onboard Peripheral Drivers"
         default n
 
     config BSP_USING_QSPI_FLASH
-        bool "Enable QSPI FLASH (w25q128 qspi)"
+        bool "Enable QSPI FLASH (W25Q256 qspi)"
         select BSP_USING_QSPI
         select RT_USING_SFUD
         select RT_SFUD_USING_QSPI

bsp/stm32/stm32f767-atk-apollo/board/ports/drv_qspi_flash.c

@@ -64,14 +64,14 @@ static int rt_hw_qspi_flash_with_sfud_init(void)
 {
     stm32_qspi_bus_attach_device("qspi1", "qspi10", RT_NULL, 4, w25qxx_enter_qspi_mode, RT_NULL);
     
-    /* init w25q128 */
-    if (RT_NULL == rt_sfud_flash_probe("W25Q128", "qspi10"))
+    /* init W25Q256 */
+    if (RT_NULL == rt_sfud_flash_probe("W25Q256", "qspi10"))
     {
         return -RT_ERROR;
     }
 
     return RT_EOK;
 }
-INIT_COMPONENT_EXPORT(rt_hw_qspi_flash_with_sfud_init);
+INIT_DEVICE_EXPORT(rt_hw_qspi_flash_with_sfud_init);
 
 #endif/* BSP_USING_QSPI_FLASH */

bsp/stm32/stm32g071-st-nucleo/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      36
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32l053-st-nucleo/board/board.h

@@ -28,7 +28,7 @@ extern "C" {
 #define STM32_SRAM_SIZE      8
 #define STM32_SRAM_END       (0x20000000 + STM32_SRAM_SIZE * 1024)
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/stm32/stm32l475-atk-pandora/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h

@@ -69,7 +69,7 @@
 #define HAL_IWDG_MODULE_ENABLED
 /*#define HAL_LTDC_MODULE_ENABLED   */
 /*#define HAL_LCD_MODULE_ENABLED   */
-/*#define HAL_LPTIM_MODULE_ENABLED   */
+#define HAL_LPTIM_MODULE_ENABLED
 /*#define HAL_NAND_MODULE_ENABLED   */
 /*#define HAL_NOR_MODULE_ENABLED   */
 /*#define HAL_OPAMP_MODULE_ENABLED   */

bsp/stm32/stm32l475-atk-pandora/board/Kconfig

@@ -29,6 +29,24 @@ menu "Onboard Peripheral Drivers"
         select RT_USING_DFS_ELMFAT
         default n
 
+    config BSP_USING_ICM20608
+        bool "Enable icm20608 (i2c3)"
+        select BSP_USING_I2C
+        select BSP_USING_I2C3
+        select PKG_USING_SENSORS_DRIVERS
+        select PKG_USING_MPU6XXX
+        select PKG_USING_MPU6XXX_LATEST_VERSION
+        default n
+        
+    config BSP_USING_AHT10
+        bool "Enable aht10 (i2c4)"
+        select BSP_USING_I2C
+        select BSP_USING_I2C4
+        select PKG_USING_SENSORS_DRIVERS
+        select PKG_USING_AHT10
+        select PKG_USING_AHT10_LATEST_VERSION
+        default n
+
 endmenu
 
 menu "On-chip Peripheral Drivers"
@@ -112,55 +130,42 @@ menu "On-chip Peripheral Drivers"
         bool "Enable QSPI DMA support"
         default n
 
-    menuconfig BSP_USING_I2C1
-        bool "Enable I2C1 BUS (software simulation)"
-        default n
-        select RT_USING_I2C
-        select RT_USING_I2C_BITOPS
-        select RT_USING_PIN
-        if BSP_USING_I2C1
-            config BSP_I2C1_SCL_PIN
-                int "i2c1 scl pin number"
-                range 1 176
-                default 15
-            config BSP_I2C1_SDA_PIN
-                int "I2C1 sda pin number"
-                range 1 176
-                default 16
-        endif
-
-    menuconfig BSP_USING_I2C2
-        bool "Enable I2C2 BUS (software simulation)"
+    menuconfig BSP_USING_I2C
+        bool "Enable I2C BUS"
         default n
         select RT_USING_I2C
         select RT_USING_I2C_BITOPS
         select RT_USING_PIN
-        if BSP_USING_I2C2
-            config BSP_I2C2_SCL_PIN
-                int "i2c2 scl pin number"
-                range 1 176
-                default 47
-            config BSP_I2C2_SDA_PIN
-                int "I2C2 sda pin number"
-                range 1 176
-                default 48
-        endif
-
-    menuconfig BSP_USING_I2C3
-        bool "Enable I2C3 BUS (software simulation)"
-        default n
-        select RT_USING_I2CS
-        select RT_USING_I2C_BITOPS
-        select RT_USING_PIN
-        if BSP_USING_I2C3
-            config BSP_I2C3_SCL_PIN
-                int "i2c3 scl pin number"
-                range 1 176
-                default 92
-            config BSP_I2C3_SDA_PIN
-                int "I2C3 sda pin number"
-                range 1 176
-                default 93
+        if BSP_USING_I2C
+            menuconfig BSP_USING_I2C3
+                bool "Enable I2C3 BUS (software simulation)"
+                default y
+                if BSP_USING_I2C3
+                    comment "Notice: PC0 --> 32; PC1 --> 33" 
+                    config BSP_I2C3_SCL_PIN
+                        int "i2c3 scl pin number"
+                        range 1 176
+                        default 32
+                    config BSP_I2C3_SDA_PIN
+                        int "I2C3 sda pin number"
+                        range 1 176
+                        default 33
+                endif
+
+            menuconfig BSP_USING_I2C4
+                bool "Enable I2C4 BUS (AHT10)"
+                default n
+                if BSP_USING_I2C4
+                    comment "Notice: PC1 --> 33; PD6 --> 54" 
+                    config BSP_I2C4_SCL_PIN
+                        int "i2c4 scl pin number"
+                        range 1 176
+                        default 54
+                    config BSP_I2C4_SDA_PIN
+                        int "I2C4 sda pin number"
+                        range 1 176
+                        default 33
+                endif
         endif
 
     menuconfig BSP_USING_TIM

bsp/stm32/stm32l475-atk-pandora/board/SConscript

@@ -18,6 +18,9 @@ if GetDepend(['BSP_USING_QSPI_FLASH']):
 if GetDepend(['BSP_USING_SDCARD']):
     src += Glob('ports/sdcard_port.c')
 
+if GetDepend(['BSP_USING_ICM20608']) or GetDepend(['BSP_USING_AHT10']):
+    src += Glob('ports/sensor_port.c')
+
 path =  [cwd]
 path += [cwd + '/CubeMX_Config/Inc']
 path += [cwd + '/ports']

bsp/stm32/stm32l475-atk-pandora/board/board.c

@@ -10,55 +10,222 @@
  * Change Logs:
  * Date           Author       Notes
  * 2009-01-05     Bernard      first implementation
+ * 2019-05-09     Zero-Free    Adding multiple configurations for system clock frequency
  */
 
 #include <board.h>
+#include <rtthread.h>
 
 void SystemClock_Config(void)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM = 1;
-  RCC_OscInitStruct.PLL.PLLN = 20;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1|RCC_PERIPHCLK_USART2;
-  PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
-  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Configure the main internal regulator output voltage 
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 20;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Configure the main internal regulator output voltage
+    */
+    if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+#ifdef RT_USING_PM
+
+void SystemClock_MSI_ON(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct   = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct   = {0};
+
+    /* Initializes the CPU, AHB and APB busses clocks */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        RT_ASSERT(0);
+    }
+
+    RCC_ClkInitStruct.ClockType       = RCC_CLOCKTYPE_SYSCLK;
+    RCC_ClkInitStruct.SYSCLKSource    = RCC_SYSCLKSOURCE_MSI;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_MSI_OFF(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+    RCC_OscInitStruct.OscillatorType  = RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.HSIState        = RCC_MSI_OFF;
+    RCC_OscInitStruct.PLL.PLLState    = RCC_PLL_NONE;  /* No update on PLL */
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_80M(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+    /**Initializes the CPU, AHB and APB busses clocks */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 20;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_24M(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+    /** Initializes the CPU, AHB and APB busses clocks */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+    RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 12;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /** Initializes the CPU, AHB and APB busses clocks */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_2M(void)
+{
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+    /* MSI is enabled after System reset, update MSI to 2Mhz (RCC_MSIRANGE_5) */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+    RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
+    RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        /* Initialization Error */
+        Error_Handler();
+    }
+
+    /* Select MSI as system clock source and configure the HCLK, PCLK1 and PCLK2
+       clocks dividers */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+    {
+        /* Initialization Error */
+        Error_Handler();
+    }
+}
+
+/**
+  * @brief  Configures system clock after wake-up from STOP: enable HSI, PLL
+  *         and select PLL as system clock source.
+  * @param  None
+  * @retval None
   */
-  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
-  {
-    Error_Handler();
-  }
+void SystemClock_ReConfig(uint8_t mode)
+{
+    SystemClock_MSI_ON();
+
+    switch (mode)
+    {
+    case PM_RUN_MODE_HIGH_SPEED:
+    case PM_RUN_MODE_NORMAL_SPEED:
+        SystemClock_80M();
+        break;
+    case PM_RUN_MODE_MEDIUM_SPEED:
+        SystemClock_24M();
+        break;
+    case PM_RUN_MODE_LOW_SPEED:
+        SystemClock_2M();
+        break;
+    default:
+        break;
+    }
+
+    // SystemClock_MSI_OFF();
 }
+
+#endif

bsp/stm32/stm32l475-atk-pandora/board/board.h

@@ -32,6 +32,12 @@ extern "C" {
 #define HEAP_END                       STM32_SRAM1_END
 
 void SystemClock_Config(void);
+void SystemClock_MSI_ON(void);
+void SystemClock_MSI_OFF(void);
+void SystemClock_80M(void);
+void SystemClock_24M(void);
+void SystemClock_2M(void);
+void SystemClock_ReConfig(uint8_t mode);
 
 #ifdef __cplusplus
 }

bsp/stm32/stm32l475-atk-pandora/board/ports/drv_qspi_flash.c

@@ -74,4 +74,37 @@ static int rt_hw_qspi_flash_with_sfud_init(void)
 }
 INIT_COMPONENT_EXPORT(rt_hw_qspi_flash_with_sfud_init);
 
-#endif/* BSP_USING_QSPI_FLASH */
+#if defined(RT_USING_DFS_ELMFAT) && !defined(BSP_USING_SDCARD)
+#include <dfs_fs.h>
+
+#define BLK_DEV_NAME  "W25Q128"
+
+int mnt_init(void)
+{
+    rt_thread_delay(RT_TICK_PER_SECOND);
+
+    if (dfs_mount(BLK_DEV_NAME, "/", "elm", 0, 0) == 0)
+    {
+        rt_kprintf("file system initialization done!\n");
+    }
+    else
+    {
+        if(dfs_mkfs("elm", BLK_DEV_NAME) == 0)
+        {
+            if (dfs_mount(BLK_DEV_NAME, "/", "elm", 0, 0) == 0)
+            {
+                rt_kprintf("file system initialization done!\n");
+            }
+            else
+            {
+                rt_kprintf("file system initialization failed!\n");
+            }
+        }
+    }
+
+    return 0;
+}
+INIT_ENV_EXPORT(mnt_init);
+
+#endif /* defined(RT_USING_DFS_ELMFAT) && !defined(BSP_USING_SDCARD) */
+#endif /* BSP_USING_QSPI_FLASH */

bsp/stm32/stm32l475-atk-pandora/board/ports/sensor_port.c

@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-05-08     flaybreak    add sensor port file
+ */
+
+#include <board.h>
+
+#ifdef BSP_USING_ICM20608
+#include "sensor_inven_mpu6xxx.h"
+
+int sensor_init(void)
+{
+    struct rt_sensor_config cfg;
+
+    cfg.intf.type = RT_SENSOR_INTF_I2C;
+    cfg.intf.dev_name = "i2c3";
+    cfg.intf.user_data = (void *)MPU6XXX_ADDR_DEFAULT;
+    cfg.irq_pin.pin  = RT_PIN_NONE;
+
+    rt_hw_mpu6xxx_init("icm", &cfg);
+
+    return 0;
+}
+INIT_ENV_EXPORT(sensor_init);
+
+#endif
+
+#ifdef BSP_USING_AHT10
+#include "sensor_asair_aht10.h"
+
+#define AHT10_I2C_BUS  "i2c4"
+
+int rt_hw_aht10_port(void)
+{
+    struct rt_sensor_config cfg;
+
+    cfg.intf.dev_name  = AHT10_I2C_BUS;
+    cfg.intf.user_data = (void *)AHT10_I2C_ADDR;
+
+    rt_hw_aht10_init("aht10", &cfg);
+
+    return RT_EOK;
+}
+INIT_ENV_EXPORT(rt_hw_aht10_port);
+#endif

bsp/stm32/stm32l476-st-nucleo/.config

@@ -7,6 +7,7 @@
 # RT-Thread Kernel
 #
 CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_ALIGN_SIZE=4
 # CONFIG_RT_THREAD_PRIORITY_8 is not set
@@ -18,7 +19,7 @@ CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
-CONFIG_IDLE_THREAD_STACK_SIZE=256
+CONFIG_IDLE_THREAD_STACK_SIZE=1024
 # CONFIG_RT_USING_TIMER_SOFT is not set
 CONFIG_RT_DEBUG=y
 CONFIG_RT_DEBUG_COLOR=y
@@ -111,6 +112,7 @@ CONFIG_FINSH_ARG_MAX=10
 #
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=64
@@ -124,13 +126,15 @@ CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
 # CONFIG_RT_USING_MTD is not set
-# CONFIG_RT_USING_PM is not set
+CONFIG_RT_USING_PM=y
 CONFIG_RT_USING_RTC=y
+# CONFIG_RT_USING_ALARM is not set
 # CONFIG_RT_USING_SOFT_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
 # CONFIG_RT_USING_SPI is not set
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
 
 #
 # Using WiFi
@@ -158,6 +162,11 @@ CONFIG_RT_USING_LIBC=y
 #
 # CONFIG_RT_USING_SAL is not set
 
+#
+# Network interface device
+#
+# CONFIG_RT_USING_NETDEV is not set
+
 #
 # light weight TCP/IP stack
 #
@@ -181,16 +190,9 @@ CONFIG_RT_USING_LIBC=y
 #
 # Utilities
 #
-# CONFIG_RT_USING_LOGTRACE is not set
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
-
-#
-# ARM CMSIS
-#
-# CONFIG_RT_USING_CMSIS_OS is not set
-# CONFIG_RT_USING_RTT_CMSIS is not set
 # CONFIG_RT_USING_LWP is not set
 
 #
@@ -202,10 +204,12 @@ CONFIG_RT_USING_LIBC=y
 #
 # CONFIG_PKG_USING_PAHOMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
@@ -223,6 +227,7 @@ CONFIG_RT_USING_LIBC=y
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
@@ -236,6 +241,9 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
 
 #
 # security packages
@@ -256,6 +264,7 @@ CONFIG_RT_USING_LIBC=y
 #
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
 
 #
 # tools packages
@@ -267,6 +276,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ADBD is not set
 
 #
 # system packages
@@ -283,10 +293,13 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
 
 #
 # peripheral libraries and drivers
 #
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_AHT10 is not set
@@ -294,6 +307,16 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_MPU6XXX is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_AT24CXX is not set
 
 #
 # miscellaneous packages
@@ -308,10 +331,7 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_ZLIB is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
-
-#
-# sample package
-#
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
 
 #
 # samples: kernel and components samples
@@ -320,11 +340,9 @@ CONFIG_RT_USING_LIBC=y
 # CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
 # CONFIG_PKG_USING_NETWORK_SAMPLES is not set
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
-
-#
-# example package: hello
-#
 # CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_NNOM is not set
 CONFIG_SOC_FAMILY_STM32=y
 CONFIG_SOC_SERIES_STM32L4=y
 

bsp/stm32/stm32l476-st-nucleo/board/CubeMX_Config/Inc/stm32l4xx_hal_conf.h

@@ -69,7 +69,7 @@
 /*#define HAL_IWDG_MODULE_ENABLED   */
 /*#define HAL_LTDC_MODULE_ENABLED   */
 /*#define HAL_LCD_MODULE_ENABLED   */
-/*#define HAL_LPTIM_MODULE_ENABLED   */
+#define HAL_LPTIM_MODULE_ENABLED
 /*#define HAL_NAND_MODULE_ENABLED   */
 /*#define HAL_NOR_MODULE_ENABLED   */
 /*#define HAL_OPAMP_MODULE_ENABLED   */

bsp/stm32/stm32l476-st-nucleo/board/board.c

@@ -5,62 +5,237 @@
  *
  * Change Logs:
  * Date           Author       Notes
- * 2019-02-05     gw        first version
+ * 2019-02-05     gw           first version
+ * 2019-05-05     Zero-Free    Adding multiple  configurations for system clock frequency
  */
 
 #include <board.h>
 
 void SystemClock_Config(void)
 {
-  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
-  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
 #ifdef BSP_USING_ONCHIP_RTC
-  /**Configure LSE Drive Capability 
-  */
-  HAL_PWR_EnableBkUpAccess();
-  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
-#endif  
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
-  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
-  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
-  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
-  RCC_OscInitStruct.PLL.PLLM = 1;
-  RCC_OscInitStruct.PLL.PLLN = 10;
-  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Initializes the CPU, AHB and APB busses clocks 
-  */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
-                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
-  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
-
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
-  PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
-  {
-    Error_Handler();
-  }
-  /**Configure the main internal regulator output voltage 
+    /**Configure LSE Drive Capability
+    */
+    HAL_PWR_EnableBkUpAccess();
+    __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+#endif
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 10;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
+    PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /**Configure the main internal regulator output voltage
+    */
+    if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+#ifdef RT_USING_PM
+
+void SystemClock_MSI_ON(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct   = {0};
+    RCC_ClkInitTypeDef RCC_ClkInitStruct   = {0};
+
+    /* Initializes the CPU, AHB and APB busses clocks */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        RT_ASSERT(0);
+    }
+
+    RCC_ClkInitStruct.ClockType       = RCC_CLOCKTYPE_SYSCLK;
+    RCC_ClkInitStruct.SYSCLKSource    = RCC_SYSCLKSOURCE_MSI;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_MSI_OFF(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+    RCC_OscInitStruct.OscillatorType  = RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.HSIState        = RCC_MSI_OFF;
+    RCC_OscInitStruct.PLL.PLLState    = RCC_PLL_NONE;  /* No update on PLL */
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_80M(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+
+    /**Initializes the CPU, AHB and APB busses clocks */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSICalibrationValue = 16;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 10;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+
+    /**Initializes the CPU, AHB and APB busses clocks
+    */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_24M(void)
+{
+    RCC_OscInitTypeDef RCC_OscInitStruct;
+    RCC_ClkInitTypeDef RCC_ClkInitStruct;
+    RCC_PeriphCLKInitTypeDef PeriphClkInit;
+
+    /** Initializes the CPU, AHB and APB busses clocks */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+    RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+    RCC_OscInitStruct.HSICalibrationValue = 16;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+    RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+    RCC_OscInitStruct.PLL.PLLM = 1;
+    RCC_OscInitStruct.PLL.PLLN = 12;
+    RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
+    RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+    RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV8;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    /** Initializes the CPU, AHB and APB busses clocks */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                                  | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1) != HAL_OK)
+    {
+        Error_Handler();
+    }
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART2;
+    PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+        Error_Handler();
+    }
+}
+
+void SystemClock_2M(void)
+{
+    RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+    RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+
+    /* MSI is enabled after System reset, update MSI to 2Mhz (RCC_MSIRANGE_5) */
+    RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
+    RCC_OscInitStruct.MSIState = RCC_MSI_ON;
+    RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_5;
+    RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
+    RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+    if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+    {
+        /* Initialization Error */
+        Error_Handler();
+    }
+
+    /* Select MSI as system clock source and configure the HCLK, PCLK1 and PCLK2
+       clocks dividers */
+    RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI;
+    RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+    RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+    RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+    {
+        /* Initialization Error */
+        Error_Handler();
+    }
+}
+
+/**
+  * @brief  Configures system clock after wake-up from STOP: enable HSI, PLL
+  *         and select PLL as system clock source.
+  * @param  None
+  * @retval None
   */
-  if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
-  {
-    Error_Handler();
-  }
+void SystemClock_ReConfig(uint8_t mode)
+{
+    SystemClock_MSI_ON();
+
+    switch (mode)
+    {
+    case PM_RUN_MODE_HIGH_SPEED:
+    case PM_RUN_MODE_NORMAL_SPEED:
+        SystemClock_80M();
+        break;
+    case PM_RUN_MODE_MEDIUM_SPEED:
+        SystemClock_24M();
+        break;
+    case PM_RUN_MODE_LOW_SPEED:
+        SystemClock_2M();
+        break;
+    default:
+        break;
+    }
+
+    // SystemClock_MSI_OFF();
 }
+
+#endif

bsp/stm32/stm32l476-st-nucleo/board/board.h

@@ -33,6 +33,17 @@ extern "C" {
 
 void SystemClock_Config(void);
 
+#ifdef RT_USING_PM
+
+void SystemClock_MSI_ON(void);
+void SystemClock_MSI_OFF(void);
+void SystemClock_80M(void);
+void SystemClock_24M(void);
+void SystemClock_2M(void);
+void SystemClock_ReConfig(uint8_t mode);
+
+#endif
+
 #ifdef __cplusplus
 }
 #endif

bsp/stm32/stm32l476-st-nucleo/project.uvprojx

@@ -369,7 +369,7 @@
             <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
             <IncludeLibs />
             <IncludeLibsPath />
-            <Misc> --keep *.o(.rti_fn.*)   --keep *.o(FSymTab)</Misc>
+            <Misc />
             <LinkerInputFile />
             <DisabledWarnings />
           </LDads>
@@ -533,9 +533,16 @@
           </Files>
           <Files>
             <File>
-              <FileName>drv_soft_i2c.c</FileName>
+              <FileName>drv_pm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\HAL_Drivers\drv_soft_i2c.c</FilePath>
+              <FilePath>..\libraries\HAL_Drivers\drv_pm.c</FilePath>
+            </File>
+          </Files>
+          <Files>
+            <File>
+              <FileName>drv_lptim.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\HAL_Drivers\drv_lptim.c</FilePath>
             </File>
           </Files>
           <Files>
@@ -588,30 +595,16 @@
           <GroupName>DeviceDrivers</GroupName>
           <Files>
             <File>
-              <FileName>i2c_core.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\i2c\i2c_core.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>i2c_dev.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\i2c\i2c_dev.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>i2c-bit-ops.c</FileName>
+              <FileName>pin.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\i2c\i2c-bit-ops.c</FilePath>
+              <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>pin.c</FileName>
+              <FileName>pm.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\..\..\components\drivers\misc\pin.c</FilePath>
+              <FilePath>..\..\..\components\drivers\pm\pm.c</FilePath>
             </File>
           </Files>
           <Files>
@@ -875,13 +868,6 @@
               <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rng.c</FilePath>
             </File>
           </Files>
-          <Files>
-            <File>
-              <FileName>stm32l4xx_hal_sram.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_sram.c</FilePath>
-            </File>
-          </Files>
           <Files>
             <File>
               <FileName>stm32l4xx_hal_gpio.c</FileName>
@@ -919,30 +905,23 @@
           </Files>
           <Files>
             <File>
-              <FileName>stm32l4xx_hal_i2c.c</FileName>
-              <FileType>1</FileType>
-              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c.c</FilePath>
-            </File>
-          </Files>
-          <Files>
-            <File>
-              <FileName>stm32l4xx_hal_i2c_ex.c</FileName>
+              <FileName>stm32l4xx_hal_rtc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_i2c_ex.c</FilePath>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>stm32l4xx_hal_rtc.c</FileName>
+              <FileName>stm32l4xx_hal_rtc_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc.c</FilePath>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c</FilePath>
             </File>
           </Files>
           <Files>
             <File>
-              <FileName>stm32l4xx_hal_rtc_ex.c</FileName>
+              <FileName>stm32l4xx_hal_lptim.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_rtc_ex.c</FilePath>
+              <FilePath>..\libraries\STM32L4xx_HAL\STM32L4xx_HAL_Driver\Src\stm32l4xx_hal_lptim.c</FilePath>
             </File>
           </Files>
         </Group>

bsp/stm32/stm32l476-st-nucleo/rtconfig.h

@@ -15,7 +15,7 @@
 #define RT_USING_HOOK
 #define RT_USING_IDLE_HOOK
 #define RT_IDEL_HOOK_LIST_SIZE 4
-#define IDLE_THREAD_STACK_SIZE 256
+#define IDLE_THREAD_STACK_SIZE 1024
 #define RT_DEBUG
 #define RT_DEBUG_COLOR
 
@@ -79,7 +79,10 @@
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
 #define RT_SERIAL_USING_DMA
+#define RT_SERIAL_RB_BUFSZ 64
 #define RT_USING_PIN
+#define RT_USING_PM
+#define RT_USING_RTC
 
 /* Using WiFi */
 
@@ -96,6 +99,9 @@
 /* Socket abstraction layer */
 
 
+/* Network interface device */
+
+
 /* light weight TCP/IP stack */
 
 
@@ -111,9 +117,6 @@
 /* Utilities */
 
 
-/* ARM CMSIS */
-
-
 /* RT-Thread online packages */
 
 /* IoT - internet of things */
@@ -151,13 +154,8 @@
 /* miscellaneous packages */
 
 
-/* sample package */
-
 /* samples: kernel and components samples */
 
-
-/* example package: hello */
-
 #define SOC_FAMILY_STM32
 #define SOC_SERIES_STM32L4
 

bsp/stm32/stm32l496-ali-developer/board/board.h

@@ -39,7 +39,7 @@ extern "C" {
 #define STM32_FLASH_SIZE             (1024 * 1024)
 #define STM32_FLASH_END_ADDRESS      ((uint32_t)(STM32_FLASH_START_ADRESS + STM32_FLASH_SIZE))
 
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
 extern int Image$$RW_IRAM1$$ZI$$Limit;
 #define HEAP_BEGIN      ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

bsp/swm320-lq100/drivers/board.h

@@ -24,7 +24,7 @@
 #endif
 
 #define SRAM_END (SRAM_BASE + SRAM_SIZE)
-#ifdef __CC_ARM
+#if defined(__CC_ARM) || defined(__CLANG_ARM)
     extern int Image$$RW_IRAM1$$ZI$$Limit;
     #define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
 #elif __ICCARM__

components/drivers/include/drivers/pm.h

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2012-06-02     Bernard      the first version
  * 2018-08-02     Tanek        split run and sleep modes, support custom mode
+ * 2019-04-28     Zero-Free    improve PM mode and device ops interface
  */
 
 #ifndef __PM_H__
@@ -16,96 +17,67 @@
 
 #ifndef PM_HAS_CUSTOM_CONFIG
 
-/* All modes used for rt_pm_request() adn rt_pm_release() */
+/* All modes used for rt_pm_request() and rt_pm_release() */
 enum
 {
-    /* run modes */
-    PM_RUN_MODE_NORMAL = 0,
-
     /* sleep modes */
-    PM_SLEEP_MODE_SLEEP,
-    PM_SLEEP_MODE_TIMER,
+    PM_SLEEP_MODE_NONE = 0,
+    PM_SLEEP_MODE_IDLE,
+    PM_SLEEP_MODE_LIGHT,
+    PM_SLEEP_MODE_DEEP,
+    PM_SLEEP_MODE_STANDBY,
     PM_SLEEP_MODE_SHUTDOWN,
+    PM_SLEEP_MODE_MAX,
+};
+
+enum
+{
+    /* run modes*/
+    PM_RUN_MODE_HIGH_SPEED = 0,
+    PM_RUN_MODE_NORMAL_SPEED,
+    PM_RUN_MODE_MEDIUM_SPEED,
+    PM_RUN_MODE_LOW_SPEED,
+    PM_RUN_MODE_MAX,
+};
+
+enum
+{
+    RT_PM_FREQUENCY_PENDING = 0x01,
 };
 
+#define RT_PM_DEFAULT_SLEEP_MODE PM_SLEEP_MODE_IDLE
+#define RT_PM_DEFAULT_RUN_MODE   PM_RUN_MODE_NORMAL_SPEED
+
 /* The name of all modes used in the msh command "pm_dump" */
-#define PM_MODE_NAMES           \
+#define PM_SLEEP_MODE_NAMES     \
 {                               \
-    "Running Mode",             \
-                                \
-    "Sleep Mode",               \
-    "Timer Mode",               \
+    "None Mode",                \
+    "Idle Mode",                \
+    "LightSleep Mode",          \
+    "DeepSleep Mode",           \
+    "Standby Mode",             \
     "Shutdown Mode",            \
 }
 
-/* run mode count : 1 */
-#define PM_RUN_MODE_COUNT       1
-/* sleep mode count : 3 */
-#define PM_SLEEP_MODE_COUNT     3
-
-/* support redefining default run mode */
-#ifndef PM_RUN_MODE_DEFAULT
-#define PM_RUN_MODE_DEFAULT     0
-#endif
-
-/* support redefining default sleep mode */
-#ifndef PM_SLEEP_MODE_DEFAULT
-#define PM_SLEEP_MODE_DEFAULT   (PM_SLEEP_MODE_START)
-#endif
-
-/* support redefining the minimum tick into sleep mode */
-#ifndef PM_MIN_ENTER_SLEEP_TICK
-#define PM_MIN_ENTER_SLEEP_TICK   (1)
-#endif
+#define PM_RUN_MODE_NAMES       \
+{                               \
+    "High Speed",               \
+    "Normal Speed",             \
+    "Medium Speed",             \
+    "Low Mode",                 \
+}
 
 #else /* PM_HAS_CUSTOM_CONFIG */
 
 #include <pm_cfg.h>
 
-#ifndef PM_RUN_MODE_COUNT
-#error  "You must defined PM_RUN_MODE_COUNT on pm_cfg.h"
-#endif
-
-#ifndef PM_SLEEP_MODE_COUNT
-#error  "You must defined PM_SLEEP_MODE_COUNT on pm_cfg.h"
-#endif
-
-#ifndef PM_MODE_DEFAULT
-#error  "You must defined PM_MODE_DEFAULT on pm_cfg.h"
-#endif
-
-#ifndef PM_MODE_NAMES
-#error  "You must defined PM_MODE_NAMES on pm_cfg.h"
-#endif
-
-#ifndef PM_RUN_MODE_DEFAULT
-#error  "You must defined PM_RUN_MODE_DEFAULT on pm_cfg.h"
-#endif
-
-/* The default sleep mode(PM_SLEEP_MODE_DEFAULT) are not required.
- * If the default mode is defined, it is requested once in rt_system_pm_init()
- */
-
 #endif /* PM_HAS_CUSTOM_CONFIG */
 
-/* run mode must start at 0 */
-#define PM_RUN_MODE_START       0
-/* the values of the run modes and sleep mode must be consecutive */
-#define PM_SLEEP_MODE_START     PM_RUN_MODE_COUNT
-/* all mode count */
-#define PM_MODE_COUNT           (PM_RUN_MODE_COUNT + PM_SLEEP_MODE_COUNT)
-/* The last mode, will be request in rt_system_pm_init() */
-#define PM_MODE_MAX             (PM_RUN_MODE_COUNT + PM_SLEEP_MODE_COUNT - 1)
-
-#if PM_MODE_COUNT > 32
-#error "The number of modes cannot exceed 32"
-#endif
-
 /**
  * device control flag to request or release power
  */
 #define RT_PM_DEVICE_CTRL_REQUEST   0x01
-#define RT_PM_DEVICE_CTRL_RELEASE   0x02
+#define RT_PM_DEVICE_CTRL_RELEASE   0x00
 
 struct rt_pm;
 
@@ -114,13 +86,8 @@ struct rt_pm;
  */
 struct rt_pm_ops
 {
-    void (*enter)(struct rt_pm *pm);
-    void (*exit)(struct rt_pm *pm);
-
-#if PM_RUN_MODE_COUNT > 1
-    void (*frequency_change)(struct rt_pm *pm, rt_uint32_t frequency);
-#endif
-
+    void (*sleep)(struct rt_pm *pm, uint8_t mode);
+    void (*run)(struct rt_pm *pm, uint8_t mode);
     void (*timer_start)(struct rt_pm *pm, rt_uint32_t timeout);
     void (*timer_stop)(struct rt_pm *pm);
     rt_tick_t (*timer_get_tick)(struct rt_pm *pm);
@@ -128,18 +95,15 @@ struct rt_pm_ops
 
 struct rt_device_pm_ops
 {
-#if PM_RUN_MODE_COUNT > 1
-    void (*frequency_change)(const struct rt_device* device);
-#endif
-
-    void (*suspend)(const struct rt_device* device);
-    void (*resume) (const struct rt_device* device);
+    int (*suspend)(const struct rt_device *device, uint8_t mode);
+    void (*resume)(const struct rt_device *device, uint8_t mode);
+    int (*frequency_change)(const struct rt_device *device, uint8_t mode);
 };
 
 struct rt_device_pm
 {
-    const struct rt_device* device;
-    const struct rt_device_pm_ops* ops;
+    const struct rt_device *device;
+    const struct rt_device_pm_ops *ops;
 };
 
 /**
@@ -150,32 +114,45 @@ struct rt_pm
     struct rt_device parent;
 
     /* modes */
-    rt_uint8_t modes[PM_MODE_COUNT];
-    rt_uint8_t current_mode;    /* current pm mode */
-    rt_uint8_t exit_count;
+    rt_uint8_t modes[PM_SLEEP_MODE_MAX];
+    rt_uint8_t sleep_mode;    /* current sleep mode */
+    rt_uint8_t run_mode;      /* current running mode */
 
     /* the list of device, which has PM feature */
     rt_uint8_t device_pm_number;
-    struct rt_device_pm* device_pm;
-    struct rt_semaphore  device_lock;
+    struct rt_device_pm *device_pm;
 
     /* if the mode has timer, the corresponding bit is 1*/
-    rt_uint32_t timer_mask;
+    rt_uint8_t timer_mask;
+    rt_uint8_t flags;
 
     const struct rt_pm_ops *ops;
 };
 
-void rt_pm_enter(void);
-void rt_pm_exit(void);
+enum
+{
+    RT_PM_ENTER_SLEEP = 0,
+    RT_PM_EXIT_SLEEP,
+};
+
+struct rt_pm_notify
+{
+    void (*notify)(uint8_t event, uint8_t mode, void *data);
+    void *data;
+};
+
+void rt_pm_request(uint8_t sleep_mode);
+void rt_pm_release(uint8_t sleep_mode);
+int rt_pm_run_enter(uint8_t run_mode);
 
-void rt_pm_request(rt_ubase_t mode);
-void rt_pm_release(rt_ubase_t mode);
+void rt_pm_device_register(struct rt_device *device, const struct rt_device_pm_ops *ops);
+void rt_pm_device_unregister(struct rt_device *device);
 
-void rt_pm_register_device(struct rt_device* device, const struct rt_device_pm_ops* ops);
-void rt_pm_unregister_device(struct rt_device* device);
+void rt_pm_notify_set(void (*notify)(uint8_t event, uint8_t mode, void *data), void *data);
+void rt_pm_default_set(uint8_t sleep_mode);
 
 void rt_system_pm_init(const struct rt_pm_ops *ops,
-                       rt_uint8_t              timer_mask,
-                       void                   *user_data);
+                       uint8_t              timer_mask,
+                       void                 *user_data);
 
 #endif /* __PM_H__ */

components/drivers/pm/pm.c

@@ -7,6 +7,7 @@
  * Date           Author       Notes
  * 2012-06-02     Bernard      the first version
  * 2018-08-02     Tanek        split run and sleep modes, support custom mode
+ * 2019-04-28     Zero-Free    improve PM mode and device ops interface
  */
 
 #include <rthw.h>
@@ -16,27 +17,46 @@
 #ifdef RT_USING_PM
 
 static struct rt_pm _pm;
+static uint8_t _pm_default_sleep = RT_PM_DEFAULT_SLEEP_MODE;
+static struct rt_pm_notify _pm_notify;
+static uint8_t _pm_init_flag = 0;
+
+#define RT_PM_TICKLESS_THRESH (2)
+
+RT_WEAK uint32_t rt_pm_enter_critical(uint8_t sleep_mode)
+{
+    return rt_hw_interrupt_disable();
+}
+
+RT_WEAK void rt_pm_exit_critical(uint32_t ctx, uint8_t sleep_mode)
+{
+    rt_hw_interrupt_enable(ctx);
+}
 
 /**
  * This function will suspend all registered devices
  */
-static void _pm_device_suspend(void)
+static int _pm_device_suspend(uint8_t mode)
 {
-    int index;
+    int index, ret = RT_EOK;
 
     for (index = 0; index < _pm.device_pm_number; index++)
     {
         if (_pm.device_pm[index].ops->suspend != RT_NULL)
         {
-            _pm.device_pm[index].ops->suspend(_pm.device_pm[index].device);
+            ret = _pm.device_pm[index].ops->suspend(_pm.device_pm[index].device, mode);
+            if(ret != RT_EOK)
+                break; 
         }
     }
+
+    return ret;
 }
 
 /**
  * This function will resume all registered devices
  */
-static void _pm_device_resume(void)
+static void _pm_device_resume(uint8_t mode)
 {
     int index;
 
@@ -44,16 +64,15 @@ static void _pm_device_resume(void)
     {
         if (_pm.device_pm[index].ops->resume != RT_NULL)
         {
-            _pm.device_pm[index].ops->resume(_pm.device_pm[index].device);
+            _pm.device_pm[index].ops->resume(_pm.device_pm[index].device, mode);
         }
     }
 }
 
-#if PM_RUN_MODE_COUNT > 1
 /**
  * This function will update the frequency of all registered devices
  */
-static void _pm_device_frequency_change(void)
+static void _pm_device_frequency_change(uint8_t mode)
 {
     rt_uint32_t index;
 
@@ -61,152 +80,151 @@ static void _pm_device_frequency_change(void)
     for (index = 0; index < _pm.device_pm_number; index ++)
     {
         if (_pm.device_pm[index].ops->frequency_change != RT_NULL)
-            _pm.device_pm[index].ops->frequency_change(_pm.device_pm[index].device);
+            _pm.device_pm[index].ops->frequency_change(_pm.device_pm[index].device, mode);
     }
 }
-#endif
 
 /**
- * This function will enter corresponding power mode.
+ * This function will update the system clock frequency when idle
  */
-void rt_pm_enter(void)
+static void _pm_frequency_scaling(struct rt_pm *pm)
 {
-    rt_ubase_t level;
-    struct rt_pm *pm;
-    rt_uint32_t index;
-    rt_tick_t timeout_tick;
+    rt_base_t level;
 
-    pm = &_pm;
+    if (pm->flags & RT_PM_FREQUENCY_PENDING)
+    {
+        level = rt_hw_interrupt_disable();
+        /* change system runing mode */
+        pm->ops->run(pm, pm->run_mode);
+        /* changer device frequency */
+        _pm_device_frequency_change(pm->run_mode);
+        pm->flags &= ~RT_PM_FREQUENCY_PENDING;
+        rt_hw_interrupt_enable(level);
+    }
+}
 
-    /* disable interrupt before check run modes */
-    level = rt_hw_interrupt_disable();
-    /* check each run mode, and decide to swithc to run mode or sleep mode */
-    for (index = 0; index < PM_RUN_MODE_COUNT; index++)
+/**
+ * This function selects the sleep mode according to the rt_pm_request/rt_pm_release count.
+ */
+static uint8_t _pm_select_sleep_mode(struct rt_pm *pm)
+{
+    int index;
+    uint8_t mode;
+
+    mode = _pm_default_sleep;
+    for (index = PM_SLEEP_MODE_NONE; index < PM_SLEEP_MODE_MAX; index ++)
     {
         if (pm->modes[index])
         {
-            if (index > pm->current_mode)
-            {
-                pm->ops->exit(pm);
-                pm->current_mode = index;
-                pm->ops->enter(pm);
-#if PM_RUN_MODE_COUNT > 1
-                pm->ops->frequency_change(pm, 0);
-                _pm_device_frequency_change();
-#endif
-            }
-
-            rt_hw_interrupt_enable(level);
-            /* The current mode is run mode, no need to check sleep mode */
-            return ;
+            mode = index;
+            break;
         }
     }
-    /* enable interrupt after check run modes */
-    rt_hw_interrupt_enable(level);
+    pm->sleep_mode = mode;
 
-    level = rt_hw_interrupt_disable();
-    /* check each sleep mode to decide which mode can system sleep. */
-    for (index = PM_SLEEP_MODE_START; index < PM_SLEEP_MODE_START + PM_SLEEP_MODE_COUNT; index++)
+    return mode;
+}
+
+/**
+ * This function changes the power sleep mode base on the result of selection
+ */
+static void _pm_change_sleep_mode(struct rt_pm *pm, uint8_t mode)
+{
+    rt_tick_t timeout_tick, delta_tick;
+    rt_base_t level;
+    int ret = RT_EOK;
+
+    if (mode == PM_SLEEP_MODE_NONE)
     {
-        if (pm->modes[index])
-        {
-            /* let mcu sleep when system is idle */
+        pm->sleep_mode = mode;
+        pm->ops->sleep(pm, PM_SLEEP_MODE_NONE);
+    }
+    else
+    {
+        level = rt_pm_enter_critical(mode);
 
-            /* run mode to sleep mode */
-            if (pm->current_mode < PM_SLEEP_MODE_START)
-            {
-                /* exit run mode */
-                pm->ops->exit(pm);
-            }
+        /* Notify app will enter sleep mode */
+        if (_pm_notify.notify)
+            _pm_notify.notify(RT_PM_ENTER_SLEEP, mode, _pm_notify.data);
 
-            /* set current power mode */
-            pm->current_mode = index;
-            pm->exit_count = 1;
+        /* Suspend all peripheral device */
+        ret = _pm_device_suspend(mode);
+        if (ret != RT_EOK)
+        {
+            _pm_device_resume(mode);
+            if (_pm_notify.notify)
+                _pm_notify.notify(RT_PM_EXIT_SLEEP, mode, _pm_notify.data);
+            rt_pm_exit_critical(level, mode);
 
-            /* suspend all of devices with PM feature */
-            _pm_device_suspend();
+            return;
+        }
 
-            /* should start pm timer */
-            if (pm->timer_mask & (1 << index))
+        /* Tickless*/
+        if (pm->timer_mask & (0x01 << mode))
+        {
+            timeout_tick = rt_timer_next_timeout_tick();
+            if (timeout_tick == RT_TICK_MAX)
             {
-                /* get next os tick */
-                timeout_tick = rt_timer_next_timeout_tick();
-                if (timeout_tick != RT_TICK_MAX)
+                if (pm->ops->timer_start)
                 {
-                    timeout_tick -= rt_tick_get();
-
-#if defined(PM_MIN_ENTER_SLEEP_TICK) && PM_MIN_ENTER_SLEEP_TICK > 0
-                    if (timeout_tick < PM_MIN_ENTER_SLEEP_TICK)
-                    {
-                        rt_hw_interrupt_enable(level);
-                        /* limit the minimum time to enter timer sleep mode */
-                        return ;
-                    }
-#endif
+                    pm->ops->timer_start(pm, RT_TICK_MAX);
                 }
-                /* startup pm timer */
-                pm->ops->timer_start(pm, timeout_tick);
             }
+            else
+            {
+                timeout_tick = timeout_tick - rt_tick_get();
+                if (timeout_tick < RT_PM_TICKLESS_THRESH)
+                {
+                    mode = PM_SLEEP_MODE_IDLE;
+                }
+                else
+                {
+                    pm->ops->timer_start(pm, timeout_tick);
+                }
+            }
+        }
 
-            /* enter sleep and wait to be waken up */
-            pm->ops->enter(pm);
-
-            /* exit from low power mode */
-            rt_pm_exit();
+        /* enter lower power state */
+        pm->ops->sleep(pm, mode);
 
-            rt_hw_interrupt_enable(level);
-            return ;
+        /* wake up from lower power state*/
+        if (pm->timer_mask & (0x01 << mode))
+        {
+            delta_tick = pm->ops->timer_get_tick(pm);
+            pm->ops->timer_stop(pm);
+            if (delta_tick)
+            {
+                rt_tick_set(rt_tick_get() + delta_tick);
+                rt_timer_check();
+            }
         }
-    }
 
-    rt_hw_interrupt_enable(level);
+        /* resume all device */
+        _pm_device_resume(pm->sleep_mode);
+
+        if (_pm_notify.notify)
+            _pm_notify.notify(RT_PM_EXIT_SLEEP, mode, _pm_notify.data);
+
+        rt_pm_exit_critical(level, mode);
+    }
 }
 
 /**
- * This function exits from sleep mode.
+ * This function will enter corresponding power mode.
  */
-void rt_pm_exit(void)
+void rt_system_power_manager(void)
 {
-    rt_ubase_t level;
-    struct rt_pm *pm;
-    rt_tick_t delta_tick;
-
-    pm = &_pm;
-
-    level = rt_hw_interrupt_disable();
-
-    if (pm->exit_count)
-    {
-        pm->exit_count = 0;
-
-        if (pm->current_mode >= PM_SLEEP_MODE_START)
-        {
-            /* sleep mode with timer */
-            if (pm->timer_mask & (1 << pm->current_mode))
-            {
-                /* get the tick of pm timer */
-                delta_tick = pm->ops->timer_get_tick(pm);
-
-                /* stop pm timer */
-                pm->ops->timer_stop(pm);
+    uint8_t mode;
 
-                if (delta_tick)
-                {
-                    /* adjust OS tick */
-                    rt_tick_set(rt_tick_get() + delta_tick);
-                    /* check system timer */
-                    rt_timer_check();
-                }
-            }
+    if (_pm_init_flag == 0)
+        return;
 
-            /* exit from sleep mode */
-            pm->ops->exit(pm);
-            /* resume the device with PM feature */
-            _pm_device_resume();
-        }
-    }
+    /* CPU frequency scaling according to the runing mode settings */
+    _pm_frequency_scaling(&_pm);
 
-    rt_hw_interrupt_enable(level);
+    /* Low Power Mode Processing */
+    mode = _pm_select_sleep_mode(&_pm);
+    _pm_change_sleep_mode(&_pm, mode);
 }
 
 /**
@@ -215,60 +233,21 @@ void rt_pm_exit(void)
  *
  * @param parameter the parameter of run mode or sleep mode
  */
-void rt_pm_request(rt_ubase_t mode)
+void rt_pm_request(uint8_t mode)
 {
-    rt_ubase_t level;
+    rt_base_t level;
     struct rt_pm *pm;
 
-    pm = &_pm;
+    if (_pm_init_flag == 0)
+        return;
 
-    if (mode > PM_MODE_MAX)
+    if (mode > (PM_SLEEP_MODE_MAX - 1))
         return;
 
     level = rt_hw_interrupt_disable();
-
-    /* update pm modes table */
-    pm->modes[mode] ++;
-
-    /* request higter mode with a smaller mode value*/
-    if (mode < pm->current_mode)
-    {
-        /* the old current mode is RUN mode, need to all pm->ops->exit(),
-         * if not, it has already called in rt_pm_exit()
-         */
-        if (pm->current_mode < PM_SLEEP_MODE_START)
-        {
-            pm->ops->exit(pm);
-        }
-        else if (pm->exit_count)
-        {
-            /* call exeit when global interrupt is disable */
-            pm->ops->exit(pm);
-            pm->exit_count = 0;
-        }
-
-        /* update current mode */
-        pm->current_mode = mode;
-
-        /* current mode is higher run mode */
-        if (mode < PM_SLEEP_MODE_START)
-        {
-            /* enter run mode */
-            pm->ops->enter(pm);
-#if PM_RUN_MODE_COUNT > 1
-            /* frequency change */
-            pm->ops->frequency_change(pm, 0);
-            _pm_device_frequency_change();
-#endif
-        }
-        else
-        {
-            /* do nothing when request higher sleep mode,
-             * and swithc to new sleep mode in rt_pm_enter()
-             */
-        }
-    }
-
+    pm = &_pm;
+    if (pm->modes[mode] < 255)
+        pm->modes[mode] ++;
     rt_hw_interrupt_enable(level);
 }
 
@@ -279,21 +258,21 @@ void rt_pm_request(rt_ubase_t mode)
  * @param parameter the parameter of run mode or sleep mode
  *
  */
-void rt_pm_release(rt_ubase_t mode)
+void rt_pm_release(uint8_t mode)
 {
     rt_ubase_t level;
     struct rt_pm *pm;
 
-    pm = &_pm;
+    if (_pm_init_flag == 0)
+        return;
 
-    if (mode > PM_MODE_MAX)
+    if (mode > (PM_SLEEP_MODE_MAX - 1))
         return;
 
     level = rt_hw_interrupt_disable();
-
+    pm = &_pm;
     if (pm->modes[mode] > 0)
         pm->modes[mode] --;
-
     rt_hw_interrupt_enable(level);
 }
 
@@ -303,9 +282,9 @@ void rt_pm_release(rt_ubase_t mode)
  * @param device the device with PM feature
  * @param ops the PM ops for device
  */
-void rt_pm_register_device(struct rt_device *device, const struct rt_device_pm_ops *ops)
+void rt_pm_device_register(struct rt_device *device, const struct rt_device_pm_ops *ops)
 {
-    rt_ubase_t level;
+    rt_base_t level;
     struct rt_device_pm *device_pm;
 
     RT_DEBUG_NOT_IN_INTERRUPT;
@@ -322,8 +301,6 @@ void rt_pm_register_device(struct rt_device *device, const struct rt_device_pm_o
         _pm.device_pm_number += 1;
     }
 
-    rt_sem_release(&(_pm.device_lock));
-
     rt_hw_interrupt_enable(level);
 }
 
@@ -332,7 +309,7 @@ void rt_pm_register_device(struct rt_device *device, const struct rt_device_pm_o
  *
  * @param device the device with PM feature
  */
-void rt_pm_unregister_device(struct rt_device *device)
+void rt_pm_device_unregister(struct rt_device *device)
 {
     rt_ubase_t level;
     rt_uint32_t index;
@@ -362,6 +339,23 @@ void rt_pm_unregister_device(struct rt_device *device)
     rt_hw_interrupt_enable(level);
 }
 
+/**
+ * This function set notification callback for application
+ */
+void rt_pm_notify_set(void (*notify)(uint8_t event, uint8_t mode, void *data), void *data)
+{
+    _pm_notify.notify = notify;
+    _pm_notify.data = data;
+}
+
+/**
+ * This function set default sleep mode when no pm_request
+ */
+void rt_pm_default_set(uint8_t sleep_mode)
+{
+    _pm_default_sleep = sleep_mode;
+}
+
 /**
  * RT-Thread device interface for PM device
  */
@@ -377,7 +371,7 @@ static rt_size_t _rt_pm_device_read(rt_device_t dev,
     pm = (struct rt_pm *)dev;
     RT_ASSERT(pm != RT_NULL);
 
-    if (pos <= PM_MODE_MAX)
+    if (pos < PM_SLEEP_MODE_MAX)
     {
         int mode;
 
@@ -399,11 +393,11 @@ static rt_size_t _rt_pm_device_write(rt_device_t dev,
     {
         /* get request */
         request = *(unsigned char *)buffer;
-        if (request == '1')
+        if (request ==  0x01)
         {
             rt_pm_request(pos);
         }
-        else if (request == '0')
+        else if (request == 0x00)
         {
             rt_pm_release(pos);
         }
@@ -434,6 +428,36 @@ static rt_err_t _rt_pm_device_control(rt_device_t dev,
     return RT_EOK;
 }
 
+int rt_pm_run_enter(uint8_t mode)
+{
+    rt_base_t level;
+    struct rt_pm *pm;
+
+    if (_pm_init_flag == 0)
+        return -RT_EIO;
+
+    if (mode > PM_RUN_MODE_MAX)
+        return -RT_EINVAL;
+
+    level = rt_hw_interrupt_disable();
+    pm = &_pm;
+    if (mode < pm->run_mode)
+    {
+        /* change system runing mode */
+        pm->ops->run(pm, mode);
+        /* changer device frequency */
+        _pm_device_frequency_change(mode);
+    }
+    else
+    {
+        pm->flags |= RT_PM_FREQUENCY_PENDING;
+    }
+    pm->run_mode = mode;
+    rt_hw_interrupt_enable(level);
+
+    return RT_EOK;
+}
+
 /**
  * This function will initialize power management.
  *
@@ -466,12 +490,9 @@ void rt_system_pm_init(const struct rt_pm_ops *ops,
     /* register PM device to the system */
     rt_device_register(device, "pm", RT_DEVICE_FLAG_RDWR);
 
-    /* todo : add to kernel source code */
-    rt_thread_idle_sethook(rt_pm_enter);
-
     rt_memset(pm->modes, 0, sizeof(pm->modes));
-    pm->current_mode = PM_RUN_MODE_DEFAULT;
-
+    pm->sleep_mode = _pm_default_sleep;
+    pm->run_mode   = RT_PM_DEFAULT_RUN_MODE;
     pm->timer_mask = timer_mask;
 
     pm->ops = ops;
@@ -479,24 +500,15 @@ void rt_system_pm_init(const struct rt_pm_ops *ops,
     pm->device_pm = RT_NULL;
     pm->device_pm_number = 0;
 
-    /* initialize semaphore */
-    rt_sem_init(&(pm->device_lock), "pm", 1, RT_IPC_FLAG_FIFO);
-
-    /* request in default running mode */
-    rt_pm_request(PM_RUN_MODE_DEFAULT);
-
-#ifdef PM_SLEEP_MODE_DEFAULT
-    /* request in default sleep mode */
-    rt_pm_request(PM_SLEEP_MODE_DEFAULT);
-#endif
-
-    /* must hold on deep shutdown mode */
-    rt_pm_request(PM_MODE_MAX);
+    _pm_init_flag = 1;
 }
 
 #ifdef RT_USING_FINSH
 #include <finsh.h>
 
+static const char *_pm_sleep_str[] = PM_SLEEP_MODE_NAMES;
+static const char *_pm_run_str[] = PM_RUN_MODE_NAMES;
+
 static void rt_pm_release_mode(int argc, char **argv)
 {
     int mode = 0;
@@ -521,9 +533,20 @@ static void rt_pm_request_mode(int argc, char **argv)
 }
 MSH_CMD_EXPORT_ALIAS(rt_pm_request_mode, pm_request, request power management mode);
 
+static void rt_pm_run_mode_switch(int argc, char **argv)
+{
+    int mode = 0;
+    if (argc >= 2)
+    {
+        mode = atoi(argv[1]);
+    }
+
+    rt_pm_run_enter(mode);
+}
+MSH_CMD_EXPORT_ALIAS(rt_pm_run_mode_switch, pm_run, switch power management run mode);
+
 static void rt_pm_dump_status(void)
 {
-    static const char *pm_str[] = PM_MODE_NAMES;
     rt_uint32_t index;
     struct rt_pm *pm;
 
@@ -531,17 +554,18 @@ static void rt_pm_dump_status(void)
 
     rt_kprintf("| Power Management Mode | Counter | Timer |\n");
     rt_kprintf("+-----------------------+---------+-------+\n");
-    for (index = 0; index <= PM_MODE_MAX; index ++)
+    for (index = 0; index < PM_SLEEP_MODE_MAX; index ++)
     {
         int has_timer = 0;
         if (pm->timer_mask & (1 << index))
             has_timer = 1;
 
-        rt_kprintf("| %021s | %7d | %5d |\n", pm_str[index], pm->modes[index], has_timer);
+        rt_kprintf("| %021s | %7d | %5d |\n", _pm_sleep_str[index], pm->modes[index], has_timer);
     }
     rt_kprintf("+-----------------------+---------+-------+\n");
 
-    rt_kprintf("pm current mode: %s\n", pm_str[pm->current_mode]);
+    rt_kprintf("pm current sleep mode: %s\n", _pm_sleep_str[pm->sleep_mode]);
+    rt_kprintf("pm current run mode:   %s\n", _pm_run_str[pm->run_mode]);
 }
 FINSH_FUNCTION_EXPORT_ALIAS(rt_pm_dump_status, pm_dump, dump power management status);
 MSH_CMD_EXPORT_ALIAS(rt_pm_dump_status, pm_dump, dump power management status);

components/drivers/sdio/sd.c

@@ -264,7 +264,7 @@ static rt_int32_t mmcsd_switch(struct rt_mmcsd_card *card)
 
     if ((buf[16] & 0xF) != 1) 
     {
-        LOG_E("switching card to high speed failed!");
+        LOG_I("switching card to high speed failed!");
         goto err;
     }
 

components/drivers/sensors/sensor.h

@@ -19,7 +19,7 @@ extern "C" {
 #endif
 
 #ifdef RT_USING_RTC
-#define  rt_sensor_get_ts()  time()          /* API for the sensor to get the timestamp */
+#define  rt_sensor_get_ts()  time(RT_NULL)   /* API for the sensor to get the timestamp */
 #else
 #define  rt_sensor_get_ts()  rt_tick_get()   /* API for the sensor to get the timestamp */
 #endif

components/drivers/sensors/sensor_cmd.c

@@ -24,13 +24,13 @@ static void sensor_show_data(rt_size_t num, rt_sensor_t sensor, struct rt_sensor
     switch (sensor->info.type)
     {
     case RT_SENSOR_CLASS_ACCE:
-        LOG_I("num:%3d, x:%5d, y:%5d, z:%5d, timestamp:%5d", num, sensor_data->data.acce.x, sensor_data->data.acce.y, sensor_data->data.acce.z, sensor_data->timestamp);
+        LOG_I("num:%3d, x:%5d, y:%5d, z:%5d mg, timestamp:%5d", num, sensor_data->data.acce.x, sensor_data->data.acce.y, sensor_data->data.acce.z, sensor_data->timestamp);
         break;
     case RT_SENSOR_CLASS_GYRO:
-        LOG_I("num:%3d, x:%8d, y:%8d, z:%8d, timestamp:%5d", num, sensor_data->data.gyro.x, sensor_data->data.gyro.y, sensor_data->data.gyro.z, sensor_data->timestamp);
+        LOG_I("num:%3d, x:%8d, y:%8d, z:%8d dps, timestamp:%5d", num, sensor_data->data.gyro.x / 1000, sensor_data->data.gyro.y / 1000, sensor_data->data.gyro.z / 1000, sensor_data->timestamp);
         break;
     case RT_SENSOR_CLASS_MAG:
-        LOG_I("num:%3d, x:%5d, y:%5d, z:%5d, timestamp:%5d", num, sensor_data->data.mag.x, sensor_data->data.mag.y, sensor_data->data.mag.z, sensor_data->timestamp);
+        LOG_I("num:%3d, x:%5d, y:%5d, z:%5d mGauss, timestamp:%5d", num, sensor_data->data.mag.x, sensor_data->data.mag.y, sensor_data->data.mag.z, sensor_data->timestamp);
         break;
     case RT_SENSOR_CLASS_HUMI:
         LOG_I("num:%3d, humi:%3d.%d%%, timestamp:%5d", num, sensor_data->data.humi / 10, sensor_data->data.humi % 10, sensor_data->timestamp);
@@ -39,7 +39,7 @@ static void sensor_show_data(rt_size_t num, rt_sensor_t sensor, struct rt_sensor
         LOG_I("num:%3d, temp:%3d.%dC, timestamp:%5d", num, sensor_data->data.temp / 10, sensor_data->data.temp % 10, sensor_data->timestamp);
         break;
     case RT_SENSOR_CLASS_BARO:
-        LOG_I("num:%3d, press:%5d, timestamp:%5d", num, sensor_data->data.baro, sensor_data->timestamp);
+        LOG_I("num:%3d, press:%5d pa, timestamp:%5d", num, sensor_data->data.baro, sensor_data->timestamp);
         break;
     case RT_SENSOR_CLASS_STEP:
         LOG_I("num:%3d, step:%5d, timestamp:%5d", num, sensor_data->data.step, sensor_data->timestamp);

components/drivers/serial/serial.c

@@ -675,6 +675,7 @@ static rt_err_t rt_serial_open(struct rt_device *dev, rt_uint16_t oflag)
             serial->serial_tx = tx_dma;
 
             dev->open_flag |= RT_DEVICE_FLAG_DMA_TX;
+            /* configure low level device */
             serial->ops->control(serial, RT_DEVICE_CTRL_CONFIG, (void *)RT_DEVICE_FLAG_DMA_TX);
         }
 #endif /* RT_SERIAL_USING_DMA */

components/libc/Kconfig

@@ -8,6 +8,12 @@ config RT_USING_PTHREADS
     bool "Enable pthreads APIs"
     default n
 
+if RT_USING_PTHREADS
+    config PTHREAD_NUM_MAX
+    int "Maximum number of pthreads"
+    default 8
+endif
+
 if RT_USING_LIBC && RT_USING_DFS
     config RT_USING_POSIX
         bool "Enable POSIX layer for poll/select, stdin etc"

components/libc/pthreads/pthread.c

@@ -10,10 +10,121 @@
  * 2019-02-07     Bernard      Add _pthread_destroy to release pthread resource.
  */
 
+#include <rthw.h>
 #include <pthread.h>
 #include <sched.h>
 #include "pthread_internal.h"
 
+RT_DEFINE_SPINLOCK(pth_lock);
+_pthread_data_t *pth_table[PTHREAD_NUM_MAX] = {NULL};
+
+_pthread_data_t *_pthread_get_data(pthread_t thread)
+{
+    RT_DECLARE_SPINLOCK(pth_lock);
+    _pthread_data_t *ptd;
+
+    if (thread >= PTHREAD_NUM_MAX) return NULL;
+
+    rt_hw_spin_lock(&pth_lock);
+    ptd = pth_table[thread];
+    rt_hw_spin_unlock(&pth_lock);
+
+    if (ptd && ptd->magic == PTHREAD_MAGIC) return ptd;
+
+    return NULL;
+}
+
+pthread_t _pthread_data_get_pth(_pthread_data_t *ptd)
+{
+    int index;
+    RT_DECLARE_SPINLOCK(pth_lock);
+
+    rt_hw_spin_lock(&pth_lock);
+    for (index = 0; index < PTHREAD_NUM_MAX; index ++)
+    {
+        if (pth_table[index] == ptd) break;
+    }
+    rt_hw_spin_unlock(&pth_lock);
+
+    return index;
+}
+
+pthread_t _pthread_data_create(void)
+{
+    int index;
+    _pthread_data_t *ptd = NULL;
+    RT_DECLARE_SPINLOCK(pth_lock);
+
+    ptd = (_pthread_data_t*)rt_malloc(sizeof(_pthread_data_t));
+    if (!ptd) return PTHREAD_NUM_MAX;
+
+    memset(ptd, 0x0, sizeof(_pthread_data_t));
+    ptd->canceled = 0;
+    ptd->cancelstate = PTHREAD_CANCEL_DISABLE;
+    ptd->canceltype = PTHREAD_CANCEL_DEFERRED;
+    ptd->magic = PTHREAD_MAGIC;
+
+    rt_hw_spin_lock(&pth_lock);
+    for (index = 0; index < PTHREAD_NUM_MAX; index ++)
+    {
+        if (pth_table[index] == NULL)
+        {
+            pth_table[index] = ptd;
+            break;
+        }
+    }
+    rt_hw_spin_unlock(&pth_lock);
+
+    /* full of pthreads, clean magic and release ptd */
+    if (index == PTHREAD_NUM_MAX)
+    {
+        ptd->magic = 0x0;
+        rt_free(ptd);
+    }
+
+    return index;
+}
+
+void _pthread_data_destroy(pthread_t pth)
+{
+    RT_DECLARE_SPINLOCK(pth_lock);
+
+    _pthread_data_t *ptd = _pthread_get_data(pth);
+    if (ptd)
+    {
+        /* remove from pthread table */
+        rt_hw_spin_lock(&pth_lock);
+        pth_table[pth] = NULL;
+        rt_hw_spin_unlock(&pth_lock);
+
+        /* delete joinable semaphore */
+        if (ptd->joinable_sem != RT_NULL)
+            rt_sem_delete(ptd->joinable_sem);
+
+        /* release thread resource */
+        if (ptd->attr.stackaddr == RT_NULL)
+        {
+            /* release thread allocated stack */
+            rt_free(ptd->tid->stack_addr);
+        }
+        /* clean stack addr pointer */
+        ptd->tid->stack_addr = RT_NULL;
+
+        /*
+        * if this thread create the local thread data,
+        * delete it
+        */
+        if (ptd->tls != RT_NULL) rt_free(ptd->tls);
+        rt_free(ptd->tid);
+
+        /* clean magic */
+        ptd->magic = 0x0;
+
+        /* free ptd */
+        rt_free(ptd);
+    }
+}
+
 int pthread_system_init(void)
 {
     /* initialize key area */
@@ -29,26 +140,11 @@ INIT_COMPONENT_EXPORT(pthread_system_init);
 
 static void _pthread_destroy(_pthread_data_t *ptd)
 {
-    /* delete joinable semaphore */
-    if (ptd->joinable_sem != RT_NULL)
-        rt_sem_delete(ptd->joinable_sem);
-
-    /* release thread resource */
-    if (ptd->attr.stack_base == RT_NULL)
+    pthread_t pth = _pthread_data_get_pth(ptd);
+    if (pth != PTHREAD_NUM_MAX)
     {
-        /* release thread allocated stack */
-        rt_free(ptd->tid->stack_addr);
+        _pthread_data_destroy(pth);
     }
-    /* clean stack addr pointer */
-    ptd->tid->stack_addr = RT_NULL;
-
-    /*
-    * if this thread create the local thread data,
-    * delete it
-    */
-    if (ptd->tls != RT_NULL) rt_free(ptd->tls);
-    rt_free(ptd->tid);
-    rt_free(ptd);
 
     return;
 }
@@ -56,7 +152,10 @@ static void _pthread_destroy(_pthread_data_t *ptd)
 static void _pthread_cleanup(rt_thread_t tid)
 {
     _pthread_data_t *ptd;
-    ptd = _pthread_get_data(tid);
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)tid->user_data;
+    RT_ASSERT(ptd != RT_NULL);
 
     /* clear cleanup function */
     tid->cleanup = RT_NULL;
@@ -84,29 +183,30 @@ static void pthread_entry_stub(void *parameter)
     ptd->return_value = value;
 }
 
-int pthread_create(pthread_t            *tid,
+int pthread_create(pthread_t            *pid,
                    const pthread_attr_t *attr,
                    void *(*start)(void *), void *parameter)
 {
-    int result;
+    int ret = 0;
     void *stack;
     char name[RT_NAME_MAX];
     static rt_uint16_t pthread_number = 0;
+
+    pthread_t pth_id;
     _pthread_data_t *ptd;
 
-    /* tid shall be provided */
-    RT_ASSERT(tid != RT_NULL);
+    /* pid shall be provided */
+    RT_ASSERT(pid != RT_NULL);
 
     /* allocate posix thread data */
-    ptd = (_pthread_data_t *)rt_malloc(sizeof(_pthread_data_t));
-    if (ptd == RT_NULL)
-        return ENOMEM;
-    /* clean posix thread data memory */
-    rt_memset(ptd, 0, sizeof(_pthread_data_t));
-    ptd->canceled = 0;
-    ptd->cancelstate = PTHREAD_CANCEL_DISABLE;
-    ptd->canceltype = PTHREAD_CANCEL_DEFERRED;
-    ptd->magic = PTHREAD_MAGIC;
+    pth_id = _pthread_data_create();
+    if (pth_id == PTHREAD_NUM_MAX) 
+    {
+        ret = ENOMEM;
+        goto __exit;
+    }
+    /* get pthread data */
+    ptd = _pthread_get_data(pth_id);
 
     if (attr != RT_NULL)
     {
@@ -119,31 +219,27 @@ int pthread_create(pthread_t            *tid,
     }
 
     rt_snprintf(name, sizeof(name), "pth%02d", pthread_number ++);
-    if (ptd->attr.stack_base == 0)
+    if (ptd->attr.stackaddr == 0)
     {
-        stack = (void *)rt_malloc(ptd->attr.stack_size);
+        stack = (void *)rt_malloc(ptd->attr.stacksize);
     }
     else
     {
-        stack = (void *)(ptd->attr.stack_base);
+        stack = (void *)(ptd->attr.stackaddr);
     }
 
     if (stack == RT_NULL)
     {
-        rt_free(ptd);
-
-        return ENOMEM;
+        ret = ENOMEM;
+        goto __exit;
     }
 
     /* pthread is a static thread object */
     ptd->tid = (rt_thread_t) rt_malloc(sizeof(struct rt_thread));
     if (ptd->tid == RT_NULL)
     {
-        if (ptd->attr.stack_base == 0)
-            rt_free(stack);
-        rt_free(ptd);
-
-        return ENOMEM;
+        ret = ENOMEM;
+        goto __exit;
     }
 
     if (ptd->attr.detachstate == PTHREAD_CREATE_JOINABLE)
@@ -151,11 +247,8 @@ int pthread_create(pthread_t            *tid,
         ptd->joinable_sem = rt_sem_create(name, 0, RT_IPC_FLAG_FIFO);
         if (ptd->joinable_sem == RT_NULL)
         {
-            if (ptd->attr.stack_base != 0)
-                rt_free(stack);
-            rt_free(ptd);
-
-            return ENOMEM;
+            ret = ENOMEM;
+            goto __exit;
         }
     }
     else
@@ -169,40 +262,32 @@ int pthread_create(pthread_t            *tid,
 
     /* initial this pthread to system */
     if (rt_thread_init(ptd->tid, name, pthread_entry_stub, ptd,
-                       stack, ptd->attr.stack_size,
-                       ptd->attr.priority, 5) != RT_EOK)
+                       stack, ptd->attr.stacksize,
+                       ptd->attr.schedparam.sched_priority, 5) != RT_EOK)
     {
-        if (ptd->attr.stack_base == 0)
-            rt_free(stack);
-        if (ptd->joinable_sem != RT_NULL)
-            rt_sem_delete(ptd->joinable_sem);
-        rt_free(ptd);
-
-        return EINVAL;
+        ret = EINVAL;
+        goto __exit;
     }
 
     /* set pthread id */
-    *tid = ptd->tid;
+    *pid = pth_id;
 
     /* set pthread cleanup function and ptd data */
-    (*tid)->cleanup = _pthread_cleanup;
-    (*tid)->user_data = (rt_uint32_t)ptd;
+    ptd->tid->cleanup = _pthread_cleanup;
+    ptd->tid->user_data = (rt_uint32_t)ptd;
 
     /* start thread */
-    result = rt_thread_startup(*tid);
-    if (result == RT_EOK)
+    if (rt_thread_startup(ptd->tid) == RT_EOK)
         return 0;
 
     /* start thread failed */
     rt_thread_detach(ptd->tid);
-    if (ptd->attr.stack_base == 0)
-        rt_free(stack);
-    if (ptd->joinable_sem != RT_NULL)
-        rt_sem_delete(ptd->joinable_sem);
-
-    rt_free(ptd);
+    ret = EINVAL;
 
-    return EINVAL;
+__exit:
+    if (pth_id != PTHREAD_NUM_MAX)
+        _pthread_data_destroy(pth_id);
+    return ret;
 }
 RTM_EXPORT(pthread_create);
 
@@ -221,7 +306,7 @@ int pthread_detach(pthread_t thread)
         goto __exit;
     }
 
-    if ((thread->stat & RT_THREAD_STAT_MASK) == RT_THREAD_CLOSE)
+    if ((ptd->tid->stat & RT_THREAD_STAT_MASK) == RT_THREAD_CLOSE)
     {
         /* this defunct pthread is not handled by idle */
         if (rt_sem_trytake(ptd->joinable_sem) != RT_EOK)
@@ -270,13 +355,13 @@ int pthread_join(pthread_t thread, void **value_ptr)
     _pthread_data_t *ptd;
     rt_err_t result;
 
-    if (thread == rt_thread_self())
+    ptd = _pthread_get_data(thread);
+    if (ptd && ptd->tid == rt_thread_self())
     {
         /* join self */
         return EDEADLK;
     }
 
-    ptd = _pthread_get_data(thread);
     if (ptd->attr.detachstate == PTHREAD_CREATE_DETACHED)
         return EINVAL; /* join on a detached pthread */
 
@@ -299,13 +384,32 @@ int pthread_join(pthread_t thread, void **value_ptr)
 }
 RTM_EXPORT(pthread_join);
 
+pthread_t pthread_self (void)
+{
+    rt_thread_t tid;
+    _pthread_data_t *ptd;
+
+    tid = rt_thread_self();
+    if (tid == NULL) return PTHREAD_NUM_MAX;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
+    RT_ASSERT(ptd != RT_NULL);
+
+    return _pthread_data_get_pth(ptd);
+}
+RTM_EXPORT(pthread_self);
+
 void pthread_exit(void *value)
 {
     _pthread_data_t *ptd;
     _pthread_cleanup_t *cleanup;
     extern _pthread_key_data_t _thread_keys[PTHREAD_KEY_MAX];
 
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
 
     rt_enter_critical();
     /* disable cancel */
@@ -382,7 +486,15 @@ RTM_EXPORT(pthread_atfork);
 int pthread_kill(pthread_t thread, int sig)
 {
 #ifdef RT_USING_SIGNALS
-    return rt_thread_kill(thread, sig);
+    _pthread_data_t *ptd;
+
+    ptd = _pthread_get_data(thread);
+    if (ptd)
+    {
+        return rt_thread_kill(ptd->tid, sig);
+    }
+
+    return EINVAL;
 #else
     return ENOSYS;
 #endif
@@ -401,8 +513,10 @@ void pthread_cleanup_pop(int execute)
     _pthread_data_t *ptd;
     _pthread_cleanup_t *cleanup;
 
-    /* get posix thread data */
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != RT_NULL);
 
     if (execute)
@@ -428,8 +542,10 @@ void pthread_cleanup_push(void (*routine)(void *), void *arg)
     _pthread_data_t *ptd;
     _pthread_cleanup_t *cleanup;
 
-    /* get posix thread data */
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != RT_NULL);
 
     cleanup = (_pthread_cleanup_t *)rt_malloc(sizeof(_pthread_cleanup_t));
@@ -478,8 +594,10 @@ int pthread_setcancelstate(int state, int *oldstate)
 {
     _pthread_data_t *ptd;
 
-    /* get posix thread data */
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return EINVAL;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != RT_NULL);
 
     if ((state == PTHREAD_CANCEL_ENABLE) || (state == PTHREAD_CANCEL_DISABLE))
@@ -499,8 +617,10 @@ int pthread_setcanceltype(int type, int *oldtype)
 {
     _pthread_data_t *ptd;
 
-    /* get posix thread data */
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return EINVAL;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != RT_NULL);
 
     if ((type != PTHREAD_CANCEL_DEFERRED) && (type != PTHREAD_CANCEL_ASYNCHRONOUS))
@@ -519,8 +639,10 @@ void pthread_testcancel(void)
     int cancel = 0;
     _pthread_data_t *ptd;
 
-    /* get posix thread data */
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != RT_NULL);
 
     if (ptd->cancelstate == PTHREAD_CANCEL_ENABLE)
@@ -534,14 +656,14 @@ int pthread_cancel(pthread_t thread)
 {
     _pthread_data_t *ptd;
 
-    /* cancel self */
-    if (thread == rt_thread_self())
-        return 0;
-
     /* get posix thread data */
     ptd = _pthread_get_data(thread);
     RT_ASSERT(ptd != RT_NULL);
 
+    /* cancel self */
+    if (ptd->tid == rt_thread_self())
+        return 0;
+
     /* set canceled */
     if (ptd->cancelstate == PTHREAD_CANCEL_ENABLE)
     {
@@ -555,10 +677,11 @@ int pthread_cancel(pthread_t thread)
              * thread (pthread_cleanup), it will move to defunct
              * thread list and wait for handling in idle thread.
              */
-            rt_thread_detach(thread);
+            rt_thread_detach(ptd->tid);
         }
     }
 
     return 0;
 }
 RTM_EXPORT(pthread_cancel);
+

components/libc/pthreads/pthread.h

@@ -32,7 +32,7 @@ extern "C" {
 #define PTHREAD_EXPLICIT_SCHED      0
 #define PTHREAD_INHERIT_SCHED       1
 
-typedef rt_thread_t pthread_t;
+typedef long pthread_t;
 typedef long pthread_condattr_t;
 typedef long pthread_rwlockattr_t;
 typedef long pthread_mutexattr_t;
@@ -76,15 +76,21 @@ enum
 #define PTHREAD_SCOPE_PROCESS   0
 #define PTHREAD_SCOPE_SYSTEM    1
 
+struct sched_param
+{
+    int sched_priority;
+};
+
 struct pthread_attr
 {
-    void*       stack_base;
-    rt_uint32_t stack_size;     /* stack size of thread */
+    void* stackaddr;        /* stack address of thread */
+    int   stacksize;        /* stack size of thread */
+
+    int   inheritsched;     /* Inherit parent prio/policy */
+    int   schedpolicy;      /* scheduler policy */
+    struct sched_param schedparam; /* sched parameter */
 
-    rt_uint8_t priority;        /* priority of thread */
-    rt_uint8_t detachstate;     /* detach state */
-    rt_uint8_t policy;          /* scheduler policy */
-    rt_uint8_t inheritsched;    /* Inherit parent prio/policy */
+    int   detachstate;      /* detach state */
 };
 typedef struct pthread_attr pthread_attr_t;
 
@@ -131,11 +137,6 @@ struct pthread_barrier
 };
 typedef struct pthread_barrier pthread_barrier_t;
 
-struct sched_param
-{
-    int sched_priority;
-};
-
 /* pthread thread interface */
 int pthread_attr_destroy(pthread_attr_t *attr);
 int pthread_attr_init(pthread_attr_t *attr);
@@ -171,10 +172,7 @@ rt_inline int pthread_equal (pthread_t t1, pthread_t t2)
     return t1 == t2;
 }
 
-rt_inline pthread_t pthread_self (void)
-{
-    return rt_thread_self();
-}
+pthread_t pthread_self (void);
 
 void pthread_exit (void *value_ptr);
 int pthread_once(pthread_once_t * once_control, void (*init_routine) (void));

components/libc/pthreads/pthread_attr.c

@@ -20,10 +20,13 @@ const pthread_attr_t pthread_default_attr =
 {
     0,                          /* stack base */
     DEFAULT_STACK_SIZE,         /* stack size */
-    DEFAULT_PRIORITY,           /* priority */
-    PTHREAD_CREATE_JOINABLE,    /* detach state */
+
+    PTHREAD_INHERIT_SCHED,      /* Inherit parent prio/policy */
     SCHED_FIFO,                 /* scheduler policy */
-    PTHREAD_INHERIT_SCHED       /* Inherit parent prio/policy */
+    {
+        DEFAULT_PRIORITY,       /* scheduler priority */
+    },
+    PTHREAD_CREATE_JOINABLE,    /* detach state */
 };
 
 int pthread_attr_init(pthread_attr_t *attr)
@@ -73,7 +76,7 @@ int pthread_attr_setschedpolicy(pthread_attr_t *attr, int policy)
 {
     RT_ASSERT(attr != RT_NULL);
 
-    attr->policy = policy;
+    attr->schedpolicy = policy;
 
     return 0;
 }
@@ -83,7 +86,7 @@ int pthread_attr_getschedpolicy(pthread_attr_t const *attr, int *policy)
 {
     RT_ASSERT(attr != RT_NULL);
 
-    *policy = (int)attr->policy;
+    *policy = (int)attr->schedpolicy;
 
     return 0;
 }
@@ -95,7 +98,7 @@ int pthread_attr_setschedparam(pthread_attr_t           *attr,
     RT_ASSERT(attr != RT_NULL);
     RT_ASSERT(param != RT_NULL);
 
-    attr->priority = param->sched_priority;
+    attr->schedparam.sched_priority = param->sched_priority;
 
     return 0;
 }
@@ -107,7 +110,7 @@ int pthread_attr_getschedparam(pthread_attr_t const *attr,
     RT_ASSERT(attr != RT_NULL);
     RT_ASSERT(param != RT_NULL);
 
-    param->sched_priority = attr->priority;
+    param->sched_priority = attr->schedparam.sched_priority;
 
     return 0;
 }
@@ -117,7 +120,7 @@ int pthread_attr_setstacksize(pthread_attr_t *attr, size_t stack_size)
 {
     RT_ASSERT(attr != RT_NULL);
 
-    attr->stack_size = stack_size;
+    attr->stacksize = stack_size;
 
     return 0;
 }
@@ -127,7 +130,7 @@ int pthread_attr_getstacksize(pthread_attr_t const *attr, size_t *stack_size)
 {
     RT_ASSERT(attr != RT_NULL);
 
-    *stack_size = attr->stack_size;
+    *stack_size = attr->stacksize;
 
     return 0;
 }
@@ -155,8 +158,8 @@ int pthread_attr_setstack(pthread_attr_t *attr,
 {
     RT_ASSERT(attr != RT_NULL);
 
-    attr->stack_base = stack_base;
-    attr->stack_size = RT_ALIGN_DOWN(stack_size, RT_ALIGN_SIZE);
+    attr->stackaddr = stack_base;
+    attr->stacksize = RT_ALIGN_DOWN(stack_size, RT_ALIGN_SIZE);
 
     return 0;
 }
@@ -168,8 +171,8 @@ int pthread_attr_getstack(pthread_attr_t const *attr,
 {
     RT_ASSERT(attr != RT_NULL);
 
-    *stack_base = attr->stack_base;
-    *stack_size = attr->stack_size;
+    *stack_base = attr->stackaddr;
+    *stack_size = attr->stacksize;
 
     return 0;
 }

components/libc/pthreads/pthread_cond.c

@@ -189,7 +189,7 @@ rt_err_t _pthread_cond_timedwait(pthread_cond_t  *cond,
         pthread_cond_init(cond, RT_NULL);
 
     /* The mutex was not owned by the current thread at the time of the call. */
-    if (mutex->lock.owner != pthread_self())
+    if (mutex->lock.owner != rt_thread_self())
         return -RT_ERROR;
     /* unlock a mutex failed */
     if (pthread_mutex_unlock(mutex) != 0)

components/libc/pthreads/pthread_internal.h

@@ -30,6 +30,10 @@ struct _pthread_key_data
 };
 typedef struct _pthread_key_data _pthread_key_data_t;
 
+#ifndef PTHREAD_NUM_MAX
+#define PTHREAD_NUM_MAX 32
+#endif
+
 #define PTHREAD_MAGIC   0x70746873
 struct _pthread_data
 {
@@ -56,17 +60,7 @@ struct _pthread_data
 };
 typedef struct _pthread_data _pthread_data_t;
 
-rt_inline _pthread_data_t *_pthread_get_data(pthread_t thread)
-{
-    _pthread_data_t *ptd;
-    RT_ASSERT(thread != RT_NULL);
-
-    ptd = (_pthread_data_t *)thread->user_data;
-    RT_ASSERT(ptd != RT_NULL);
-    RT_ASSERT(ptd->magic == PTHREAD_MAGIC);
-
-    return ptd;
-}
+_pthread_data_t *_pthread_get_data(pthread_t thread);
 
 int clock_time_to_tick(const struct timespec *time);
 

components/libc/pthreads/pthread_tls.c

@@ -22,7 +22,10 @@ void *pthread_getspecific(pthread_key_t key)
 {
     struct _pthread_data* ptd;
 
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return NULL;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != NULL);
 
     if (ptd->tls == NULL)
@@ -39,7 +42,10 @@ int pthread_setspecific(pthread_key_t key, const void *value)
 {
     struct _pthread_data* ptd;
 
-    ptd = _pthread_get_data(rt_thread_self());
+    if (rt_thread_self() == NULL) return EINVAL;
+
+    /* get pthread data from user data of thread */
+    ptd = (_pthread_data_t *)rt_thread_self()->user_data;
     RT_ASSERT(ptd != NULL);
 
     /* check tls area */

components/net/Kconfig

@@ -5,6 +5,7 @@ menu "Socket abstraction layer"
 config RT_USING_SAL
     bool "Enable socket abstraction layer"
     select RT_USING_NETDEV
+    select RT_USING_LIBC
     select RT_USING_SYSTEM_WORKQUEUE
     default n
 
@@ -36,7 +37,6 @@ config RT_USING_SAL
             bool "Enable BSD socket operated by file system API"
             default n
             select RT_USING_DFS
-            select RT_USING_LIBC
             select RT_USING_POSIX
             help
                 Let BSD socket operated by file system API, such as read/write and involveed in select/poll POSIX APIs.
@@ -73,6 +73,9 @@ config RT_USING_NETDEV
             bool "Enable netstat features"
             default y
 
+        config NETDEV_USING_AUTO_DEFAULT
+            bool "Enable default netdev automatic change features"
+            default y
     endif
 
 endmenu

components/net/freemodbus/port/portserial.c

@@ -52,6 +52,8 @@ static void serial_soft_trans_irq(void* parameter);
 BOOL xMBPortSerialInit(UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits,
         eMBParity eParity)
 {
+    rt_device_t dev = RT_NULL;
+    char uart_name[20];
     /**
      * set 485 mode receive and transmit control IO
      * @note MODBUS_SLAVE_RT_CONTROL_PIN_INDEX need be defined by user
@@ -60,22 +62,19 @@ BOOL xMBPortSerialInit(UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits,
     rt_pin_mode(MODBUS_SLAVE_RT_CONTROL_PIN_INDEX, PIN_MODE_OUTPUT);
 #endif
     /* set serial name */
-    if (ucPORT == 1) {
-#if defined(RT_USING_UART1) || defined(RT_USING_REMAP_UART1)
-        extern struct rt_serial_device serial1;
-        serial = &serial1;
-#endif
-    } else if (ucPORT == 2) {
-#if defined(RT_USING_UART2)
-        extern struct rt_serial_device serial2;
-        serial = &serial2;
-#endif
-    } else if (ucPORT == 3) {
-#if defined(RT_USING_UART3)
-        extern struct rt_serial_device serial3;
-        serial = &serial3;
-#endif
+    rt_snprintf(uart_name,sizeof(uart_name), "uart%d", ucPORT);
+
+    dev = rt_device_find(uart_name);
+    if(dev == RT_NULL)
+    {
+        /* can not find uart */
+        return FALSE;
     }
+    else
+    {
+        serial = (struct rt_serial_device*)dev;
+    }
+
     /* set serial configure parameter */
     serial->config.baud_rate = ulBaudRate;
     serial->config.stop_bits = STOP_BITS_1;

components/net/freemodbus/port/portserial_m.c

@@ -53,6 +53,9 @@ static void serial_soft_trans_irq(void* parameter);
 BOOL xMBMasterPortSerialInit(UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits,
         eMBParity eParity)
 {
+    rt_device_t dev = RT_NULL;
+    char uart_name[20];
+
     /**
      * set 485 mode receive and transmit control IO
      * @note MODBUS_MASTER_RT_CONTROL_PIN_INDEX need be defined by user
@@ -60,24 +63,20 @@ BOOL xMBMasterPortSerialInit(UCHAR ucPORT, ULONG ulBaudRate, UCHAR ucDataBits,
 #if defined(RT_MODBUS_MASTER_USE_CONTROL_PIN)
     rt_pin_mode(MODBUS_MASTER_RT_CONTROL_PIN_INDEX, PIN_MODE_OUTPUT);
 #endif
-
     /* set serial name */
-    if (ucPORT == 1) {
-#if defined(RT_USING_UART1) || defined(RT_USING_REMAP_UART1)
-        extern struct rt_serial_device serial1;
-        serial = &serial1;
-#endif
-    } else if (ucPORT == 2) {
-#if defined(RT_USING_UART2)
-        extern struct rt_serial_device serial2;
-        serial = &serial2;
-#endif
-    } else if (ucPORT == 3) {
-#if defined(RT_USING_UART3)
-        extern struct rt_serial_device serial3;
-        serial = &serial3;
-#endif
+    rt_snprintf(uart_name,sizeof(uart_name), "uart%d", ucPORT);
+
+    dev = rt_device_find(uart_name);
+    if(dev == RT_NULL)
+    {
+        /* can not find uart */
+        return FALSE;
+    }
+    else
+    {
+        serial = (struct rt_serial_device*)dev;
     }
+
     /* set serial configure parameter */
     serial->config.baud_rate = ulBaudRate;
     serial->config.stop_bits = STOP_BITS_1;

components/net/lwip-2.0.2/src/api/api_lib.c

@@ -175,12 +175,12 @@ netconn_delete(struct netconn *conn)
 
   API_MSG_VAR_ALLOC(msg);
   API_MSG_VAR_REF(msg).conn = conn;
+#if LWIP_TCP
 #if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
   /* get the time we started, which is later compared to
      sys_now() + conn->send_timeout */
   API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
 #else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
-#if LWIP_TCP
   API_MSG_VAR_REF(msg).msg.sd.polls_left =
     ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
 #endif /* LWIP_TCP */

components/net/lwip-2.1.0/src/api/api_lib.c

@@ -201,12 +201,12 @@ netconn_prepare_delete(struct netconn *conn)
 
   API_MSG_VAR_ALLOC(msg);
   API_MSG_VAR_REF(msg).conn = conn;
+#if LWIP_TCP
 #if LWIP_SO_SNDTIMEO || LWIP_SO_LINGER
   /* get the time we started, which is later compared to
      sys_now() + conn->send_timeout */
   API_MSG_VAR_REF(msg).msg.sd.time_started = sys_now();
 #else /* LWIP_SO_SNDTIMEO || LWIP_SO_LINGER */
-#if LWIP_TCP
   API_MSG_VAR_REF(msg).msg.sd.polls_left =
     ((LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT + TCP_SLOW_INTERVAL - 1) / TCP_SLOW_INTERVAL) + 1;
 #endif /* LWIP_TCP */