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@@ -20,32 +20,62 @@ extern "C" {
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/* DMA1 channel1 */
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#if defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
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-#define SPI1_RX_DMA_IRQHandler DMA1_Channel1_IRQHandler
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+#define SPI1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define SPI1_RX_DMA_INSTANCE DMA1_Channel1
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#define SPI1_RX_DMA_REQUEST DMA_REQUEST_SPI1_RX
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#define SPI1_RX_DMA_IRQ DMA1_Channel1_IRQn
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+#ifdef BSP_UART1_RX_USING_DMA
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+#undef BSP_UART1_RX_USING_DMA
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+#endif
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+#ifdef BSP_SPI2_RX_USING_DMA
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+#undef BSP_SPI2_RX_USING_DMA
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+#endif
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#elif defined(BSP_UART1_RX_USING_DMA) && !defined(UART1_RX_DMA_INSTANCE)
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#define UART1_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART1_RX_DMA_INSTANCE DMA1_Channel1
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#define UART1_RX_DMA_REQUEST DMA_REQUEST_USART1_RX
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#define UART1_RX_DMA_IRQ DMA1_Channel1_IRQn
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+#ifdef BSP_SPI2_RX_USING_DMA
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+#undef BSP_SPI2_RX_USING_DMA
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+#endif
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+#elif defined(BSP_SPI2_RX_USING_DMA) && !defined(SPI2_RX_DMA_INSTANCE)
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+#define SPI2_DMA_RX_IRQHandler DMA1_Channel1_IRQHandler
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+#define SPI2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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+#define SPI2_RX_DMA_INSTANCE DMA1_Channel1
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+#define SPI2_RX_DMA_REQUEST DMA_REQUEST_SPI2_RX
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+#define SPI2_RX_DMA_IRQ DMA1_Channel1_IRQn
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#endif
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/* DMA1 channle2-3 */
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#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
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-#define SPI1_TX_DMA_IRQHandler DMA1_Channel2_3_IRQHandler
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-#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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-#define SPI1_TX_DMA_INSTANCE DMA1_Channel2
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-#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
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-#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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+#define SPI1_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
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+#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
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+#define SPI1_TX_DMA_INSTANCE DMA1_Channel2
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+#define SPI1_TX_DMA_REQUEST DMA_REQUEST_SPI1_TX
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+#define SPI1_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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+#ifdef BSP_UART2_RX_USING_DMA
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+#undef BSP_UART2_RX_USING_DMA
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+#endif
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+#ifdef BSP_SPI2_TX_USING_DMA
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+#undef BSP_SPI2_TX_USING_DMA
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+#endif
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#elif defined(BSP_UART2_RX_USING_DMA) && !defined(UART2_RX_DMA_INSTANCE)
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#define UART2_DMA_RX_IRQHandler DMA1_Channel2_3_IRQHandler
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#define UART2_RX_DMA_RCC RCC_AHBENR_DMA1EN
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#define UART2_RX_DMA_INSTANCE DMA1_Channel2
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#define UART2_RX_DMA_REQUEST DMA_REQUEST_USART2_RX
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#define UART2_RX_DMA_IRQ DMA1_Channel2_3_IRQn
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+#ifdef BSP_SPI2_TX_USING_DMA
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+#undef BSP_SPI2_TX_USING_DMA
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+#endif
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+#elif defined(BSP_SPI2_TX_USING_DMA) && !defined(SPI2_TX_DMA_INSTANCE)
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+#define SPI2_DMA_TX_IRQHandler DMA1_Channel2_3_IRQHandler
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+#define SPI2_TX_DMA_RCC RCC_AHBENR_DMA1EN
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+#define SPI2_TX_DMA_INSTANCE DMA1_Channel2
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+#define SPI2_TX_DMA_REQUEST DMA_REQUEST_SPI2_TX
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+#define SPI2_TX_DMA_IRQ DMA1_Channel2_3_IRQn
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#endif
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#if defined(BSP_LPUART1_RX_USING_DMA) && !defined(LPUART1_RX_DMA_INSTANCE)
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