[ci] open ci check with function declaration warning (#8546)

bsp/allwinner/d1/board/board.c

@@ -67,8 +67,6 @@ static void __rt_assert_handler(const char *ex_string, const char *func, rt_size
 //BSP的C入口
 void primary_cpu_entry(void)
 {
-    extern void entry(void);
-
     //初始化BSS
     init_bss();
     //关中断

bsp/allwinner/d1s/board/board.c

@@ -74,8 +74,6 @@ static void __rt_assert_handler(const char *ex_string, const char *func, rt_size
 // BSP的C入口
 void primary_cpu_entry(void)
 {
-    extern void entry(void);
-
     // 关中断
     rt_hw_interrupt_disable();
     rt_assert_set_hook(__rt_assert_handler);

bsp/bouffalo_lab/bl808/d0/board/board.c

@@ -53,8 +53,6 @@ static void __rt_assert_handler(const char *ex_string, const char *func, rt_size
 
 void primary_cpu_entry(void)
 {
-    extern void entry(void);
-
     /* disable global interrupt */
     rt_hw_interrupt_disable();
     rt_assert_set_hook(__rt_assert_handler);

bsp/cvitek/cv1800b/board/board.c

@@ -53,8 +53,6 @@ static void __rt_assert_handler(const char *ex_string, const char *func, rt_size
 
 void primary_cpu_entry(void)
 {
-    extern void entry(void);
-
     /* disable global interrupt */
     rt_hw_interrupt_disable();
     rt_assert_set_hook(__rt_assert_handler);

bsp/k210/board/board.c

@@ -34,8 +34,6 @@ void init_bss(void)
 
 void primary_cpu_entry(void)
 {
-    extern void entry(void);
-
     /* disable global interrupt */
     init_bss();
     rt_hw_interrupt_disable();

bsp/qemu-virt64-riscv/driver/board.c

@@ -44,8 +44,6 @@ struct mem_desc platform_mem_desc[] = {
 
 void primary_cpu_entry(void)
 {
-    extern void entry(void);
-
     /* disable global interrupt */
     rt_hw_interrupt_disable();
 

components/lwp/lwp_arch_comm.h

@@ -23,8 +23,8 @@
 /* syscall handlers */
 void arch_clone_exit(void);
 void arch_fork_exit(void);
-void arch_syscall_exit();
-void arch_ret_to_user();
+void arch_syscall_exit(void);
+void arch_ret_to_user(void);
 
 /* ELF relocation */
 #ifdef ARCH_MM_MMU

include/rthw.h

@@ -134,7 +134,7 @@ rt_isr_handler_t rt_hw_interrupt_install(int              vector,
                                          const char      *name);
 
 #ifdef RT_USING_SMP
-rt_base_t rt_hw_local_irq_disable();
+rt_base_t rt_hw_local_irq_disable(void);
 void rt_hw_local_irq_enable(rt_base_t level);
 
 rt_base_t rt_cpus_lock(void);
@@ -235,9 +235,9 @@ void rt_hw_secondary_cpu_idle_exec(void);
 #endif
 
 #ifndef RT_USING_CACHE
-#define rt_hw_isb()
-#define rt_hw_dmb()
-#define rt_hw_dsb()
+#define rt_hw_isb(void)
+#define rt_hw_dmb(void)
+#define rt_hw_dsb(void)
 #endif
 
 #ifdef __cplusplus

include/rtthread.h

@@ -42,6 +42,10 @@
 extern "C" {
 #endif
 
+#ifdef __GNUC__
+int entry(void); 
+#endif
+
 /**
  * @addtogroup KernelObject
  * @{
@@ -207,6 +211,7 @@ void rt_system_scheduler_init(void);
 void rt_system_scheduler_start(void);
 
 void rt_schedule(void);
+void rt_scheduler_do_irq_switch(void *context);
 void rt_schedule_insert_thread(struct rt_thread *thread);
 void rt_schedule_remove_thread(struct rt_thread *thread);
 
@@ -334,6 +339,15 @@ void rt_memheap_info(struct rt_memheap *heap,
                      rt_size_t *max_used);
 #endif /* RT_USING_MEMHEAP */
 
+#ifdef RT_USING_MEMHEAP_AS_HEAP
+/**
+ * memory heap as heap
+ */
+void *_memheap_alloc(struct rt_memheap *heap, rt_size_t size);
+void _memheap_free(void *rmem);
+void *_memheap_realloc(struct rt_memheap *heap, void *rmem, rt_size_t newsize);
+#endif
+
 #ifdef RT_USING_SLAB
 /**
  * slab object interface
@@ -664,6 +678,8 @@ void rt_cpus_unlock(rt_base_t level);
 struct rt_cpu *rt_cpu_self(void);
 struct rt_cpu *rt_cpu_index(int index);
 
+void rt_cpus_lock_status_restore(struct rt_thread *thread);
+
 #endif /* RT_USING_SMP */
 
 /*

libcpu/aarch64/common/mmu.c

@@ -602,6 +602,13 @@ static int _map_single_page_2M(unsigned long *lv0_tbl, unsigned long va,
     return 0;
 }
 
+void *rt_hw_mmu_tbl_get()
+{
+    uintptr_t tbl;
+    __asm__ volatile("MRS %0, TTBR0_EL1" : "=r"(tbl));
+    return rt_kmem_p2v((void *)(tbl & ((1ul << 48) - 2)));
+}
+
 void *rt_ioremap_early(void *paddr, size_t size)
 {
     volatile size_t count;

libcpu/aarch64/common/mmu.h

@@ -109,13 +109,7 @@ void rt_hw_mmu_kernel_map_init(struct rt_aspace *aspace, rt_size_t vaddr_start,
                                rt_size_t size);
 void *rt_hw_mmu_pgtbl_create(void);
 void rt_hw_mmu_pgtbl_delete(void *pgtbl);
-
-rt_inline void *rt_hw_mmu_tbl_get()
-{
-    uintptr_t tbl;
-    __asm__ volatile("MRS %0, TTBR0_EL1" : "=r"(tbl));
-    return rt_kmem_p2v((void *)(tbl & ((1ul << 48) - 2)));
-}
+void *rt_hw_mmu_tbl_get(void);
 
 static inline void *rt_hw_mmu_kernel_v2p(void *v_addr)
 {

libcpu/arm/cortex-a/mmu.h

@@ -122,7 +122,7 @@ void rt_hw_mmu_switch(void *tbl);
 
 void *rt_hw_mmu_v2p(struct rt_aspace *aspace, void *vaddr);
 void rt_hw_mmu_kernel_map_init(struct rt_aspace *aspace, size_t vaddr_start, size_t size);
-void *rt_hw_mmu_tbl_get();
+void *rt_hw_mmu_tbl_get(void);
 
 int rt_hw_mmu_control(struct rt_aspace *aspace, void *vaddr, size_t size, enum rt_mmu_cntl cmd);
 

libcpu/risc-v/t-head/c906/cpuport.h

@@ -39,17 +39,17 @@
 #ifndef __ASSEMBLY__
 #include <rtdef.h>
 
-rt_inline void rt_hw_dsb()
+rt_inline void rt_hw_dsb(void)
 {
     __asm__ volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_dmb()
+rt_inline void rt_hw_dmb(void)
 {
     __asm__ volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_isb()
+rt_inline void rt_hw_isb(void)
 {
     __asm__ volatile(OPC_FENCE_I:::"memory");
 }

libcpu/risc-v/t-head/c906/mmu.h

@@ -56,7 +56,7 @@ struct mem_desc
 #define MMU_MAP_ERROR_NOPAGE     -3
 #define MMU_MAP_ERROR_CONFLICT   -4
 
-void *rt_hw_mmu_tbl_get();
+void *rt_hw_mmu_tbl_get(void);
 int rt_hw_mmu_map_init(rt_aspace_t aspace, void *v_address, rt_size_t size,
                        rt_size_t *vtable, rt_size_t pv_off);
 void rt_hw_mmu_setup(rt_aspace_t aspace, struct mem_desc *mdesc, int desc_nr);

libcpu/risc-v/t-head/c906/riscv_mmu.c

@@ -18,12 +18,12 @@
 
 #include "riscv_mmu.h"
 
-void mmu_enable_user_page_access()
+void mmu_enable_user_page_access(void)
 {
     set_csr(sstatus,SSTATUS_SUM);
 }
 
-void mmu_disable_user_page_access()
+void mmu_disable_user_page_access(void)
 {
     clear_csr(sstatus,SSTATUS_SUM);
 }

libcpu/risc-v/t-head/c906/riscv_mmu.h

@@ -108,8 +108,8 @@
 #define ARCH_MAP_FAILED         ((void *)0x8000000000000000)
 
 void mmu_set_pagetable(rt_ubase_t addr);
-void mmu_enable_user_page_access();
-void mmu_disable_user_page_access();
+void mmu_enable_user_page_access(void);
+void mmu_disable_user_page_access(void);
 
 #define RT_HW_MMU_PROT_READ 1
 #define RT_HW_MMU_PROT_WRITE 2

libcpu/risc-v/virt64/cpuport.h

@@ -61,17 +61,17 @@ typedef union {
 
 #ifndef __ASSEMBLY__
 #include <rtdef.h>
-rt_inline void rt_hw_dsb()
+rt_inline void rt_hw_dsb(void)
 {
     asm volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_dmb()
+rt_inline void rt_hw_dmb(void)
 {
     asm volatile("fence":::"memory");
 }
 
-rt_inline void rt_hw_isb()
+rt_inline void rt_hw_isb(void)
 {
     asm volatile(".long 0x0000100F":::"memory");
 }

libcpu/risc-v/virt64/mmu.h

@@ -56,7 +56,7 @@ struct mem_desc
 #define MMU_MAP_ERROR_NOPAGE     -3
 #define MMU_MAP_ERROR_CONFLICT   -4
 
-void *rt_hw_mmu_tbl_get();
+void *rt_hw_mmu_tbl_get(void);
 int rt_hw_mmu_map_init(rt_aspace_t aspace, void *v_address, rt_size_t size,
                        rt_size_t *vtable, rt_size_t pv_off);
 void rt_hw_mmu_setup(rt_aspace_t aspace, struct mem_desc *mdesc, int desc_nr);

libcpu/risc-v/virt64/riscv_mmu.c

@@ -18,12 +18,12 @@
 
 #include "riscv_mmu.h"
 
-void mmu_enable_user_page_access()
+void mmu_enable_user_page_access(void)
 {
     set_csr(sstatus, SSTATUS_SUM);
 }
 
-void mmu_disable_user_page_access()
+void mmu_disable_user_page_access(void)
 {
     clear_csr(sstatus, SSTATUS_SUM);
 }

libcpu/risc-v/virt64/riscv_mmu.h

@@ -91,8 +91,8 @@
 #define ARCH_MAP_FAILED         ((void *)0x8000000000000000)
 
 void mmu_set_pagetable(rt_ubase_t addr);
-void mmu_enable_user_page_access();
-void mmu_disable_user_page_access();
+void mmu_enable_user_page_access(void);
+void mmu_disable_user_page_access(void);
 
 #define RT_HW_MMU_PROT_READ 1
 #define RT_HW_MMU_PROT_WRITE 2

src/SConscript

@@ -38,7 +38,7 @@ if rtconfig.PLATFORM in GetGCCLikePLATFORM():
     LOCAL_CFLAGS += ' -Warray-bounds -Wuninitialized' # memory access warning
     LOCAL_CFLAGS += ' -Wreturn-type -Wcomment -Wswitch' # code style warning
     LOCAL_CFLAGS += ' -Wparentheses -Wlogical-op ' # operation warning
-    # LOCAL_CFLAGS += ' -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes' # function declaration warning
+    LOCAL_CFLAGS += ' -Wmissing-declarations -Wmissing-prototypes -Wstrict-prototypes' # function declaration warning
     if 'mips' not in rtconfig.PREFIX: # mips toolchain does not support
         LOCAL_CFLAGS += ' -Wimplicit-fallthrough' # implicit fallthrough warning
         LOCAL_CFLAGS += ' -Wduplicated-cond -Wduplicated-branches' # duplicated condition warning

src/cpu.c

@@ -94,7 +94,7 @@ RTM_EXPORT(rt_spin_unlock)
  */
 rt_base_t rt_spin_lock_irqsave(struct rt_spinlock *lock)
 {
-    unsigned long level;
+    rt_base_t level;
 
     level = rt_hw_local_irq_disable();
     rt_enter_critical();