drv_hwtimer.c 14 KB

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  1. /*
  2. * Copyright (c) 2006-2018, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2018-12-10 zylx first version
  9. * 2020-06-16 thread-liu Porting for stm32mp1
  10. * 2020-08-25 linyongkang Fix the timer clock frequency doubling problem
  11. */
  12. #include <board.h>
  13. #ifdef BSP_USING_TIM
  14. #include "drv_config.h"
  15. //#define DRV_DEBUG
  16. #define LOG_TAG "drv.hwtimer"
  17. #include <drv_log.h>
  18. #ifdef RT_USING_HWTIMER
  19. enum
  20. {
  21. #ifdef BSP_USING_TIM1
  22. TIM1_INDEX,
  23. #endif
  24. #ifdef BSP_USING_TIM2
  25. TIM2_INDEX,
  26. #endif
  27. #ifdef BSP_USING_TIM3
  28. TIM3_INDEX,
  29. #endif
  30. #ifdef BSP_USING_TIM4
  31. TIM4_INDEX,
  32. #endif
  33. #ifdef BSP_USING_TIM5
  34. TIM5_INDEX,
  35. #endif
  36. #ifdef BSP_USING_TIM6
  37. TIM6_INDEX,
  38. #endif
  39. #ifdef BSP_USING_TIM7
  40. TIM7_INDEX,
  41. #endif
  42. #ifdef BSP_USING_TIM8
  43. TIM8_INDEX,
  44. #endif
  45. #ifdef BSP_USING_TIM9
  46. TIM9_INDEX,
  47. #endif
  48. #ifdef BSP_USING_TIM10
  49. TIM10_INDEX,
  50. #endif
  51. #ifdef BSP_USING_TIM11
  52. TIM11_INDEX,
  53. #endif
  54. #ifdef BSP_USING_TIM12
  55. TIM12_INDEX,
  56. #endif
  57. #ifdef BSP_USING_TIM13
  58. TIM13_INDEX,
  59. #endif
  60. #ifdef BSP_USING_TIM14
  61. TIM14_INDEX,
  62. #endif
  63. #ifdef BSP_USING_TIM15
  64. TIM15_INDEX,
  65. #endif
  66. #ifdef BSP_USING_TIM16
  67. TIM16_INDEX,
  68. #endif
  69. #ifdef BSP_USING_TIM17
  70. TIM17_INDEX,
  71. #endif
  72. };
  73. struct stm32_hwtimer
  74. {
  75. rt_hwtimer_t time_device;
  76. TIM_HandleTypeDef tim_handle;
  77. IRQn_Type tim_irqn;
  78. char *name;
  79. };
  80. static struct stm32_hwtimer stm32_hwtimer_obj[] =
  81. {
  82. #ifdef BSP_USING_TIM1
  83. TIM1_CONFIG,
  84. #endif
  85. #ifdef BSP_USING_TIM2
  86. TIM2_CONFIG,
  87. #endif
  88. #ifdef BSP_USING_TIM3
  89. TIM3_CONFIG,
  90. #endif
  91. #ifdef BSP_USING_TIM4
  92. TIM4_CONFIG,
  93. #endif
  94. #ifdef BSP_USING_TIM5
  95. TIM5_CONFIG,
  96. #endif
  97. #ifdef BSP_USING_TIM6
  98. TIM6_CONFIG,
  99. #endif
  100. #ifdef BSP_USING_TIM7
  101. TIM7_CONFIG,
  102. #endif
  103. #ifdef BSP_USING_TIM8
  104. TIM8_CONFIG,
  105. #endif
  106. #ifdef BSP_USING_TIM9
  107. TIM9_CONFIG,
  108. #endif
  109. #ifdef BSP_USING_TIM10
  110. TIM10_CONFIG,
  111. #endif
  112. #ifdef BSP_USING_TIM11
  113. TIM11_CONFIG,
  114. #endif
  115. #ifdef BSP_USING_TIM12
  116. TIM12_CONFIG,
  117. #endif
  118. #ifdef BSP_USING_TIM13
  119. TIM13_CONFIG,
  120. #endif
  121. #ifdef BSP_USING_TIM14
  122. TIM14_CONFIG,
  123. #endif
  124. #ifdef BSP_USING_TIM15
  125. TIM15_CONFIG,
  126. #endif
  127. #ifdef BSP_USING_TIM16
  128. TIM16_CONFIG,
  129. #endif
  130. #ifdef BSP_USING_TIM17
  131. TIM17_CONFIG,
  132. #endif
  133. };
  134. static void timer_init(struct rt_hwtimer_device *timer, rt_uint32_t state)
  135. {
  136. uint32_t prescaler_value = 0;
  137. TIM_HandleTypeDef *tim = RT_NULL;
  138. struct stm32_hwtimer *tim_device = RT_NULL;
  139. RT_ASSERT(timer != RT_NULL);
  140. if (state)
  141. {
  142. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  143. tim_device = (struct stm32_hwtimer *)timer;
  144. uint32_t FLatency = 0;
  145. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  146. HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &FLatency);
  147. uint32_t pclk1_doubler = 1;
  148. uint32_t pclk2_doubler = 1;
  149. if(RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
  150. {
  151. pclk1_doubler = pclk1_doubler + 1;
  152. }
  153. if(RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
  154. {
  155. pclk2_doubler = pclk2_doubler + 1;
  156. }
  157. /* time init */
  158. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  159. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  160. #elif defined(SOC_SERIES_STM32L4)
  161. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  162. #elif defined(SOC_SERIES_STM32MP1)
  163. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  164. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  165. if (0)
  166. #endif
  167. {
  168. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  169. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK2Freq() * pclk2_doubler / 10000) - 1;
  170. #endif
  171. }
  172. else
  173. {
  174. prescaler_value = (uint32_t)(HAL_RCC_GetPCLK1Freq() * pclk1_doubler / 10000) - 1;
  175. }
  176. tim->Init.Period = 10000 - 1;
  177. tim->Init.Prescaler = prescaler_value;
  178. tim->Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
  179. if (timer->info->cntmode == HWTIMER_CNTMODE_UP)
  180. {
  181. tim->Init.CounterMode = TIM_COUNTERMODE_UP;
  182. }
  183. else
  184. {
  185. tim->Init.CounterMode = TIM_COUNTERMODE_DOWN;
  186. }
  187. tim->Init.RepetitionCounter = 0;
  188. #if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0) || defined(SOC_SERIES_STM32MP1)
  189. tim->Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
  190. #endif
  191. if (HAL_TIM_Base_Init(tim) != HAL_OK)
  192. {
  193. LOG_E("%s init failed", tim_device->name);
  194. return;
  195. }
  196. else
  197. {
  198. /* set the TIMx priority */
  199. HAL_NVIC_SetPriority(tim_device->tim_irqn, 3, 0);
  200. /* enable the TIMx global Interrupt */
  201. HAL_NVIC_EnableIRQ(tim_device->tim_irqn);
  202. /* clear update flag */
  203. __HAL_TIM_CLEAR_FLAG(tim, TIM_FLAG_UPDATE);
  204. /* enable update request source */
  205. __HAL_TIM_URS_ENABLE(tim);
  206. LOG_D("%s init success", tim_device->name);
  207. }
  208. }
  209. }
  210. static rt_err_t timer_start(rt_hwtimer_t *timer, rt_uint32_t t, rt_hwtimer_mode_t opmode)
  211. {
  212. rt_err_t result = RT_EOK;
  213. TIM_HandleTypeDef *tim = RT_NULL;
  214. RT_ASSERT(timer != RT_NULL);
  215. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  216. /* set tim cnt */
  217. __HAL_TIM_SET_COUNTER(tim, 0);
  218. /* set tim arr */
  219. __HAL_TIM_SET_AUTORELOAD(tim, t - 1);
  220. if (opmode == HWTIMER_MODE_ONESHOT)
  221. {
  222. /* set timer to single mode */
  223. tim->Instance->CR1 |= TIM_OPMODE_SINGLE;
  224. }
  225. else
  226. {
  227. tim->Instance->CR1 &= (~TIM_OPMODE_SINGLE);
  228. }
  229. /* start timer */
  230. if (HAL_TIM_Base_Start_IT(tim) != HAL_OK)
  231. {
  232. LOG_E("TIM start failed");
  233. result = -RT_ERROR;
  234. }
  235. return result;
  236. }
  237. static void timer_stop(rt_hwtimer_t *timer)
  238. {
  239. TIM_HandleTypeDef *tim = RT_NULL;
  240. RT_ASSERT(timer != RT_NULL);
  241. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  242. /* stop timer */
  243. HAL_TIM_Base_Stop_IT(tim);
  244. /* set tim cnt */
  245. __HAL_TIM_SET_COUNTER(tim, 0);
  246. }
  247. static rt_err_t timer_ctrl(rt_hwtimer_t *timer, rt_uint32_t cmd, void *arg)
  248. {
  249. TIM_HandleTypeDef *tim = RT_NULL;
  250. rt_err_t result = RT_EOK;
  251. RT_ASSERT(timer != RT_NULL);
  252. RT_ASSERT(arg != RT_NULL);
  253. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  254. switch (cmd)
  255. {
  256. case HWTIMER_CTRL_FREQ_SET:
  257. {
  258. rt_uint32_t freq;
  259. rt_uint16_t val;
  260. /* set timer frequence */
  261. freq = *((rt_uint32_t *)arg);
  262. uint32_t FLatency = 0;
  263. RCC_ClkInitTypeDef RCC_ClkInitStruct;
  264. HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &FLatency);
  265. uint32_t pclk1_doubler = 1;
  266. uint32_t pclk2_doubler = 1;
  267. if(RCC_ClkInitStruct.APB1CLKDivider != RCC_HCLK_DIV1)
  268. {
  269. pclk1_doubler = pclk1_doubler + 1;
  270. }
  271. if(RCC_ClkInitStruct.APB2CLKDivider != RCC_HCLK_DIV1)
  272. {
  273. pclk2_doubler = pclk2_doubler + 1;
  274. }
  275. #if defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  276. if (tim->Instance == TIM9 || tim->Instance == TIM10 || tim->Instance == TIM11)
  277. #elif defined(SOC_SERIES_STM32L4)
  278. if (tim->Instance == TIM15 || tim->Instance == TIM16 || tim->Instance == TIM17)
  279. #elif defined(SOC_SERIES_STM32MP1)
  280. if(tim->Instance == TIM14 || tim->Instance == TIM16 || tim->Instance == TIM17)
  281. #elif defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32G0)
  282. if (0)
  283. #endif
  284. {
  285. #if !defined(SOC_SERIES_STM32F0) && !defined(SOC_SERIES_STM32G0)
  286. val = HAL_RCC_GetPCLK2Freq() * pclk2_doubler / freq;
  287. #endif
  288. }
  289. else
  290. {
  291. val = HAL_RCC_GetPCLK1Freq() * pclk1_doubler / freq;
  292. }
  293. __HAL_TIM_SET_PRESCALER(tim, val - 1);
  294. /* Update frequency value */
  295. tim->Instance->EGR |= TIM_EVENTSOURCE_UPDATE;
  296. }
  297. break;
  298. default:
  299. {
  300. result = -RT_ENOSYS;
  301. }
  302. break;
  303. }
  304. return result;
  305. }
  306. static rt_uint32_t timer_counter_get(rt_hwtimer_t *timer)
  307. {
  308. TIM_HandleTypeDef *tim = RT_NULL;
  309. RT_ASSERT(timer != RT_NULL);
  310. tim = (TIM_HandleTypeDef *)timer->parent.user_data;
  311. return tim->Instance->CNT;
  312. }
  313. static const struct rt_hwtimer_info _info = TIM_DEV_INFO_CONFIG;
  314. static const struct rt_hwtimer_ops _ops =
  315. {
  316. .init = timer_init,
  317. .start = timer_start,
  318. .stop = timer_stop,
  319. .count_get = timer_counter_get,
  320. .control = timer_ctrl,
  321. };
  322. #ifdef BSP_USING_TIM2
  323. void TIM2_IRQHandler(void)
  324. {
  325. /* enter interrupt */
  326. rt_interrupt_enter();
  327. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM2_INDEX].tim_handle);
  328. /* leave interrupt */
  329. rt_interrupt_leave();
  330. }
  331. #endif
  332. #ifdef BSP_USING_TIM3
  333. void TIM3_IRQHandler(void)
  334. {
  335. /* enter interrupt */
  336. rt_interrupt_enter();
  337. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM3_INDEX].tim_handle);
  338. /* leave interrupt */
  339. rt_interrupt_leave();
  340. }
  341. #endif
  342. #ifdef BSP_USING_TIM4
  343. void TIM4_IRQHandler(void)
  344. {
  345. /* enter interrupt */
  346. rt_interrupt_enter();
  347. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM4_INDEX].tim_handle);
  348. /* leave interrupt */
  349. rt_interrupt_leave();
  350. }
  351. #endif
  352. #ifdef BSP_USING_TIM5
  353. void TIM5_IRQHandler(void)
  354. {
  355. /* enter interrupt */
  356. rt_interrupt_enter();
  357. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM5_INDEX].tim_handle);
  358. /* leave interrupt */
  359. rt_interrupt_leave();
  360. }
  361. #endif
  362. #ifdef BSP_USING_TIM11
  363. void TIM1_TRG_COM_TIM11_IRQHandler(void)
  364. {
  365. /* enter interrupt */
  366. rt_interrupt_enter();
  367. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM11_INDEX].tim_handle);
  368. /* leave interrupt */
  369. rt_interrupt_leave();
  370. }
  371. #endif
  372. #ifdef BSP_USING_TIM13
  373. void TIM8_UP_TIM13_IRQHandler(void)
  374. {
  375. /* enter interrupt */
  376. rt_interrupt_enter();
  377. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM13_INDEX].tim_handle);
  378. /* leave interrupt */
  379. rt_interrupt_leave();
  380. }
  381. #endif
  382. #ifdef BSP_USING_TIM14
  383. #if defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7)
  384. void TIM8_TRG_COM_TIM14_IRQHandler(void)
  385. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  386. void TIM14_IRQHandler(void)
  387. #endif
  388. {
  389. /* enter interrupt */
  390. rt_interrupt_enter();
  391. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM14_INDEX].tim_handle);
  392. /* leave interrupt */
  393. rt_interrupt_leave();
  394. }
  395. #endif
  396. #ifdef BSP_USING_TIM15
  397. void TIM1_BRK_TIM15_IRQHandler(void)
  398. {
  399. /* enter interrupt */
  400. rt_interrupt_enter();
  401. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM15_INDEX].tim_handle);
  402. /* leave interrupt */
  403. rt_interrupt_leave();
  404. }
  405. #endif
  406. #ifdef BSP_USING_TIM16
  407. #if defined(SOC_SERIES_STM32L4)
  408. void TIM1_UP_TIM16_IRQHandler(void)
  409. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  410. void TIM16_IRQHandler(void)
  411. #endif
  412. {
  413. /* enter interrupt */
  414. rt_interrupt_enter();
  415. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM16_INDEX].tim_handle);
  416. /* leave interrupt */
  417. rt_interrupt_leave();
  418. }
  419. #endif
  420. #ifdef BSP_USING_TIM17
  421. #if defined(SOC_SERIES_STM32L4)
  422. void TIM1_TRG_COM_TIM17_IRQHandler(void)
  423. #elif defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32MP1)
  424. void TIM17_IRQHandler(void)
  425. #endif
  426. {
  427. /* enter interrupt */
  428. rt_interrupt_enter();
  429. HAL_TIM_IRQHandler(&stm32_hwtimer_obj[TIM17_INDEX].tim_handle);
  430. /* leave interrupt */
  431. rt_interrupt_leave();
  432. }
  433. #endif
  434. void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
  435. {
  436. #ifdef BSP_USING_TIM2
  437. if (htim->Instance == TIM2)
  438. {
  439. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM2_INDEX].time_device);
  440. }
  441. #endif
  442. #ifdef BSP_USING_TIM3
  443. if (htim->Instance == TIM3)
  444. {
  445. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM3_INDEX].time_device);
  446. }
  447. #endif
  448. #ifdef BSP_USING_TIM4
  449. if (htim->Instance == TIM4)
  450. {
  451. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM4_INDEX].time_device);
  452. }
  453. #endif
  454. #ifdef BSP_USING_TIM5
  455. if (htim->Instance == TIM5)
  456. {
  457. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM5_INDEX].time_device);
  458. }
  459. #endif
  460. #ifdef BSP_USING_TIM11
  461. if (htim->Instance == TIM11)
  462. {
  463. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM11_INDEX].time_device);
  464. }
  465. #endif
  466. #ifdef BSP_USING_TIM13
  467. if (htim->Instance == TIM13)
  468. {
  469. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM13_INDEX].time_device);
  470. }
  471. #endif
  472. #ifdef BSP_USING_TIM14
  473. if (htim->Instance == TIM14)
  474. {
  475. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM14_INDEX].time_device);
  476. }
  477. #endif
  478. #ifdef BSP_USING_TIM15
  479. if (htim->Instance == TIM15)
  480. {
  481. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM15_INDEX].time_device);
  482. }
  483. #endif
  484. #ifdef BSP_USING_TIM16
  485. if (htim->Instance == TIM16)
  486. {
  487. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM16_INDEX].time_device);
  488. }
  489. #endif
  490. #ifdef BSP_USING_TIM17
  491. if (htim->Instance == TIM17)
  492. {
  493. rt_device_hwtimer_isr(&stm32_hwtimer_obj[TIM17_INDEX].time_device);
  494. }
  495. #endif
  496. }
  497. static int stm32_hwtimer_init(void)
  498. {
  499. int i = 0;
  500. int result = RT_EOK;
  501. for (i = 0; i < sizeof(stm32_hwtimer_obj) / sizeof(stm32_hwtimer_obj[0]); i++)
  502. {
  503. stm32_hwtimer_obj[i].time_device.info = &_info;
  504. stm32_hwtimer_obj[i].time_device.ops = &_ops;
  505. if (rt_device_hwtimer_register(&stm32_hwtimer_obj[i].time_device, stm32_hwtimer_obj[i].name, &stm32_hwtimer_obj[i].tim_handle) == RT_EOK)
  506. {
  507. LOG_D("%s register success", stm32_hwtimer_obj[i].name);
  508. }
  509. else
  510. {
  511. LOG_E("%s register failed", stm32_hwtimer_obj[i].name);
  512. result = -RT_ERROR;
  513. }
  514. }
  515. return result;
  516. }
  517. INIT_BOARD_EXPORT(stm32_hwtimer_init);
  518. #endif /* RT_USING_HWTIMER */
  519. #endif /* BSP_USING_TIM */