drv_uart.c 4.0 KB

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  1. /*
  2. * Copyright (c) 2006-2020, RT-Thread Development Team
  3. *
  4. * SPDX-License-Identifier: Apache-2.0
  5. *
  6. * Change Logs:
  7. * Date Author Notes
  8. * 2020-04-16 bigmagic first version
  9. */
  10. #include <rthw.h>
  11. #include <rtthread.h>
  12. #include <rtdevice.h>
  13. #include "board.h"
  14. #include "drv_uart.h"
  15. #include "drv_gpio.h"
  16. #define UART0_BASE (0xFE000000 + 0x00201000)
  17. #define PL011_BASE UART0_BASE
  18. #define IRQ_PL011 (121 + 32)
  19. #define UART_REFERENCE_CLOCK 48000000
  20. struct hw_uart_device
  21. {
  22. rt_ubase_t hw_base;
  23. rt_uint32_t irqno;
  24. };
  25. static rt_err_t uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
  26. {
  27. struct hw_uart_device *uart;
  28. uint32_t bauddiv = (UART_REFERENCE_CLOCK / cfg->baud_rate)* 1000 / 16;
  29. uint32_t ibrd = bauddiv / 1000;
  30. RT_ASSERT(serial != RT_NULL);
  31. uart = (struct hw_uart_device *)serial->parent.user_data;
  32. if(uart->hw_base == PL011_BASE)
  33. {
  34. uint32_t gpfsel = 0;
  35. gpfsel &= ~((uint32_t)(0x07 << (4 * 3)));
  36. gpfsel |= (uint32_t)(ALT0 << (4 * 3));
  37. GPIO_REG_GPFSEL1(GPIO_BASE) = gpfsel;
  38. gpfsel &= ~((uint32_t)(0x07 << (5 * 3)));
  39. gpfsel |= (uint32_t)(ALT0 << (5 * 3));
  40. GPIO_REG_GPFSEL1(GPIO_BASE) = gpfsel;
  41. PL011_REG_CR(uart->hw_base) = 0;/*Clear UART setting*/
  42. PL011_REG_LCRH(uart->hw_base) = 0;/*disable FIFO*/
  43. PL011_REG_IBRD(uart->hw_base) = ibrd;
  44. PL011_REG_FBRD(uart->hw_base) = (((bauddiv - ibrd * 1000) * 64 + 500) / 1000);
  45. PL011_REG_LCRH(uart->hw_base) = PL011_LCRH_WLEN_8;/*FIFO*/
  46. PL011_REG_CR(uart->hw_base) = PL011_CR_UARTEN | PL011_CR_TXE | PL011_CR_RXE;/*art enable, TX/RX enable*/
  47. }
  48. return RT_EOK;
  49. }
  50. static rt_err_t uart_control(struct rt_serial_device *serial, int cmd, void *arg)
  51. {
  52. struct hw_uart_device *uart;
  53. RT_ASSERT(serial != RT_NULL);
  54. uart = (struct hw_uart_device *)serial->parent.user_data;
  55. switch (cmd)
  56. {
  57. case RT_DEVICE_CTRL_CLR_INT:
  58. /* disable rx irq */
  59. PL011_REG_IMSC(uart->hw_base) &= ~((uint32_t)PL011_IMSC_RXIM);
  60. rt_hw_interrupt_mask(uart->irqno);
  61. break;
  62. case RT_DEVICE_CTRL_SET_INT:
  63. /* enable rx irq */
  64. PL011_REG_IMSC(uart->hw_base) |= PL011_IMSC_RXIM;
  65. rt_hw_interrupt_umask(uart->irqno);
  66. break;
  67. }
  68. return RT_EOK;
  69. }
  70. static int uart_putc(struct rt_serial_device *serial, char c)
  71. {
  72. struct hw_uart_device *uart;
  73. RT_ASSERT(serial != RT_NULL);
  74. uart = (struct hw_uart_device *)serial->parent.user_data;
  75. while ((PL011_REG_FR(uart->hw_base) & PL011_FR_TXFF));
  76. PL011_REG_DR(uart->hw_base) = (uint8_t)c;
  77. return 1;
  78. }
  79. static int uart_getc(struct rt_serial_device *serial)
  80. {
  81. int ch = -1;
  82. struct hw_uart_device *uart;
  83. RT_ASSERT(serial != RT_NULL);
  84. uart = (struct hw_uart_device *)serial->parent.user_data;
  85. if((PL011_REG_FR(uart->hw_base) & PL011_FR_RXFE) == 0)
  86. {
  87. ch = PL011_REG_DR(uart->hw_base) & 0xff;
  88. }
  89. return ch;
  90. }
  91. static const struct rt_uart_ops _uart_ops =
  92. {
  93. uart_configure,
  94. uart_control,
  95. uart_putc,
  96. uart_getc,
  97. };
  98. static void rt_hw_uart_isr(int irqno, void *param)
  99. {
  100. struct rt_serial_device *serial = (struct rt_serial_device*)param;
  101. rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
  102. PL011_REG_ICR(UART0_BASE) = PL011_INTERRUPT_RECEIVE;
  103. }
  104. /* UART device driver structure */
  105. static struct hw_uart_device _uart0_device =
  106. {
  107. PL011_BASE,
  108. IRQ_PL011,
  109. };
  110. static struct rt_serial_device _serial0;
  111. int rt_hw_uart_init(void)
  112. {
  113. struct hw_uart_device *uart;
  114. struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
  115. uart = &_uart0_device;
  116. _serial0.ops = &_uart_ops;
  117. _serial0.config = config;
  118. /* register UART1 device */
  119. rt_hw_serial_register(&_serial0, "uart",
  120. RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
  121. uart);
  122. rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, &_serial0, "uart");
  123. return 0;
  124. }