bsp: artpi2: init project. (#10364)

.github/ALL_BSP_COMPILE.json

@@ -203,6 +203,7 @@
         "stm32/stm32h750-weact-ministm32h7xx",
         "stm32/stm32h750-fk750m1-vbt6",
         "stm32/stm32h7s7-st-disco",
+        "stm32/stm32h7r7-artpi2",
         "stm32/stm32mp157a-st-discovery",
         "stm32/stm32mp157a-st-ev1",
         "stm32/stm32u575-st-nucleo",

bsp/stm32/libraries/HAL_Drivers/drivers/SConscript

@@ -110,7 +110,7 @@ if GetDepend(['BSP_USING_WDT']):
     src += ['drv_wdt.c']
 
 if GetDepend(['BSP_USING_SDIO']):
-    if GetDepend('SOC_SERIES_STM32H7') or GetDepend('SOC_SERIES_STM32F7') or GetDepend('SOC_SERIES_STM32L4') or GetDepend('SOC_SERIES_STM32L5'):
+    if GetDepend('SOC_SERIES_STM32H7RS') or GetDepend('SOC_SERIES_STM32H7') or GetDepend('SOC_SERIES_STM32F7') or GetDepend('SOC_SERIES_STM32L4') or GetDepend('SOC_SERIES_STM32L5'):
         src += ['drv_sdmmc.c']
     else:
         src += ['drv_sdio.c']

bsp/stm32/libraries/HAL_Drivers/drivers/drv_sdmmc.c

@@ -269,7 +269,11 @@ static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
         hsd->DTIMER = HW_SDIO_DATATIMEOUT;
         hsd->DLEN = data->blks * data->blksize;
         hsd->DCTRL = (get_order(data->blksize) << 4) | (data->flags & DATA_DIR_READ ? SDMMC_DCTRL_DTDIR : 0);
-        hsd->IDMABASE0 = (rt_uint32_t)cache_buf;
+        #ifndef SOC_SERIES_STM32H7RS
+            hsd->IDMABASE0 = (rt_uint32_t)cache_buf;
+        #else
+            hsd->IDMABASER = (rt_uint32_t)cache_buf;
+        #endif
         hsd->IDMACTRL = SDMMC_IDMA_IDMAEN;
     }
      /* config cmd reg */
@@ -648,7 +652,11 @@ struct rt_mmcsd_host *sdio_host_create(struct stm32_sdio_des *sdio_des)
   */
 static rt_uint32_t stm32_sdio_clock_get(void)
 {
-    return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC);
+    #ifndef SOC_SERIES_STM32H7RS
+        return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC);
+    #else
+        return HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_SDMMC12);
+    #endif
 }
 
 void SDMMC1_IRQHandler(void)

bsp/stm32/stm32h7r7-artpi2/.config

@@ -0,0 +1,1401 @@
+CONFIG_SOC_STM32H7RS=y
+CONFIG_SOC_SERIES_STM32H7RS=y
+
+#
+# RT-Thread Kernel
+#
+
+#
+# klibc options
+#
+
+#
+# rt_vsnprintf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSNPRINTF is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_LONGLONG is not set
+# CONFIG_RT_KLIBC_USING_VSNPRINTF_STANDARD is not set
+# end of rt_vsnprintf options
+
+#
+# rt_vsscanf options
+#
+# CONFIG_RT_KLIBC_USING_LIBC_VSSCANF is not set
+# end of rt_vsscanf options
+
+#
+# rt_memset options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMSET is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMSET is not set
+# end of rt_memset options
+
+#
+# rt_memcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCPY is not set
+# CONFIG_RT_KLIBC_USING_TINY_MEMCPY is not set
+# end of rt_memcpy options
+
+#
+# rt_memmove options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMMOVE is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMMOVE is not set
+# end of rt_memmove options
+
+#
+# rt_memcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_MEMCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_MEMCMP is not set
+# end of rt_memcmp options
+
+#
+# rt_strstr options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRSTR is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRSTR is not set
+# end of rt_strstr options
+
+#
+# rt_strcasecmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCASECMP is not set
+# end of rt_strcasecmp options
+
+#
+# rt_strncpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCPY is not set
+# end of rt_strncpy options
+
+#
+# rt_strcpy options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCPY is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCPY is not set
+# end of rt_strcpy options
+
+#
+# rt_strncmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRNCMP is not set
+# end of rt_strncmp options
+
+#
+# rt_strcmp options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRCMP is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRCMP is not set
+# end of rt_strcmp options
+
+#
+# rt_strlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRLEN is not set
+# CONFIG_RT_KLIBC_USING_LIBC_STRLEN is not set
+# end of rt_strlen options
+
+#
+# rt_strnlen options
+#
+# CONFIG_RT_KLIBC_USING_USER_STRNLEN is not set
+# end of rt_strnlen options
+
+# CONFIG_RT_UTEST_TC_USING_KLIBC is not set
+# end of klibc options
+
+CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
+# CONFIG_RT_USING_NANO is not set
+# CONFIG_RT_USING_SMART is not set
+# CONFIG_RT_USING_AMP is not set
+# CONFIG_RT_USING_SMP is not set
+CONFIG_RT_CPUS_NR=1
+CONFIG_RT_ALIGN_SIZE=8
+# CONFIG_RT_THREAD_PRIORITY_8 is not set
+CONFIG_RT_THREAD_PRIORITY_32=y
+# CONFIG_RT_THREAD_PRIORITY_256 is not set
+CONFIG_RT_THREAD_PRIORITY_MAX=32
+CONFIG_RT_TICK_PER_SECOND=1000
+CONFIG_RT_USING_OVERFLOW_CHECK=y
+CONFIG_RT_USING_HOOK=y
+CONFIG_RT_HOOK_USING_FUNC_PTR=y
+# CONFIG_RT_USING_HOOKLIST is not set
+CONFIG_RT_USING_IDLE_HOOK=y
+CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
+CONFIG_IDLE_THREAD_STACK_SIZE=256
+# CONFIG_RT_USING_TIMER_SOFT is not set
+# CONFIG_RT_USING_CPU_USAGE_TRACER is not set
+
+#
+# kservice options
+#
+# CONFIG_RT_USING_TINY_FFS is not set
+# end of kservice options
+
+CONFIG_RT_USING_DEBUG=y
+CONFIG_RT_DEBUGING_ASSERT=y
+CONFIG_RT_DEBUGING_COLOR=y
+CONFIG_RT_DEBUGING_CONTEXT=y
+# CONFIG_RT_DEBUGING_AUTO_INIT is not set
+# CONFIG_RT_USING_CI_ACTION is not set
+
+#
+# Inter-Thread communication
+#
+CONFIG_RT_USING_SEMAPHORE=y
+CONFIG_RT_USING_MUTEX=y
+CONFIG_RT_USING_EVENT=y
+CONFIG_RT_USING_MAILBOX=y
+CONFIG_RT_USING_MESSAGEQUEUE=y
+# CONFIG_RT_USING_MESSAGEQUEUE_PRIORITY is not set
+# CONFIG_RT_USING_SIGNALS is not set
+# end of Inter-Thread communication
+
+#
+# Memory Management
+#
+CONFIG_RT_USING_MEMPOOL=y
+CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SLAB is not set
+# CONFIG_RT_USING_MEMHEAP is not set
+CONFIG_RT_USING_SMALL_MEM_AS_HEAP=y
+# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+# CONFIG_RT_USING_SLAB_AS_HEAP is not set
+# CONFIG_RT_USING_USERHEAP is not set
+# CONFIG_RT_USING_NOHEAP is not set
+# CONFIG_RT_USING_MEMTRACE is not set
+# CONFIG_RT_USING_HEAP_ISR is not set
+CONFIG_RT_USING_HEAP=y
+# end of Memory Management
+
+CONFIG_RT_USING_DEVICE=y
+# CONFIG_RT_USING_DEVICE_OPS is not set
+# CONFIG_RT_USING_INTERRUPT_INFO is not set
+# CONFIG_RT_USING_THREADSAFE_PRINTF is not set
+CONFIG_RT_USING_CONSOLE=y
+CONFIG_RT_CONSOLEBUF_SIZE=128
+CONFIG_RT_CONSOLE_DEVICE_NAME="uart4"
+CONFIG_RT_VER_NUM=0x50201
+# CONFIG_RT_USING_STDC_ATOMIC is not set
+CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
+# end of RT-Thread Kernel
+
+CONFIG_RT_USING_CACHE=y
+CONFIG_RT_USING_HW_ATOMIC=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M7=y
+
+#
+# RT-Thread Components
+#
+CONFIG_RT_USING_COMPONENTS_INIT=y
+CONFIG_RT_USING_USER_MAIN=y
+CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
+CONFIG_RT_MAIN_THREAD_PRIORITY=10
+# CONFIG_RT_USING_LEGACY is not set
+CONFIG_RT_USING_MSH=y
+CONFIG_RT_USING_FINSH=y
+CONFIG_FINSH_USING_MSH=y
+CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
+CONFIG_FINSH_USING_HISTORY=y
+CONFIG_FINSH_HISTORY_LINES=5
+CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_CMD_SIZE=80
+CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
+CONFIG_FINSH_USING_DESCRIPTION=y
+# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
+# CONFIG_FINSH_USING_AUTH is not set
+CONFIG_FINSH_ARG_MAX=10
+CONFIG_FINSH_USING_OPTION_COMPLETION=y
+
+#
+# DFS: device virtual file system
+#
+# CONFIG_RT_USING_DFS is not set
+# end of DFS: device virtual file system
+
+# CONFIG_RT_USING_FAL is not set
+
+#
+# Device Drivers
+#
+# CONFIG_RT_USING_DM is not set
+# CONFIG_RT_USING_DEV_BUS is not set
+CONFIG_RT_USING_DEVICE_IPC=y
+CONFIG_RT_UNAMED_PIPE_NUMBER=64
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
+CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_USING_SERIAL_V1=y
+# CONFIG_RT_USING_SERIAL_V2 is not set
+# CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
+# CONFIG_RT_USING_SERIAL_BYPASS is not set
+# CONFIG_RT_USING_CAN is not set
+# CONFIG_RT_USING_CPUTIME is not set
+CONFIG_RT_USING_I2C=y
+# CONFIG_RT_I2C_DEBUG is not set
+CONFIG_RT_USING_I2C_BITOPS=y
+# CONFIG_RT_I2C_BITOPS_DEBUG is not set
+# CONFIG_RT_USING_SOFT_I2C is not set
+# CONFIG_RT_USING_PHY is not set
+# CONFIG_RT_USING_PHY_V2 is not set
+# CONFIG_RT_USING_ADC is not set
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_NULL is not set
+# CONFIG_RT_USING_ZERO is not set
+# CONFIG_RT_USING_RANDOM is not set
+# CONFIG_RT_USING_PWM is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
+# CONFIG_RT_USING_MTD_NOR is not set
+# CONFIG_RT_USING_MTD_NAND is not set
+# CONFIG_RT_USING_PM is not set
+# CONFIG_RT_USING_RTC is not set
+# CONFIG_RT_USING_SDIO is not set
+CONFIG_RT_USING_SPI=y
+# CONFIG_RT_USING_SOFT_SPI is not set
+# CONFIG_RT_USING_QSPI is not set
+# CONFIG_RT_USING_SPI_MSD is not set
+# CONFIG_RT_USING_SFUD is not set
+# CONFIG_RT_USING_ENC28J60 is not set
+# CONFIG_RT_USING_SPI_WIFI is not set
+# CONFIG_RT_USING_WDT is not set
+# CONFIG_RT_USING_AUDIO is not set
+# CONFIG_RT_USING_SENSOR is not set
+CONFIG_RT_USING_TOUCH=y
+# CONFIG_RT_TOUCH_PIN_IRQ is not set
+# CONFIG_RT_USING_LCD is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_WIFI is not set
+# CONFIG_RT_USING_BLK is not set
+# CONFIG_RT_USING_VIRTIO is not set
+CONFIG_RT_USING_PIN=y
+# CONFIG_RT_USING_KTIME is not set
+# CONFIG_RT_USING_HWTIMER is not set
+# CONFIG_RT_USING_CHERRYUSB is not set
+# end of Device Drivers
+
+#
+# C/C++ and POSIX layer
+#
+
+#
+# ISO-ANSI C layer
+#
+
+#
+# Timezone and Daylight Saving Time
+#
+# CONFIG_RT_LIBC_USING_FULL_TZ_DST is not set
+CONFIG_RT_LIBC_USING_LIGHT_TZ_DST=y
+CONFIG_RT_LIBC_TZ_DEFAULT_HOUR=8
+CONFIG_RT_LIBC_TZ_DEFAULT_MIN=0
+CONFIG_RT_LIBC_TZ_DEFAULT_SEC=0
+# end of Timezone and Daylight Saving Time
+# end of ISO-ANSI C layer
+
+#
+# POSIX (Portable Operating System Interface) layer
+#
+# CONFIG_RT_USING_POSIX_FS is not set
+# CONFIG_RT_USING_POSIX_DELAY is not set
+# CONFIG_RT_USING_POSIX_CLOCK is not set
+# CONFIG_RT_USING_POSIX_TIMER is not set
+# CONFIG_RT_USING_PTHREADS is not set
+# CONFIG_RT_USING_MODULE is not set
+
+#
+# Interprocess Communication (IPC)
+#
+# CONFIG_RT_USING_POSIX_PIPE is not set
+# CONFIG_RT_USING_POSIX_MESSAGE_QUEUE is not set
+# CONFIG_RT_USING_POSIX_MESSAGE_SEMAPHORE is not set
+
+#
+# Socket is in the 'Network' category
+#
+# end of Interprocess Communication (IPC)
+# end of POSIX (Portable Operating System Interface) layer
+
+# CONFIG_RT_USING_CPLUSPLUS is not set
+# end of C/C++ and POSIX layer
+
+#
+# Network
+#
+# CONFIG_RT_USING_SAL is not set
+# CONFIG_RT_USING_NETDEV is not set
+# CONFIG_RT_USING_LWIP is not set
+# CONFIG_RT_USING_AT is not set
+# end of Network
+
+#
+# Memory protection
+#
+# CONFIG_RT_USING_MEM_PROTECTION is not set
+# CONFIG_RT_USING_HW_STACK_GUARD is not set
+# end of Memory protection
+
+#
+# Utilities
+#
+# CONFIG_RT_USING_RYM is not set
+# CONFIG_RT_USING_ULOG is not set
+# CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_VAR_EXPORT is not set
+# CONFIG_RT_USING_RESOURCE_ID is not set
+# CONFIG_RT_USING_ADT is not set
+# CONFIG_RT_USING_RT_LINK is not set
+# end of Utilities
+
+# CONFIG_RT_USING_VBUS is not set
+
+#
+# Using USB legacy version
+#
+# CONFIG_RT_USING_USB_HOST is not set
+# CONFIG_RT_USING_USB_DEVICE is not set
+# end of Using USB legacy version
+
+# CONFIG_RT_USING_FDT is not set
+# end of RT-Thread Components
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set
+# end of RT-Thread Utestcases
+
+#
+# RT-Thread online packages
+#
+
+#
+# IoT - internet of things
+#
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
+# CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
+# CONFIG_PKG_USING_WEBCLIENT is not set
+# CONFIG_PKG_USING_WEBNET is not set
+# CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
+# CONFIG_PKG_USING_WEBTERMINAL is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
+# CONFIG_PKG_USING_NANOPB is not set
+# CONFIG_PKG_USING_WIFI_HOST_DRIVER is not set
+
+#
+# Wi-Fi
+#
+
+#
+# Marvell WiFi
+#
+# CONFIG_PKG_USING_WLANMARVELL is not set
+# end of Marvell WiFi
+
+#
+# Wiced WiFi
+#
+# CONFIG_PKG_USING_WLAN_WICED is not set
+# end of Wiced WiFi
+
+# CONFIG_PKG_USING_RW007 is not set
+
+#
+# CYW43012 WiFi
+#
+# CONFIG_PKG_USING_WLAN_CYW43012 is not set
+# end of CYW43012 WiFi
+
+#
+# BL808 WiFi
+#
+# CONFIG_PKG_USING_WLAN_BL808 is not set
+# end of BL808 WiFi
+
+#
+# CYW43439 WiFi
+#
+# CONFIG_PKG_USING_WLAN_CYW43439 is not set
+# end of CYW43439 WiFi
+# end of Wi-Fi
+
+# CONFIG_PKG_USING_COAP is not set
+# CONFIG_PKG_USING_NOPOLL is not set
+# CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
+# CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
+# CONFIG_PKG_USING_WIZNET is not set
+# CONFIG_PKG_USING_ZB_COORDINATOR is not set
+
+#
+# IoT Cloud
+#
+# CONFIG_PKG_USING_ONENET is not set
+# CONFIG_PKG_USING_GAGENT_CLOUD is not set
+# CONFIG_PKG_USING_ALI_IOTKIT is not set
+# CONFIG_PKG_USING_AZURE is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_IOTSHARP_SDK is not set
+# end of IoT Cloud
+
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_LLSYNC_SDK_ADAPTER is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_BT_CYW43012 is not set
+# CONFIG_PKG_USING_CYW43XX is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+# CONFIG_PKG_USING_RT_LINK_HW is not set
+# CONFIG_PKG_USING_RYANMQTT is not set
+# CONFIG_PKG_USING_RYANW5500 is not set
+# CONFIG_PKG_USING_LORA_PKT_FWD is not set
+# CONFIG_PKG_USING_LORA_GW_DRIVER_LIB is not set
+# CONFIG_PKG_USING_LORA_PKT_SNIFFER is not set
+# CONFIG_PKG_USING_HM is not set
+# CONFIG_PKG_USING_SMALL_MODBUS is not set
+# CONFIG_PKG_USING_NET_SERVER is not set
+# CONFIG_PKG_USING_ZFTP is not set
+# CONFIG_PKG_USING_WOL is not set
+# CONFIG_PKG_USING_ZEPHYR_POLLING is not set
+# CONFIG_PKG_USING_MATTER_ADAPTATION_LAYER is not set
+# CONFIG_PKG_USING_LHC_MODBUS is not set
+# CONFIG_PKG_USING_QMODBUS is not set
+# CONFIG_PKG_USING_PNET is not set
+# CONFIG_PKG_USING_OPENER is not set
+# end of IoT - internet of things
+
+#
+# security packages
+#
+# CONFIG_PKG_USING_MBEDTLS is not set
+# CONFIG_PKG_USING_LIBSODIUM is not set
+# CONFIG_PKG_USING_LIBHYDROGEN is not set
+# CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
+# end of security packages
+
+#
+# language packages
+#
+
+#
+# JSON: JavaScript Object Notation, a lightweight data-interchange format
+#
+# CONFIG_PKG_USING_CJSON is not set
+# CONFIG_PKG_USING_LJSON is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PARSON is not set
+# CONFIG_PKG_USING_RYAN_JSON is not set
+# end of JSON: JavaScript Object Notation, a lightweight data-interchange format
+
+#
+# XML: Extensible Markup Language
+#
+# CONFIG_PKG_USING_SIMPLE_XML is not set
+# CONFIG_PKG_USING_EZXML is not set
+# end of XML: Extensible Markup Language
+
+# CONFIG_PKG_USING_LUATOS_SOC is not set
+# CONFIG_PKG_USING_LUA is not set
+# CONFIG_PKG_USING_JERRYSCRIPT is not set
+# CONFIG_PKG_USING_MICROPYTHON is not set
+# CONFIG_PKG_USING_PIKASCRIPT is not set
+# CONFIG_PKG_USING_RTT_RUST is not set
+# end of language packages
+
+#
+# multimedia packages
+#
+
+#
+# LVGL: powerful and easy-to-use embedded GUI library
+#
+# CONFIG_PKG_USING_LVGL is not set
+# CONFIG_PKG_USING_LV_MUSIC_DEMO is not set
+# CONFIG_PKG_USING_GUI_GUIDER_DEMO is not set
+# end of LVGL: powerful and easy-to-use embedded GUI library
+
+#
+# u8g2: a monochrome graphic library
+#
+# CONFIG_PKG_USING_U8G2_OFFICIAL is not set
+# CONFIG_PKG_USING_U8G2 is not set
+# end of u8g2: a monochrome graphic library
+
+# CONFIG_PKG_USING_OPENMV is not set
+# CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set
+# CONFIG_PKG_USING_UGUI is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_TERMBOX is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_QRCODE is not set
+# CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
+# CONFIG_PKG_USING_3GPP_AMRNB is not set
+# end of multimedia packages
+
+#
+# tools packages
+#
+# CONFIG_PKG_USING_CMBACKTRACE is not set
+# CONFIG_PKG_USING_EASYFLASH is not set
+# CONFIG_PKG_USING_EASYLOGGER is not set
+# CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
+# CONFIG_PKG_USING_RTT_AUTO_EXE_CMD is not set
+# CONFIG_PKG_USING_RDB is not set
+# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set
+# CONFIG_PKG_USING_FDT is not set
+# CONFIG_PKG_USING_CBOX is not set
+# CONFIG_PKG_USING_SNOWFLAKE is not set
+# CONFIG_PKG_USING_HASH_MATCH is not set
+# CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
+# CONFIG_PKG_USING_VOFA_PLUS is not set
+# CONFIG_PKG_USING_RT_TRACE is not set
+# CONFIG_PKG_USING_ZDEBUG is not set
+# CONFIG_PKG_USING_RVBACKTRACE is not set
+# CONFIG_PKG_USING_HPATCHLITE is not set
+# end of tools packages
+
+#
+# system packages
+#
+
+#
+# enhanced kernel services
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# end of enhanced kernel services
+
+# CONFIG_PKG_USING_AUNITY is not set
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+# end of acceleration: Assembly language or algorithmic acceleration packages
+
+#
+# CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
+#
+# CONFIG_PKG_USING_CMSIS_5 is not set
+CONFIG_PKG_USING_CMSIS_CORE=y
+CONFIG_PKG_CMSIS_CORE_PATH="/packages/system/CMSIS/CMSIS-Core"
+CONFIG_PKG_USING_CMSIS_CORE_LATEST_VERSION=y
+CONFIG_PKG_CMSIS_CORE_VER="latest"
+# CONFIG_PKG_USING_CMSIS_NN is not set
+# CONFIG_PKG_USING_CMSIS_RTOS1 is not set
+# CONFIG_PKG_USING_CMSIS_RTOS2 is not set
+# end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
+# end of Micrium: Micrium software products porting for RT-Thread
+
+# CONFIG_PKG_USING_FREERTOS_WRAPPER is not set
+# CONFIG_PKG_USING_LITEOS_SDK is not set
+# CONFIG_PKG_USING_TZ_DATABASE is not set
+# CONFIG_PKG_USING_CAIRO is not set
+# CONFIG_PKG_USING_PIXMAN is not set
+# CONFIG_PKG_USING_PARTITION is not set
+# CONFIG_PKG_USING_PERF_COUNTER is not set
+# CONFIG_PKG_USING_FILEX is not set
+# CONFIG_PKG_USING_LEVELX is not set
+# CONFIG_PKG_USING_FLASHDB is not set
+# CONFIG_PKG_USING_SQLITE is not set
+# CONFIG_PKG_USING_RTI is not set
+# CONFIG_PKG_USING_DFS_YAFFS is not set
+# CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RPMSG_LITE is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set
+# CONFIG_PKG_USING_ARM_2D is not set
+# CONFIG_PKG_USING_MCUBOOT is not set
+# CONFIG_PKG_USING_TINYUSB is not set
+# CONFIG_PKG_USING_KMULTI_RTIMER is not set
+# CONFIG_PKG_USING_TFDB is not set
+# CONFIG_PKG_USING_QPC is not set
+# CONFIG_PKG_USING_AGILE_UPGRADE is not set
+# CONFIG_PKG_USING_FLASH_BLOB is not set
+# CONFIG_PKG_USING_MLIBC is not set
+# CONFIG_PKG_USING_TASK_MSG_BUS is not set
+# CONFIG_PKG_USING_UART_FRAMEWORK is not set
+# CONFIG_PKG_USING_SFDB is not set
+# CONFIG_PKG_USING_RTP is not set
+# CONFIG_PKG_USING_REB is not set
+# CONFIG_PKG_USING_RMP is not set
+# CONFIG_PKG_USING_R_RHEALSTONE is not set
+# CONFIG_PKG_USING_HEARTBEAT is not set
+# end of system packages
+
+#
+# peripheral libraries and drivers
+#
+
+#
+# HAL & SDK Drivers
+#
+
+#
+# STM32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_STM32F0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F1_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F1_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F2_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F2_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F3_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F3_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32F7_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32F7_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32G0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32G0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32G4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32G4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32H7_CMSIS_DRIVER is not set
+CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER=y
+CONFIG_PKG_STM32H7RS_HAL_DRIVER_PATH="/packages/peripherals/hal-sdk/stm32/stm32h7rs_hal_driver"
+CONFIG_PKG_USING_STM32H7RS_HAL_DRIVER_LATEST_VERSION=y
+CONFIG_PKG_STM32H7RS_HAL_DRIVER_VER="latest"
+CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER=y
+CONFIG_PKG_STM32H7RS_CMSIS_DRIVER_PATH="/packages/peripherals/hal-sdk/stm32/stm32h7rs_cmsis_driver"
+CONFIG_PKG_USING_STM32H7RS_CMSIS_DRIVER_LATEST_VERSION=y
+CONFIG_PKG_STM32H7RS_CMSIS_DRIVER_VER="latest"
+# CONFIG_PKG_USING_STM32L0_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L0_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L4_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32L5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32L5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32U5_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32U5_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_STM32_SDIO is not set
+# CONFIG_PKG_USING_STM32WL_HAL_DRIVER is not set
+# CONFIG_PKG_USING_STM32WL_CMSIS_DRIVER is not set
+# end of STM32 HAL & SDK Drivers
+
+#
+# Infineon HAL Packages
+#
+# CONFIG_PKG_USING_INFINEON_CAT1CM0P is not set
+# CONFIG_PKG_USING_INFINEON_CMSIS is not set
+# CONFIG_PKG_USING_INFINEON_CORE_LIB is not set
+# CONFIG_PKG_USING_INFINEON_MTB_HAL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_MTB_PDL_CAT1 is not set
+# CONFIG_PKG_USING_INFINEON_RETARGET_IO is not set
+# CONFIG_PKG_USING_INFINEON_CAPSENSE is not set
+# CONFIG_PKG_USING_INFINEON_CSDIDAC is not set
+# CONFIG_PKG_USING_INFINEON_SERIAL_FLASH is not set
+# CONFIG_PKG_USING_INFINEON_USBDEV is not set
+# end of Infineon HAL Packages
+
+# CONFIG_PKG_USING_BLUETRUM_SDK is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_ESP_IDF is not set
+
+#
+# Kendryte SDK
+#
+# CONFIG_PKG_USING_K210_SDK is not set
+# CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# end of Kendryte SDK
+
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
+# CONFIG_PKG_USING_MM32 is not set
+
+#
+# WCH HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_CH32V20x_SDK is not set
+# CONFIG_PKG_USING_CH32V307_SDK is not set
+# end of WCH HAL & SDK Drivers
+
+#
+# AT32 HAL & SDK Drivers
+#
+# CONFIG_PKG_USING_AT32A403A_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32A403A_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32A423_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32A423_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F45x_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F45x_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F402_405_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F402_405_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F403A_407_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F403A_407_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F413_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F413_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F415_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F415_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F421_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F421_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F423_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F423_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F425_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F425_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32F435_437_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32F435_437_CMSIS_DRIVER is not set
+# CONFIG_PKG_USING_AT32M412_416_HAL_DRIVER is not set
+# CONFIG_PKG_USING_AT32M412_416_CMSIS_DRIVER is not set
+# end of AT32 HAL & SDK Drivers
+# end of HAL & SDK Drivers
+
+#
+# sensors drivers
+#
+# CONFIG_PKG_USING_LSM6DSM is not set
+# CONFIG_PKG_USING_LSM6DSL is not set
+# CONFIG_PKG_USING_LPS22HB is not set
+# CONFIG_PKG_USING_HTS221 is not set
+# CONFIG_PKG_USING_LSM303AGR is not set
+# CONFIG_PKG_USING_BME280 is not set
+# CONFIG_PKG_USING_BME680 is not set
+# CONFIG_PKG_USING_BMA400 is not set
+# CONFIG_PKG_USING_BMI160_BMX160 is not set
+# CONFIG_PKG_USING_SPL0601 is not set
+# CONFIG_PKG_USING_MS5805 is not set
+# CONFIG_PKG_USING_DA270 is not set
+# CONFIG_PKG_USING_DF220 is not set
+# CONFIG_PKG_USING_HSHCAL001 is not set
+# CONFIG_PKG_USING_BH1750 is not set
+# CONFIG_PKG_USING_MPU6XXX is not set
+# CONFIG_PKG_USING_AHT10 is not set
+# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_TSL4531 is not set
+# CONFIG_PKG_USING_DS18B20 is not set
+# CONFIG_PKG_USING_DHT11 is not set
+# CONFIG_PKG_USING_DHTXX is not set
+# CONFIG_PKG_USING_GY271 is not set
+# CONFIG_PKG_USING_GP2Y10 is not set
+# CONFIG_PKG_USING_SGP30 is not set
+# CONFIG_PKG_USING_HDC1000 is not set
+# CONFIG_PKG_USING_BMP180 is not set
+# CONFIG_PKG_USING_BMP280 is not set
+# CONFIG_PKG_USING_SHTC1 is not set
+# CONFIG_PKG_USING_BMI088 is not set
+# CONFIG_PKG_USING_HMC5883 is not set
+# CONFIG_PKG_USING_MAX6675 is not set
+# CONFIG_PKG_USING_MAX31855 is not set
+# CONFIG_PKG_USING_TMP1075 is not set
+# CONFIG_PKG_USING_SR04 is not set
+# CONFIG_PKG_USING_CCS811 is not set
+# CONFIG_PKG_USING_PMSXX is not set
+# CONFIG_PKG_USING_RT3020 is not set
+# CONFIG_PKG_USING_MLX90632 is not set
+# CONFIG_PKG_USING_MLX90382 is not set
+# CONFIG_PKG_USING_MLX90393 is not set
+# CONFIG_PKG_USING_MLX90392 is not set
+# CONFIG_PKG_USING_MLX90394 is not set
+# CONFIG_PKG_USING_MLX90397 is not set
+# CONFIG_PKG_USING_MS5611 is not set
+# CONFIG_PKG_USING_MAX31865 is not set
+# CONFIG_PKG_USING_VL53L0X is not set
+# CONFIG_PKG_USING_INA260 is not set
+# CONFIG_PKG_USING_MAX30102 is not set
+# CONFIG_PKG_USING_INA226 is not set
+# CONFIG_PKG_USING_LIS2DH12 is not set
+# CONFIG_PKG_USING_HS300X is not set
+# CONFIG_PKG_USING_ZMOD4410 is not set
+# CONFIG_PKG_USING_ISL29035 is not set
+# CONFIG_PKG_USING_MMC3680KJ is not set
+# CONFIG_PKG_USING_QMP6989 is not set
+# CONFIG_PKG_USING_BALANCE is not set
+# CONFIG_PKG_USING_SHT2X is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_SHT4X is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_ADT74XX is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_AS7341 is not set
+# CONFIG_PKG_USING_CW2015 is not set
+# CONFIG_PKG_USING_ICM20608 is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_STHS34PF80 is not set
+# CONFIG_PKG_USING_P3T1755 is not set
+# end of sensors drivers
+
+#
+# touch drivers
+#
+# CONFIG_PKG_USING_GT9147 is not set
+# CONFIG_PKG_USING_GT1151 is not set
+# CONFIG_PKG_USING_GT917S is not set
+# CONFIG_PKG_USING_GT911 is not set
+# CONFIG_PKG_USING_FT6206 is not set
+# CONFIG_PKG_USING_FT5426 is not set
+# CONFIG_PKG_USING_FT6236 is not set
+# CONFIG_PKG_USING_XPT2046_TOUCH is not set
+# CONFIG_PKG_USING_CST816X is not set
+# CONFIG_PKG_USING_CST812T is not set
+# end of touch drivers
+
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
+# CONFIG_PKG_USING_BUTTON is not set
+# CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_MULTI_INFRARED is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_ILI9341 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_RS232 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set
+# CONFIG_PKG_USING_MCP23008 is not set
+# CONFIG_PKG_USING_MISAKA_AT24CXX is not set
+# CONFIG_PKG_USING_MISAKA_RGB_BLING is not set
+# CONFIG_PKG_USING_LORA_MODEM_DRIVER is not set
+# CONFIG_PKG_USING_SOFT_SERIAL is not set
+# CONFIG_PKG_USING_MB85RS16 is not set
+# CONFIG_PKG_USING_RFM300 is not set
+# CONFIG_PKG_USING_IO_INPUT_FILTER is not set
+# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
+# CONFIG_PKG_USING_AIP650 is not set
+# CONFIG_PKG_USING_FINGERPRINT is not set
+# CONFIG_PKG_USING_BT_ECB02C is not set
+# CONFIG_PKG_USING_UAT is not set
+# CONFIG_PKG_USING_ST7789 is not set
+# CONFIG_PKG_USING_VS1003 is not set
+# CONFIG_PKG_USING_X9555 is not set
+# CONFIG_PKG_USING_SYSTEM_RUN_LED is not set
+# CONFIG_PKG_USING_BT_MX01 is not set
+# CONFIG_PKG_USING_RGPOWER is not set
+# CONFIG_PKG_USING_BT_MX02 is not set
+# CONFIG_PKG_USING_GC9A01 is not set
+# CONFIG_PKG_USING_IK485 is not set
+# CONFIG_PKG_USING_SERVO is not set
+# CONFIG_PKG_USING_SPI_TOOLS is not set
+# end of peripheral libraries and drivers
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
+# CONFIG_PKG_USING_R_TINYMAIX is not set
+# CONFIG_PKG_USING_LLMCHAT is not set
+# end of AI packages
+
+#
+# Signal Processing and Control Algorithm Packages
+#
+# CONFIG_PKG_USING_APID is not set
+# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
+# CONFIG_PKG_USING_QPID is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_KISSFFT is not set
+# CONFIG_PKG_USING_CMSIS_DSP is not set
+# end of Signal Processing and Control Algorithm Packages
+
+#
+# miscellaneous packages
+#
+
+#
+# project laboratory
+#
+# end of project laboratory
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# end of samples: kernel and components samples
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_CMATRIX is not set
+# CONFIG_PKG_USING_SL is not set
+# CONFIG_PKG_USING_CAL is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
+# CONFIG_PKG_USING_COWSAY is not set
+# CONFIG_PKG_USING_MORSE is not set
+# CONFIG_PKG_USING_TINYSQUARE is not set
+# end of entertainment: terminal games and other interesting software packages
+
+# CONFIG_PKG_USING_LIBCSV is not set
+# CONFIG_PKG_USING_OPTPARSE is not set
+# CONFIG_PKG_USING_FASTLZ is not set
+# CONFIG_PKG_USING_MINILZO is not set
+# CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
+# CONFIG_PKG_USING_RALARAM is not set
+# CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
+# CONFIG_PKG_USING_CANFESTIVAL is not set
+# CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
+# CONFIG_PKG_USING_HEATSHRINK is not set
+# CONFIG_PKG_USING_DSTR is not set
+# CONFIG_PKG_USING_TINYFRAME is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
+# CONFIG_PKG_USING_HELLO is not set
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_LIBCRC is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_DESIGN_PATTERN is not set
+# CONFIG_PKG_USING_CONTROLLER is not set
+# CONFIG_PKG_USING_PHASE_LOCKED_LOOP is not set
+# CONFIG_PKG_USING_MFBD is not set
+# CONFIG_PKG_USING_SLCAN2RTT is not set
+# CONFIG_PKG_USING_SOEM is not set
+# CONFIG_PKG_USING_QPARAM is not set
+# CONFIG_PKG_USING_CorevMCU_CLI is not set
+# CONFIG_PKG_USING_GET_IRQ_PRIORITY is not set
+# CONFIG_PKG_USING_DRMP is not set
+# end of miscellaneous packages
+
+#
+# Arduino libraries
+#
+# CONFIG_PKG_USING_RTDUINO is not set
+
+#
+# Projects and Demos
+#
+# CONFIG_PKG_USING_ARDUINO_MSGQ_C_CPP_DEMO is not set
+# CONFIG_PKG_USING_ARDUINO_SKETCH_LOADER_DEMO is not set
+# CONFIG_PKG_USING_ARDUINO_ULTRASOUND_RADAR is not set
+# CONFIG_PKG_USING_ARDUINO_RTDUINO_SENSORFUSION_SHIELD is not set
+# CONFIG_PKG_USING_ARDUINO_NINEINONE_SENSOR_SHIELD is not set
+# CONFIG_PKG_USING_ARDUINO_SENSOR_KIT is not set
+# CONFIG_PKG_USING_ARDUINO_MATLAB_SUPPORT is not set
+# end of Projects and Demos
+
+#
+# Sensors
+#
+# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L1X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL6180X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31855 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31856 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX6675 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90614 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS1 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AHTX0 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM9DS0 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP280 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADT7410 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME680 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9808 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4728 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA219 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR390 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL345 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DHT is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP9600 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM6DS is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO055 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX1704X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMC56X3 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90393 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90395 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ICM20X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DPS310 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTS221 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT4X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHT31 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL343 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BME280 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS726X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AMG88XX is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2320 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AM2315 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LTR329_LTR303 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP085_UNIFIED is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP183_UNIFIED is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BMP3XX is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MS8607 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3MDL is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MLX90640 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MMA8451 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MSA301 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL115A2 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BNO08X_RVC is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS2MDL is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303DLH_MAG is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LC709203F is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CAP1188 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_CCS811 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_NAU7802 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS331 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS2X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LPS35HW is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LSM303_ACCEL is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_LIS3DH is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8591 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPL3115A2 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPR121 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPRLS is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MPU6050 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCT2075 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PM25AQI is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_EMC2101 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXAS21002C is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SCD30 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_FXOS8700 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HMC5883_UNIFIED is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP30 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP006 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TLA202X is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCS34725 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI7021 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI1145 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SGP40 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SHTC3 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HDC1000 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP117 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSC2007 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2561 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TSL2591_LIBRARY is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VCNL4040 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_ITG3200 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MP503 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
+# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_JARZEBSKI_MPU6050 is not set
+# end of Sensors
+
+#
+# Display
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_GFX_LIBRARY is not set
+# CONFIG_PKG_USING_ARDUINO_U8G2 is not set
+# CONFIG_PKG_USING_ARDUINO_TFT_ESPI is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ST7735 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SSD1306 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ILI9341 is not set
+# CONFIG_PKG_USING_SEEED_TM1637 is not set
+# end of Display
+
+#
+# Timing
+#
+# CONFIG_PKG_USING_ARDUINO_RTCLIB is not set
+# CONFIG_PKG_USING_ARDUINO_MSTIMER2 is not set
+# CONFIG_PKG_USING_ARDUINO_TICKER is not set
+# CONFIG_PKG_USING_ARDUINO_TASKSCHEDULER is not set
+# end of Timing
+
+#
+# Data Processing
+#
+# CONFIG_PKG_USING_ARDUINO_KALMANFILTER is not set
+# CONFIG_PKG_USING_ARDUINO_ARDUINOJSON is not set
+# CONFIG_PKG_USING_ARDUINO_TENSORFLOW_LITE_MICRO is not set
+# CONFIG_PKG_USING_ARDUINO_RUNNINGMEDIAN is not set
+# end of Data Processing
+
+#
+# Data Storage
+#
+
+#
+# Communication
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PN532 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI4713 is not set
+# end of Communication
+
+#
+# Device Control
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TPA2016 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DRV2605 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS1841 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_DS3502 is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
+# end of Device Control
+
+#
+# Other
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MFRC630 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SI5351 is not set
+# end of Other
+
+#
+# Signal IO
+#
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BUSIO is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TCA8418 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP23017 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADS1X15 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AW9523 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP3008 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MCP4725 is not set
+# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_BD3491FS is not set
+# end of Signal IO
+
+#
+# Uncategorized
+#
+# end of Arduino libraries
+# end of RT-Thread online packages
+
+CONFIG_SOC_FAMILY_STM32=y
+
+#
+# Hardware Drivers Config
+#
+
+#
+# Onboard Peripheral Drivers
+#
+CONFIG_BSP_USING_USB_TO_USART=y
+# CONFIG_BSP_USING_FS is not set
+# end of Onboard Peripheral Drivers
+
+#
+# On-chip Peripheral Drivers
+#
+CONFIG_BSP_USING_GPIO=y
+CONFIG_BSP_USING_UART=y
+CONFIG_BSP_STM32_UART_V1_TX_TIMEOUT=6000
+# CONFIG_BSP_USING_UART1 is not set
+# CONFIG_BSP_USING_UART3 is not set
+CONFIG_BSP_USING_UART4=y
+# CONFIG_BSP_UART4_RX_USING_DMA is not set
+# CONFIG_BSP_UART4_TX_USING_DMA is not set
+CONFIG_BSP_UART4_RX_BUFSIZE=256
+CONFIG_BSP_UART4_TX_BUFSIZE=0
+# CONFIG_BSP_USING_UART6 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_ONCHIP_RTC is not set
+# CONFIG_BSP_USING_I2C is not set
+# CONFIG_BSP_USING_USBD is not set
+# CONFIG_BSP_USING_USBH is not set
+# CONFIG_BSP_USING_UDID is not set
+# end of On-chip Peripheral Drivers
+# end of Hardware Drivers Config

bsp/stm32/stm32h7r7-artpi2/.gitignore

@@ -0,0 +1,43 @@
+*.pyc
+*.map
+*.dblite
+*.elf
+*.bin
+*.hex
+*.axf
+*.exe
+*.pdb
+*.idb
+*.ilk
+*.old
+build
+Debug
+documentation/html
+packages/
+*~
+*.o
+*.obj
+*.out
+*.bak
+*.dep
+*.lib
+*.i
+*.d
+.DS_Stor*
+.config 3
+.config 4
+.config 5
+Midea-X1
+*.uimg
+GPATH
+GRTAGS
+GTAGS
+.vscode
+JLinkLog.txt
+JLinkSettings.ini
+DebugConfig/
+RTE/
+settings/
+*.uvguix*
+cconfig.h
+.xmake

bsp/stm32/stm32h7r7-artpi2/Kconfig

@@ -0,0 +1,29 @@
+mainmenu "RT-Thread Configuration"
+
+BSP_DIR := .
+
+RTT_DIR := ../../..
+
+PKGS_DIR := packages
+
+config SOC_STM32H7RS
+    bool
+    select SOC_SERIES_STM32H7RS
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    select RT_USING_CACHE
+    default y
+
+config SOC_SERIES_STM32H7RS
+    bool
+    select ARCH_ARM_CORTEX_M7
+    select SOC_FAMILY_STM32
+    default y
+
+source "$(RTT_DIR)/Kconfig"
+osource "$PKGS_DIR/Kconfig"
+rsource "../libraries/Kconfig"
+
+if !RT_USING_NANO
+rsource "board/Kconfig"
+endif

bsp/stm32/stm32h7r7-artpi2/README.md

@@ -0,0 +1,135 @@
+## 简介
+
+中文页 | [English Page](README.md)
+
+sdk-bsp-stm32h7r-realthread-artpi2 是 RT-Thread 团队对 ART-Pi 开发板所作的支持包，也可作为用户开发使用的软件SDK，让用户可以更简单方便的开发自己的应用程序。
+
+ART-Pi2 是 RT-Thread 团队专门为嵌入式软件工程师、开源创客设计的一款极具扩展功能的 DIY 开源硬件。
+
+<img src="figures/board_large.png" alt="image-20201009181905422" style="zoom:50%;" />
+
+## 目录结构
+
+```
+$ sdk-bsp-stm32h7r-realthread-artpi2
+├── README.md
+├── RealThread_STM32H7R-ART-Pi2.yaml
+├── debug
+├── documents
+│   ├── coding_style_cn.md
+│   ├── RT-Thread 编程指南.pdf
+│   ├── board
+│   └── figures
+├── libraries
+│   ├── STM32H7RSxx_HAL_Driver
+│   ├── drivers
+│   └── touchgfx_lib
+├── projects
+│   ├── art_pi_blink_led
+│   ├── art_pi_bootloader
+│   ├── art_pi2_lvgl_demo
+│   ├── art_pi2_touchgfx
+│   ├── art_pi2_sdcard
+│   └── art_pi_wifi
+├── rt-thread
+└── tools
+```
+
+- RealThread_STMH7R-ART-Pi.yaml
+    描述 ART-Pi 的硬件信息
+- documents
+    图纸，文档，图片以及 datasheets 等
+- libraries
+    STM32H7 固件库，通用外设驱动，touchgfx 库等
+- projects
+    示例工程文件夹，包含出厂程序，网关程序等
+- rt-thread
+    rt-thread 源码
+- tools
+    wifi 固件，MDK下载算法等
+
+## 使用说明
+
+sdk-bsp-stm32h7r-realthread-artpi 支持 MDK 开发和 RT-Thread Studio 开发；
+
+### STM32CubeProg 软件
+
+下载最新版本的软件：[STM32CubeProg - 意法半导体](https://www.st.com.cn/zh/development-tools/stm32cubeprog.html#get-software)
+
+### RT-Thread Studio 开发
+
+1. 请下载 v2.2.9 版本 Studio：[下载地址](https://download-redirect.rt-thread.org/download/studio/RT-Thread_Studio_2.2.9-setup-x86_64_202412161335.exe)；
+
+2. 拷贝 [org.rt-thread.studio.common.core_1.0.128.jar](tools/studio/) 文件，替换上面安装的 Studio 目录下 `plugins` 文件夹内的同名文件即可；
+
+（上面步骤会在下一个Studio版本修复）
+
+3. 打开 RT-Thread Studio 的包管理器，安装 ART-Pi2 SDK 资源包；
+
+<img src="figures/sdk_manager.png" alt="sdk_manager" style="zoom: 67%;" />
+
+4. 安装完成后，选择 `文件→新建→RT-Thread 项目→基于开发板` 选择 ART-Pi2 开发板即可；
+
+<img src="figures/create_proj.png" alt="sdk_manager" style="zoom: 67%;" />
+
+### MDK 开发
+
+1. 安装较新版本MDK：[MDK-ARM Version 5.41 Product Update](https://www.keil.com/update/sw/mdk/5.41)；
+
+2. 安装STM32H7R-MDK芯片pack包：[Keil.STM32H7RSxx_DFP.1.0.0.pack](./tools/mdk_pack/Keil.STM32H7RSxx_DFP.1.0.0.pack)；
+
+3. 将  `tools\download_algorithm\flm\ART-Pi2_winbond_64MB.FLM` 下载算法拷贝到 `MDK安装目录\Core\ARM\Flash` 下 ；
+
+为了避免 SDK 在持续更新中，每一个 `projects` 都创建一份 `rt-thread` 文件夹 和 `libraries` 文件夹导致的 SDK 越来越臃肿，所以这些通用文件夹被单独提取了出来。这样就会导致直接打开 `MDK` 的工程编译会提示缺少上述两个文件夹的文件，我们有两个方法来解决这个问题：
+
+**方法一：**
+
+1. 双击 `project` 目录下的 `mklinks.bat` 文件，如 `sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led` 目录下的 `mklinks.bat`
+
+2. 查看 `sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led` 目录下是否有 `rt-thread` 和 `libraries` 的文件夹图标
+3. 使用 [ENV-2.0](https://club.rt-thread.org/ask/article/af8952fcf0ca464b.html) 工具执行 scons --target=mdk5 更新 MDK5 工程文件
+
+**方法二**
+
+1. 在 [ART-Pi SDK仓库](https://github.com/RT-Thread-Studio/sdk-bsp-stm32h7r-realthread-artpi2) 下载 SDK
+
+2. 进入工程目录。如：sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led
+
+3. 使用 [ENV-2.0](https://club.rt-thread.org/ask/article/af8952fcf0ca464b.html) 工具执行 mklink 命令，分别为 `rt-thread` 及 `libraries` 文件创建符号链接
+
+    ```
+    E:\project\sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led>mklink /D rt-thread ..\..\rt-thread
+    symbolic link created for rt-thread <<===>> ..\..\rt-thread
+    
+    E:\project\sdk-bsp-stm32h7r-realthread-artpi2\projects>mklink /D libraries ..\..\libraries
+    symbolic link created for libraries <<===>> ..\..\libraries
+    
+    E:\project\sdk-bsp-stm32h7r-realthread-artpi2\projects>
+    ```
+
+4. 使用 [ENV-2.0](https://club.rt-thread.org/ask/article/af8952fcf0ca464b.html) 工具执行 scons --target=mdk5 更新 MDK5 工程文件
+
+
+## ART-Pi 交流平台
+
+ART-Pi  是一个开源创意硬件平台，期待有更多的小伙伴能一起发现更多的乐趣，在使用过程中若您有任何的想法和建议，建议您通过以下方式来联系到我们。
+
+RT-Thread [社区论坛](https://club.rt-thread.org)。
+
+ART-Pi 官方交流 QQ 群(1016035998)。
+
+![qq_group](figures/qq_group.png)
+
+## 贡献代码
+
+如果您对 ART-Pi 感兴趣，并有一些好玩的项目愿意与大家分享，欢迎给我们贡献代码，您可以参考 [ART-Pi 代码贡献手册](https://github.com/RT-Thread-Studio/sdk-bsp-stm32h7r-realthread-artpi/blob/master/documents/UM5004-RT-Thread%20ART-Pi%20%E4%BB%A3%E7%A0%81%E8%B4%A1%E7%8C%AE%E6%89%8B%E5%86%8C.md) 。
+
+## 参与项目
+
+可以参与哪些项目：
+
+- 维护现有 SDK 仓库代码
+- 提交工程代码可以合并到 SDK 仓库
+- 提交展示工程，代码无法合并到 SDK 仓库，但是代码开源在其他地方
+- 提交扩展板
+- 撰写专栏文章

bsp/stm32/stm32h7r7-artpi2/README_en.md

@@ -0,0 +1,116 @@
+## Introduction
+
+[中文页](README_ZH.md) | English Page
+
+The **sdk-bsp-stm32h7r-realthread-artpi2** is a support package developed by the RT-Thread team for the ART-Pi development board. It also serves as a software SDK for users to develop their applications more easily and conveniently.
+
+The **ART-Pi2** is an open-source hardware platform designed by the RT-Thread team specifically for embedded software engineers and open-source makers, offering extensive expandability for DIY projects.
+
+<img src="figures/board_large.png" alt="image-20201009181905422" style="zoom:50%;" />
+
+## Directory Structure
+
+```
+$ sdk-bsp-stm32h7r-realthread-artpi2
+├── README.md
+├── RealThread_STM32H7R-ART-Pi2.yaml
+├── debug
+├── documents
+│ ├── coding_style_cn.md
+│ ├── RT-Thread Programming Guide.pdf
+│ ├── board
+│ └── figures
+├── libraries
+│ ├── STM32H7RSxx_HAL_Driver
+│ ├── drivers
+│ └── touchgfx_lib
+├── projects
+│ ├── art_pi_blink_led
+│ ├── art_pi_bootloader
+│ ├── art_pi2_lvgl_demo
+│ ├── art_pi2_touchgfx
+│ ├── art_pi2_sdcard
+│ └── art_pi_wifi
+├── rt-thread
+└── tools
+```
+
+- **RealThread_STMH7R-ART-Pi.yaml**: Describes the hardware information of ART-Pi.
+- **documents**: Contains schematics, documents, images, and datasheets.
+- **libraries**: Includes STM32H7 firmware libraries, general peripheral drivers, and TouchGFX libraries.
+- **projects**: Example project folders, including factory programs, gateway programs, etc.
+- **rt-thread**: RT-Thread source code.
+- **tools**: Contains Wi-Fi firmware, MDK download algorithms, etc.
+
+## Usage Instructions
+
+sdk-bsp-stm32h7r-realthread-artpi supports MDK development and RT-Thread Studio development.
+
+### STM32CubeProg Software
+
+Download the latest version of the software: [STM32CubeProg - STMicroelectronics](https://www.st.com.cn/zh/development-tools/stm32cubeprog.html#get-software).
+
+### RT-Thread Studio Development
+
+1. Download Studio version v2.2.9: [Download Link](https://download-redirect.rt-thread.org/download/studio/RT-Thread_Studio_2.2.9-setup-x86_64_202412161335.exe).
+2. Copy the [org.rt-thread.studio.common.core_1.0.128.jar](tools/studio/) file and replace the file with the same name in the `plugins` folder of the installed Studio directory.
+    (This step will be fixed in the next Studio version.)
+3. Open the RT-Thread Studio package manager and install the ART-Pi2 SDK resource package.
+    <img src="figures/sdk_manager.png" alt="sdk_manager" style="zoom: 67%;" />
+4. After installation, select `File → New → RT-Thread Project → Based on Development Board` and choose the ART-Pi2 development board.
+    <img src="figures/create_proj.png" alt="sdk_manager" style="zoom: 67%;" />
+
+### MDK Development
+
+1. Install the latest version of MDK: [MDK-ARM Version 5.41 Product Update](https://www.keil.com/update/sw/mdk/5.41).
+2. Install the STM32H7R-MDK chip pack: [Keil.STM32H7RSxx_DFP.1.0.0.pack](./tools/mdk_pack/Keil.STM32H7RSxx_DFP.1.0.0.pack).
+3. Copy the `tools\download_algorithm\flm\ART-Pi2_winbond_64MB.FLM` download algorithm to the `MDK Installation Directory\Core\ARM\Flash` folder.
+
+To avoid the SDK becoming bloated due to continuous updates, where each `projects` folder creates a copy of the `rt-thread` and `libraries` folders, these common folders have been extracted separately. This may cause compilation errors in MDK projects due to missing files from these folders. There are two methods to resolve this issue:
+
+**Method 1:**
+
+1. Double-click the `mklinks.bat` file in the `project` directory, such as the one in `sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led`.
+2. Check if the `rt-thread` and `libraries` folder icons appear in the `sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led` directory.
+3. Use the [ENV-2.0](https://club.rt-thread.org/ask/article/af8952fcf0ca464b.html) tool to execute `scons --target=mdk5` to update the MDK5 project files.
+
+**Method 2:**
+
+1. Download the SDK from the [ART-Pi SDK Repository](https://github.com/RT-Thread-Studio/sdk-bsp-stm32h7r-realthread-artpi2).
+2. Navigate to the project directory, e.g., `sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led`.
+3. Use the [ENV-2.0](https://club.rt-thread.org/ask/article/af8952fcf0ca464b.html) tool to execute the `mklink` command to create symbolic links for the `rt-thread` and `libraries` folders.
+
+```shell
+E:\project\sdk-bsp-stm32h7r-realthread-artpi2\projects\art_pi2_blink_led>mklink /D rt-thread ....\rt-thread
+symbolic link created for rt-thread <<===>> ....\rt-thread
+
+E:\project\sdk-bsp-stm32h7r-realthread-artpi2\projects>mklink /D libraries ....\libraries
+symbolic link created for libraries <<===>> ....\libraries
+
+E:\project\sdk-bsp-stm32h7r-realthread-artpi2\projects>
+```
+
+Use the [ENV-2.0](https://club.rt-thread.org/ask/article/af8952fcf0ca464b.html) tool to execute `scons --target=mdk5` to update the MDK5 project files.
+
+## ART-Pi Communication Platform
+
+ART-Pi is an open-source creative hardware platform. We look forward to more enthusiasts discovering its potential. If you have any ideas or suggestions during use, please contact us through the following channels:
+
+- RT-Thread [Community Forum](https://club.rt-thread.org).
+- ART-Pi Official QQ Group (1016035998).
+
+![qq_group](figures/qq_group.png)
+
+## Contributing Code
+
+If you are interested in ART-Pi and have some fun projects you'd like to share with everyone, we welcome your code contributions. You can refer to the [ART-Pi Code Contribution Guide](https://github.com/RT-Thread-Studio/sdk-bsp-stm32h7r-realthread-artpi/blob/master/documents/UM5004-RT-Thread%20ART-Pi%20%E4%BB%A3%E7%A0%81%E8%B4%A1%E7%8C%AE%E6%89%8B%E5%86%8C.md).
+
+## Participating in Projects
+
+Here are some ways you can participate:
+
+- Maintain existing SDK repository code.
+- Submit project code that can be merged into the SDK repository.
+- Submit showcase projects whose code cannot be merged into the SDK repository but are open-sourced elsewhere.
+- Submit expansion boards.
+- Write column articles.

bsp/stm32/stm32h7r7-artpi2/SConscript

@@ -0,0 +1,18 @@
+# for module compiling
+import os
+Import('RTT_ROOT')
+Import('env')
+from building import *
+
+cwd = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+env.Append(CPPDEFINES = ['STM32H7S7xx'])
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/stm32/stm32h7r7-artpi2/SConstruct

@@ -0,0 +1,73 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+try:
+    from building import *
+except:
+    print('Cannot found RT-Thread root directory, please check RTT_ROOT')
+    print(RTT_ROOT)
+    exit(-1)
+
+def bsp_pkg_check():
+    import subprocess
+
+    check_paths = [
+        os.path.join("packages", "CMSIS-Core-latest"),
+        os.path.join("packages", "stm32h7rs_cmsis_driver-latest"),
+        os.path.join("packages", "stm32h7rs_hal_driver-latest")
+    ]
+
+    need_update = not all(os.path.exists(p) for p in check_paths)
+
+    if need_update:
+        print("\n==============================================================")
+        print("Dependency packages missing, please running 'pkgs --update'...")
+        print("==============================================================")
+        exit(1)
+
+RegisterPreBuildingAction(bsp_pkg_check)
+
+TARGET = 'rt-thread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+
+if rtconfig.PLATFORM in ['iccarm']:
+    env.Replace(CCCOM = ['$CC $CFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
+    env.Replace(ARFLAGS = [''])
+    env.Replace(LINKCOM = env["LINKCOM"] + ' --map rt-thread.map')
+
+Export('env')
+Export('RTT_ROOT')
+Export('rtconfig')
+
+SDK_ROOT = os.path.abspath('./')
+
+if os.path.exists(SDK_ROOT + '/libraries'):
+    libraries_path_prefix = SDK_ROOT + '/libraries'
+else:
+    libraries_path_prefix = os.path.dirname(SDK_ROOT) + '/libraries'
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
+
+rtconfig.BSP_LIBRARY_TYPE = None
+
+# include drivers
+objs.extend(SConscript(os.path.join(libraries_path_prefix, 'HAL_Drivers', 'SConscript'),variant_dir='build/libraries/HAL_Drivers', duplicate=0))
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/stm32/stm32h7r7-artpi2/applications/SConscript

@@ -0,0 +1,16 @@
+import rtconfig
+from building import *
+import os
+
+cwd  = GetCurrentDir()
+path = [cwd]
+src  = Glob('*.c')
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = path)
+
+list = os.listdir(cwd)
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        group = group + SConscript(os.path.join(item, 'SConscript'))
+
+Return('group')

bsp/stm32/stm32h7r7-artpi2/applications/main.c

@@ -0,0 +1,35 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-17     supperthomas first version
+ */
+
+#include "drivers/dev_pin.h"
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <board.h>
+
+/* defined the LED0 pin: PO1 */
+#define LED_RED_PIN 	GET_PIN(O, 1)
+#define LED_BLUE_PIN 	GET_PIN(O, 5)
+
+int main(void)
+{
+    rt_pin_mode(LED_RED_PIN, PIN_MODE_OUTPUT);
+    rt_pin_mode(LED_BLUE_PIN, PIN_MODE_OUTPUT);
+
+    rt_pin_write(LED_BLUE_PIN, PIN_HIGH);
+
+    while(1)
+    {
+        rt_thread_mdelay(500);
+        rt_pin_write(LED_RED_PIN, PIN_HIGH);
+        rt_thread_mdelay(500);
+        rt_pin_write(LED_RED_PIN, PIN_LOW);
+    }
+    return RT_EOK;
+}

bsp/stm32/stm32h7r7-artpi2/board/.ignore_format.yml

@@ -0,0 +1,6 @@
+# files format check exclude path, please follow the instructions below to modify;
+# If you need to exclude an entire folder, add the folder path in dir_path;
+# If you need to exclude a file, add the path to the file in file_path.
+
+dir_path:
+- CubeMX_Config

bsp/stm32/stm32h7r7-artpi2/board/CubeMX_Config/Appli/Core/Inc/main.h

@@ -0,0 +1,71 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file           : main.h
+  * @brief          : Header for main.c file.
+  *                   This file contains the common defines of the application.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef __MAIN_H
+#define __MAIN_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+#include "stm32h7rsxx_hal.h"
+
+/* Private includes ----------------------------------------------------------*/
+/* USER CODE BEGIN Includes */
+
+/* USER CODE END Includes */
+
+/* Exported types ------------------------------------------------------------*/
+/* USER CODE BEGIN ET */
+
+/* USER CODE END ET */
+
+/* Exported constants --------------------------------------------------------*/
+/* USER CODE BEGIN EC */
+
+/* USER CODE END EC */
+
+/* Exported macro ------------------------------------------------------------*/
+/* USER CODE BEGIN EM */
+
+/* USER CODE END EM */
+
+/* Exported functions prototypes ---------------------------------------------*/
+void Error_Handler(void);
+
+/* USER CODE BEGIN EFP */
+
+/* USER CODE END EFP */
+
+/* Private defines -----------------------------------------------------------*/
+#define PIN_HW_VER_ADC_Pin GPIO_PIN_3
+#define PIN_HW_VER_ADC_GPIO_Port GPIOA
+
+/* USER CODE BEGIN Private defines */
+
+/* USER CODE END Private defines */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __MAIN_H */

bsp/stm32/stm32h7r7-artpi2/board/CubeMX_Config/Appli/Core/Inc/stm32h7rsxx_hal_conf.h

@@ -0,0 +1,520 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file    stm32h7rsxx_hal_conf.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32h7rsxx_hal_conf.h.
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2022 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32H7RSxx_HAL_CONF_H
+#define STM32H7RSxx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/* #define HAL_ADC_MODULE_ENABLED   */
+/* #define HAL_CEC_MODULE_ENABLED   */
+/* #define HAL_CORDIC_MODULE_ENABLED   */
+/* #define HAL_CRC_MODULE_ENABLED   */
+/* #define HAL_CRYP_MODULE_ENABLED   */
+#define HAL_DCMIPP_MODULE_ENABLED
+/* #define HAL_DMA2D_MODULE_ENABLED   */
+/* #define HAL_DTS_MODULE_ENABLED   */
+/* #define HAL_ETH_MODULE_ENABLED   */
+/* #define HAL_FDCAN_MODULE_ENABLED   */
+/* #define HAL_GFXMMU_MODULE_ENABLED   */
+/* #define HAL_GFXTIM_MODULE_ENABLED   */
+/* #define HAL_GPU2D_MODULE_ENABLED   */
+/* #define HAL_HASH_MODULE_ENABLED   */
+/* #define HAL_HCD_MODULE_ENABLED   */
+#define HAL_I2C_MODULE_ENABLED
+/* #define HAL_I2S_MODULE_ENABLED   */
+/* #define HAL_I3C_MODULE_ENABLED   */
+/* #define HAL_ICACHE_MODULE_ENABLED   */
+/* #define HAL_IRDA_MODULE_ENABLED   */
+/* #define HAL_IWDG_MODULE_ENABLED   */
+/* #define HAL_JPEG_MODULE_ENABLED   */
+/* #define HAL_LPTIM_MODULE_ENABLED   */
+#define HAL_LTDC_MODULE_ENABLED
+/* #define HAL_MCE_MODULE_ENABLED   */
+/* #define HAL_MDF_MODULE_ENABLED   */
+#define HAL_MMC_MODULE_ENABLED
+/* #define HAL_NAND_MODULE_ENABLED   */
+/* #define HAL_NOR_MODULE_ENABLED   */
+#define HAL_PCD_MODULE_ENABLED
+/* #define HAL_PKA_MODULE_ENABLED   */
+/* #define HAL_PSSI_MODULE_ENABLED   */
+/* #define HAL_RAMECC_MODULE_ENABLED   */
+/* #define HAL_RCC_MODULE_ENABLED   */
+/* #define HAL_RNG_MODULE_ENABLED   */
+/* #define HAL_RTC_MODULE_ENABLED   */
+#define HAL_SAI_MODULE_ENABLED
+#define HAL_SD_MODULE_ENABLED
+/* #define HAL_SDIO_MODULE_ENABLED   */
+/* #define HAL_SDRAM_MODULE_ENABLED   */
+/* #define HAL_SMARTCARD_MODULE_ENABLED   */
+/* #define HAL_SMBUS_MODULE_ENABLED   */
+/* #define HAL_SPDIFRX_MODULE_ENABLED   */
+#define HAL_SPI_MODULE_ENABLED
+/* #define HAL_SRAM_MODULE_ENABLED   */
+/* #define HAL_TIM_MODULE_ENABLED   */
+#define HAL_UART_MODULE_ENABLED
+/* #define HAL_USART_MODULE_ENABLED   */
+/* #define HAL_WWDG_MODULE_ENABLED   */
+/* #define HAL_XSPI_MODULE_ENABLED   */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_FLASH_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE    24000000UL /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT    100UL   /*!< Time out for HSE start up (in ms) */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE          64000000UL /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low-power oscillator (CSI) default value.
+  *        This value is the default CSI range value after Reset.
+  */
+#if !defined  (CSI_VALUE)
+#define CSI_VALUE          4000000UL  /*!< Value of the Internal oscillator in Hz */
+#endif /* CSI_VALUE */
+
+/**
+ * @brief Internal High Speed oscillator (HSI48) value for USB OTG FS and RNG.
+ *        This internal oscillator is mainly dedicated to provide a high precision clock to
+ *        the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
+ *        When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
+ *        which is subject to manufacturing process variations.
+  */
+  #if !defined  (HSI48_VALUE)
+  #define HSI48_VALUE        48000000UL /*!< Value of the Internal High Speed oscillator for USB OTG FS/RNG in Hz.
+                                            The real value my vary depending on manufacturing process variations. */
+  #endif /* HSI48_VALUE */
+
+/**
+* @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE  32000UL              /*!< LSI Typical Value in Hz.
+                                            Value of the Internal Low Speed oscillator in Hz.
+                                              The real value may vary depending on the variations
+                                              in voltage and temperature.*/
+#endif /* LSI_VALUE */
+
+/**
+* @brief External Low Speed oscillator (LSE) value.
+*/
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE    32768UL /*!< Value of the External oscillator in Hz*/
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    5000UL   /*!< Time out for LSE start up (in ms) */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External clock source for digital audio interfaces: SPI/I2S, SAI and ADF
+  *        This value is used by the RCC HAL module to provide the digital audio interfaces
+  *        frequency. This clock source is inserted directly through I2S_CKIN pad.
+  */
+#if !defined  (EXTERNAL_CLOCK_VALUE)
+#define EXTERNAL_CLOCK_VALUE      48000UL /*!< Value of the external clock source in Hz */
+#endif /* EXTERNAL_CLOCK_VALUE */
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                    3300UL /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY            (15UL)/*!< tick interrupt priority (lowest by default) */
+#define  USE_RTOS                     0U
+
+/* ########################## Assert Selection ############################## */
+/**
+* @brief Uncomment the line below to expanse the "assert_param" macro in the
+*        HAL drivers code
+*/
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+* @brief Set below the peripheral configuration  to "1U" to add the support
+*        of HAL callback registration/unregistration feature for the HAL
+*        driver(s). This allows user application to provide specific callback
+*        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+*        the default weak callback functions (see each stm32h7rsxx_hal_ppp.h file
+*        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+*        for each PPP peripheral).
+*/
+#define USE_HAL_ADC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CEC_REGISTER_CALLBACKS        0U
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS     0U
+#define USE_HAL_CRYP_REGISTER_CALLBACKS       0U
+#define USE_HAL_DCMIPP_REGISTER_CALLBACKS     0U
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS      0U
+#define USE_HAL_GFXMMU_REGISTER_CALLBACKS     0U
+#define USE_HAL_HASH_REGISTER_CALLBACKS       0U
+#define USE_HAL_I2C_REGISTER_CALLBACKS        0U
+#define USE_HAL_I2S_REGISTER_CALLBACKS        0U
+#define USE_HAL_IRDA_REGISTER_CALLBACKS       0U
+#define USE_HAL_JPEG_REGISTER_CALLBACKS       0U
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS      0U
+#define USE_HAL_MDF_REGISTER_CALLBACKS        0U
+#define USE_HAL_MMC_REGISTER_CALLBACKS        0U
+#define USE_HAL_NAND_REGISTER_CALLBACKS       0U
+#define USE_HAL_NOR_REGISTER_CALLBACKS        0U
+#define USE_HAL_PCD_REGISTER_CALLBACKS        0U
+#define USE_HAL_PKA_REGISTER_CALLBACKS        0U
+#define USE_HAL_PSSI_REGISTER_CALLBACKS       0U
+#define USE_HAL_RNG_REGISTER_CALLBACKS        0U
+#define USE_HAL_RTC_REGISTER_CALLBACKS        0U
+#define USE_HAL_SAI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SD_REGISTER_CALLBACKS         0U
+#define USE_HAL_SDIO_REGISTER_CALLBACKS       0U
+#define USE_HAL_SDRAM_REGISTER_CALLBACKS      0U
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS  0U
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS      0U
+#define USE_HAL_SPDIFRX_REGISTER_CALLBACKS    0U
+#define USE_HAL_SPI_REGISTER_CALLBACKS        0U
+#define USE_HAL_SRAM_REGISTER_CALLBACKS       0U
+#define USE_HAL_TIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_UART_REGISTER_CALLBACKS       0U
+#define USE_HAL_USART_REGISTER_CALLBACKS      0U
+#define USE_HAL_WWDG_REGISTER_CALLBACKS       0U
+#define USE_HAL_XSPI_REGISTER_CALLBACKS       0U
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+* Activated: CRC code is present inside driver
+* Deactivated: CRC code cleaned from driver
+*/
+
+#define USE_SPI_CRC                   1U
+
+/* ################## CRYP peripheral configuration ########################## */
+
+/**
+  * @brief  For code optimization purpose, uncomment and set to "1U" the USE_HAL_CRYP_ONLY or USE_HAL_SAES_ONLY,
+  *         to use only one peripheral. Both defines cannot be set to "1U" at the same time.
+  */
+
+/* #define USE_HAL_CRYP_ONLY       1U */
+/* #define USE_HAL_SAES_ONLY       0U */
+
+#define USE_HAL_CRYP_SUSPEND_RESUME   0U
+
+/* ################## HASH peripheral configuration ########################## */
+
+#define USE_HAL_HASH_SUSPEND_RESUME   0U
+
+/* ################## SDMMC peripheral configuration ######################### */
+
+#define USE_SD_TRANSCEIVER            0U
+
+/* ################## SDIO peripheral configuration ######################### */
+
+#define USE_SDIO_TRANSCEIVER          0U
+#define SDIO_MAX_IO_NUMBER            7U
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+
+#ifdef HAL_RCC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_CEC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cec.h"
+#endif /* HAL_CEC_MODULE_ENABLED */
+
+#ifdef HAL_CORDIC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cordic.h"
+#endif /* HAL_CORDIC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DCMIPP_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dcmipp.h"
+#endif /* HAL_DCMIPP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_FLASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_flash.h"
+#endif /* HAL_FLASH_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_GFXTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gfxtim.h"
+#endif /* HAL_GFXTIM_MODULE_ENABLED */
+
+#ifdef HAL_GPU2D_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_gpu2d.h"
+#endif /* HAL_GPU2D_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32h7rsxx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_I3C_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_i3c.h"
+#endif /* HAL_I3C_MODULE_ENABLED */
+
+#ifdef HAL_ICACHE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_icache.h"
+#endif /* HAL_ICACHE_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_MCE_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mce.h"
+#endif /* HAL_MCE_MODULE_ENABLED */
+
+#ifdef HAL_MDF_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mdf.h"
+#endif /* HAL_MDF_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RAMECC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_ramecc.h"
+#endif /* HAL_RAMECC_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDIO_MODULE_ENABLED
+#include "stm32h7rsxx_hal_sdio.h"
+#endif /* HAL_SDIO_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_XSPI_MODULE_ENABLED
+  #include "stm32h7rsxx_hal_xspi.h"
+#endif /* HAL_XSPI_MODULE_ENABLED */
+
+/* Exported macro ------------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+  void assert_failed(uint8_t *file, uint32_t line);
+#else
+  #define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32H7RSxx_HAL_CONF_H */
+

bsp/stm32/stm32h7r7-artpi2/board/CubeMX_Config/Appli/Core/Src/stm32h7rsxx_hal_msp.c

@@ -0,0 +1,1471 @@
+/* USER CODE BEGIN Header */
+/**
+  ******************************************************************************
+  * @file         stm32h7rsxx_hal_msp.c
+  * @brief        This file provides code for the MSP Initialization
+  *               and de-Initialization codes.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2025 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+/* USER CODE END Header */
+
+/* Includes ------------------------------------------------------------------*/
+#include "main.h"
+/* USER CODE BEGIN Includes */
+#include <drv_common.h>
+/* USER CODE END Includes */
+
+/* Private typedef -----------------------------------------------------------*/
+/* USER CODE BEGIN TD */
+
+/* USER CODE END TD */
+
+/* Private define ------------------------------------------------------------*/
+/* USER CODE BEGIN Define */
+
+/* USER CODE END Define */
+
+/* Private macro -------------------------------------------------------------*/
+/* USER CODE BEGIN Macro */
+
+/* USER CODE END Macro */
+
+/* Private variables ---------------------------------------------------------*/
+/* USER CODE BEGIN PV */
+
+/* USER CODE END PV */
+
+/* Private function prototypes -----------------------------------------------*/
+/* USER CODE BEGIN PFP */
+
+/* USER CODE END PFP */
+
+/* External functions --------------------------------------------------------*/
+/* USER CODE BEGIN ExternalFunctions */
+
+/* USER CODE END ExternalFunctions */
+
+/* USER CODE BEGIN 0 */
+
+/* USER CODE END 0 */
+/**
+  * Initializes the Global MSP.
+  */
+void HAL_MspInit(void)
+{
+
+  /* USER CODE BEGIN MspInit 0 */
+
+  /* USER CODE END MspInit 0 */
+
+  /* System interrupt init*/
+
+  /* Enable USB Voltage detector */
+  if(HAL_PWREx_EnableUSBVoltageDetector() != HAL_OK)
+  {
+   /* Initialization error */
+   Error_Handler();
+  }
+
+  /* USER CODE BEGIN MspInit 1 */
+
+  /* USER CODE END MspInit 1 */
+}
+
+/**
+  * @brief DCMIPP MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hdcmipp: DCMIPP handle pointer
+  * @retval None
+  */
+void HAL_DCMIPP_MspInit(DCMIPP_HandleTypeDef* hdcmipp)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  if(hdcmipp->Instance==DCMIPP)
+  {
+    /* USER CODE BEGIN DCMIPP_MspInit 0 */
+
+    /* USER CODE END DCMIPP_MspInit 0 */
+    /* Peripheral clock enable */
+    __HAL_RCC_DCMIPP_CLK_ENABLE();
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**DCMIPP GPIO Configuration
+    PE0     ------> DCMIPP_D2
+    PG3     ------> DCMIPP_HSYNC
+    PE1     ------> DCMIPP_D3
+    PB7     ------> DCMIPP_VSYNC
+    PD5     ------> DCMIPP_PIXCLK
+    PE4     ------> DCMIPP_D4
+    PB6     ------> DCMIPP_D5
+    PC6     ------> DCMIPP_D0
+    PE5     ------> DCMIPP_D6
+    PC7     ------> DCMIPP_D1
+    PD14     ------> DCMIPP_D7
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Alternate = GPIO_AF13_DCMIPP;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Alternate = GPIO_AF5_DCMIPP;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Alternate = GPIO_AF13_DCMIPP;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_14;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Alternate = GPIO_AF5_DCMIPP;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Alternate = GPIO_AF13_DCMIPP;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN DCMIPP_MspInit 1 */
+
+    /* USER CODE END DCMIPP_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief DCMIPP MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hdcmipp: DCMIPP handle pointer
+  * @retval None
+  */
+void HAL_DCMIPP_MspDeInit(DCMIPP_HandleTypeDef* hdcmipp)
+{
+  if(hdcmipp->Instance==DCMIPP)
+  {
+    /* USER CODE BEGIN DCMIPP_MspDeInit 0 */
+
+    /* USER CODE END DCMIPP_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_DCMIPP_CLK_DISABLE();
+
+    /**DCMIPP GPIO Configuration
+    PE0     ------> DCMIPP_D2
+    PG3     ------> DCMIPP_HSYNC
+    PE1     ------> DCMIPP_D3
+    PB7     ------> DCMIPP_VSYNC
+    PD5     ------> DCMIPP_PIXCLK
+    PE4     ------> DCMIPP_D4
+    PB6     ------> DCMIPP_D5
+    PC6     ------> DCMIPP_D0
+    PE5     ------> DCMIPP_D6
+    PC7     ------> DCMIPP_D1
+    PD14     ------> DCMIPP_D7
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_3);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7|GPIO_PIN_6);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_5|GPIO_PIN_14);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_6|GPIO_PIN_7);
+
+    /* USER CODE BEGIN DCMIPP_MspDeInit 1 */
+
+    /* USER CODE END DCMIPP_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief I2C MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hi2c: I2C handle pointer
+  * @retval None
+  */
+void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hi2c->Instance==I2C1)
+  {
+    /* USER CODE BEGIN I2C1_MspInit 0 */
+
+    /* USER CODE END I2C1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C1_I3C1;
+    PeriphClkInit.I2c1_I3c1ClockSelection = RCC_I2C1_I3C1CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**I2C1 GPIO Configuration
+    PB8     ------> I2C1_SCL
+    PB9     ------> I2C1_SDA
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* Peripheral clock enable */
+    __HAL_RCC_I2C1_CLK_ENABLE();
+    /* USER CODE BEGIN I2C1_MspInit 1 */
+
+    /* USER CODE END I2C1_MspInit 1 */
+  }
+  else if(hi2c->Instance==I2C2)
+  {
+    /* USER CODE BEGIN I2C2_MspInit 0 */
+
+    /* USER CODE END I2C2_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_I2C23;
+    PeriphClkInit.I2c23ClockSelection = RCC_I2C23CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    /**I2C2 GPIO Configuration
+    PF0     ------> I2C2_SDA
+    PF1     ------> I2C2_SCL
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF4_I2C2;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    /* Peripheral clock enable */
+    __HAL_RCC_I2C2_CLK_ENABLE();
+    /* USER CODE BEGIN I2C2_MspInit 1 */
+
+    /* USER CODE END I2C2_MspInit 1 */
+  }
+
+}
+
+/**
+  * @brief I2C MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hi2c: I2C handle pointer
+  * @retval None
+  */
+void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
+{
+  if(hi2c->Instance==I2C1)
+  {
+    /* USER CODE BEGIN I2C1_MspDeInit 0 */
+
+    /* USER CODE END I2C1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_I2C1_CLK_DISABLE();
+
+    /**I2C1 GPIO Configuration
+    PB8     ------> I2C1_SCL
+    PB9     ------> I2C1_SDA
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_8);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_9);
+
+    /* USER CODE BEGIN I2C1_MspDeInit 1 */
+
+    /* USER CODE END I2C1_MspDeInit 1 */
+  }
+  else if(hi2c->Instance==I2C2)
+  {
+    /* USER CODE BEGIN I2C2_MspDeInit 0 */
+
+    /* USER CODE END I2C2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_I2C2_CLK_DISABLE();
+
+    /**I2C2 GPIO Configuration
+    PF0     ------> I2C2_SDA
+    PF1     ------> I2C2_SCL
+    */
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_0);
+
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_1);
+
+    /* USER CODE BEGIN I2C2_MspDeInit 1 */
+
+    /* USER CODE END I2C2_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief LTDC MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hltdc: LTDC handle pointer
+  * @retval None
+  */
+void HAL_LTDC_MspInit(LTDC_HandleTypeDef* hltdc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hltdc->Instance==LTDC)
+  {
+    /* USER CODE BEGIN LTDC_MspInit 0 */
+
+    /* USER CODE END LTDC_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_LTDC;
+    PeriphClkInit.LtdcClockSelection = RCC_LTDCCLKSOURCE_PLL3R;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_LTDC_CLK_ENABLE();
+
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    __HAL_RCC_GPIOA_CLK_ENABLE();
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**LTDC GPIO Configuration
+    PB5     ------> LTDC_R2
+    PG0     ------> LTDC_R7
+    PB3(JTDO/TRACESWO)     ------> LTDC_R4
+    PG2     ------> LTDC_HSYNC
+    PE11     ------> LTDC_VSYNC
+    PA12     ------> LTDC_B2
+    PA11     ------> LTDC_B3
+    PB4(NJTRST)     ------> LTDC_R3
+    PA9     ------> LTDC_B5
+    PG1     ------> LTDC_R6
+    PA10     ------> LTDC_B4
+    PG14     ------> LTDC_B1
+    PA8     ------> LTDC_B6
+    PG13     ------> LTDC_CLK
+    PA15(JTDI)     ------> LTDC_R5
+    PF9     ------> LTDC_R0
+    PF10     ------> LTDC_R1
+    PB12     ------> LTDC_G5
+    PA0     ------> LTDC_G3
+    PA1     ------> LTDC_G2
+    PF11     ------> LTDC_B0
+    PF15     ------> LTDC_G1
+    PD12     ------> LTDC_DE
+    PB11     ------> LTDC_G6
+    PB13     ------> LTDC_G4
+    PA6     ------> LTDC_B7
+    PF14     ------> LTDC_G0
+    PB10     ------> LTDC_G7
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF10_LTDC;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_14
+                          |GPIO_PIN_13;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_12|GPIO_PIN_11
+                          |GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF11_LTDC;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_8|GPIO_PIN_15
+                          |GPIO_PIN_0|GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_15|GPIO_PIN_14;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF13_LTDC;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_10|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF14_LTDC;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF12_LTDC;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN LTDC_MspInit 1 */
+
+    /* USER CODE END LTDC_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief LTDC MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hltdc: LTDC handle pointer
+  * @retval None
+  */
+void HAL_LTDC_MspDeInit(LTDC_HandleTypeDef* hltdc)
+{
+  if(hltdc->Instance==LTDC)
+  {
+    /* USER CODE BEGIN LTDC_MspDeInit 0 */
+
+    /* USER CODE END LTDC_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_LTDC_CLK_DISABLE();
+
+    /**LTDC GPIO Configuration
+    PB5     ------> LTDC_R2
+    PG0     ------> LTDC_R7
+    PB3(JTDO/TRACESWO)     ------> LTDC_R4
+    PG2     ------> LTDC_HSYNC
+    PE11     ------> LTDC_VSYNC
+    PA12     ------> LTDC_B2
+    PA11     ------> LTDC_B3
+    PB4(NJTRST)     ------> LTDC_R3
+    PA9     ------> LTDC_B5
+    PG1     ------> LTDC_R6
+    PA10     ------> LTDC_B4
+    PG14     ------> LTDC_B1
+    PA8     ------> LTDC_B6
+    PG13     ------> LTDC_CLK
+    PA15(JTDI)     ------> LTDC_R5
+    PF9     ------> LTDC_R0
+    PF10     ------> LTDC_R1
+    PB12     ------> LTDC_G5
+    PA0     ------> LTDC_G3
+    PA1     ------> LTDC_G2
+    PF11     ------> LTDC_B0
+    PF15     ------> LTDC_G1
+    PD12     ------> LTDC_DE
+    PB11     ------> LTDC_G6
+    PB13     ------> LTDC_G4
+    PA6     ------> LTDC_B7
+    PF14     ------> LTDC_G0
+    PB10     ------> LTDC_G7
+    */
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_5|GPIO_PIN_3|GPIO_PIN_4|GPIO_PIN_12
+                          |GPIO_PIN_11|GPIO_PIN_13|GPIO_PIN_10);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_0|GPIO_PIN_2|GPIO_PIN_1|GPIO_PIN_14
+                          |GPIO_PIN_13);
+
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_11);
+
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_12|GPIO_PIN_11|GPIO_PIN_9|GPIO_PIN_10
+                          |GPIO_PIN_8|GPIO_PIN_15|GPIO_PIN_0|GPIO_PIN_1
+                          |GPIO_PIN_6);
+
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_9|GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_15
+                          |GPIO_PIN_14);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_12);
+
+    /* USER CODE BEGIN LTDC_MspDeInit 1 */
+
+    /* USER CODE END LTDC_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief SD MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hsd: SD handle pointer
+  * @retval None
+  */
+void HAL_SD_MspInit(SD_HandleTypeDef* hsd)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hsd->Instance==SDMMC1)
+  {
+    /* USER CODE BEGIN SDMMC1_MspInit 0 */
+
+    /* USER CODE END SDMMC1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SDMMC12;
+    PeriphClkInit.Sdmmc12ClockSelection = RCC_SDMMC12CLKSOURCE_PLL2S;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_SDMMC1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**SDMMC1 GPIO Configuration
+    PD2     ------> SDMMC1_CMD
+    PC10     ------> SDMMC1_D2
+    PC11     ------> SDMMC1_D3
+    PC12     ------> SDMMC1_CK
+    PC8     ------> SDMMC1_D0
+    PC9     ------> SDMMC1_D1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC1;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF12_SDMMC1;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_8|GPIO_PIN_9;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC1;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN SDMMC1_MspInit 1 */
+
+    /* USER CODE END SDMMC1_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief MMC MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hmmc: MMC handle pointer
+  * @retval None
+  */
+void HAL_MMC_MspInit(MMC_HandleTypeDef* hmmc)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hmmc->Instance==SDMMC2)
+  {
+    /* USER CODE BEGIN SDMMC2_MspInit 0 */
+
+    /* USER CODE END SDMMC2_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SDMMC12;
+    PeriphClkInit.Sdmmc12ClockSelection = RCC_SDMMC12CLKSOURCE_PLL2S;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_SDMMC2_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOG_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    __HAL_RCC_GPIOB_CLK_ENABLE();
+    /**SDMMC2 GPIO Configuration
+    PD7     ------> SDMMC2_CMD
+    PG12     ------> SDMMC2_D3
+    PG11     ------> SDMMC2_D2
+    PC1     ------> SDMMC2_CK
+    PB14     ------> SDMMC2_D0
+    PB15     ------> SDMMC2_D1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF11_SDMMC2;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF10_SDMMC2;
+    HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_1;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_SDMMC2;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
+    GPIO_InitStruct.Alternate = GPIO_AF9_SDMMC2;
+    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN SDMMC2_MspInit 1 */
+
+    /* USER CODE END SDMMC2_MspInit 1 */
+
+  }
+
+}
+
+/**
+  * @brief SD MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hsd: SD handle pointer
+  * @retval None
+  */
+void HAL_SD_MspDeInit(SD_HandleTypeDef* hsd)
+{
+  if(hsd->Instance==SDMMC1)
+  {
+    /* USER CODE BEGIN SDMMC1_MspDeInit 0 */
+
+    /* USER CODE END SDMMC1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SDMMC1_CLK_DISABLE();
+
+    /**SDMMC1 GPIO Configuration
+    PD2     ------> SDMMC1_CMD
+    PC10     ------> SDMMC1_D2
+    PC11     ------> SDMMC1_D3
+    PC12     ------> SDMMC1_CK
+    PC8     ------> SDMMC1_D0
+    PC9     ------> SDMMC1_D1
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_2);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_10|GPIO_PIN_11|GPIO_PIN_12|GPIO_PIN_8
+                          |GPIO_PIN_9);
+
+    /* USER CODE BEGIN SDMMC1_MspDeInit 1 */
+
+    /* USER CODE END SDMMC1_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief MMC MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hmmc: MMC handle pointer
+  * @retval None
+  */
+void HAL_MMC_MspDeInit(MMC_HandleTypeDef* hmmc)
+{
+  if(hmmc->Instance==SDMMC2)
+  {
+    /* USER CODE BEGIN SDMMC2_MspDeInit 0 */
+
+    /* USER CODE END SDMMC2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SDMMC2_CLK_DISABLE();
+
+    /**SDMMC2 GPIO Configuration
+    PD7     ------> SDMMC2_CMD
+    PG12     ------> SDMMC2_D3
+    PG11     ------> SDMMC2_D2
+    PC1     ------> SDMMC2_CK
+    PB14     ------> SDMMC2_D0
+    PB15     ------> SDMMC2_D1
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_7);
+
+    HAL_GPIO_DeInit(GPIOG, GPIO_PIN_12|GPIO_PIN_11);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_1);
+
+    HAL_GPIO_DeInit(GPIOB, GPIO_PIN_14|GPIO_PIN_15);
+
+    /* USER CODE BEGIN SDMMC2_MspDeInit 1 */
+
+    /* USER CODE END SDMMC2_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief SPI MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hspi: SPI handle pointer
+  * @retval None
+  */
+void HAL_SPI_MspInit(SPI_HandleTypeDef* hspi)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hspi->Instance==SPI2)
+  {
+    /* USER CODE BEGIN SPI2_MspInit 0 */
+
+    /* USER CODE END SPI2_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SPI23;
+    PeriphClkInit.Spi23ClockSelection = RCC_SPI23CLKSOURCE_PLL1Q;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI2_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    __HAL_RCC_GPIOC_CLK_ENABLE();
+    /**SPI2 GPIO Configuration
+    PD3     ------> SPI2_SCK
+    PC2     ------> SPI2_MISO
+    PC3     ------> SPI2_MOSI
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_2|GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI2;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN SPI2_MspInit 1 */
+
+    /* USER CODE END SPI2_MspInit 1 */
+  }
+  else if(hspi->Instance==SPI4)
+  {
+    /* USER CODE BEGIN SPI4_MspInit 0 */
+
+    /* USER CODE END SPI4_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SPI45;
+    PeriphClkInit.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI4_CLK_ENABLE();
+
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    /**SPI4 GPIO Configuration
+    PE13     ------> SPI4_MISO
+    PE6     ------> SPI4_MOSI
+    PE12     ------> SPI4_SCK
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_6|GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI4;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN SPI4_MspInit 1 */
+
+    /* USER CODE END SPI4_MspInit 1 */
+  }
+  else if(hspi->Instance==SPI5)
+  {
+    /* USER CODE BEGIN SPI5_MspInit 0 */
+
+    /* USER CODE END SPI5_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SPI45;
+    PeriphClkInit.Spi45ClockSelection = RCC_SPI45CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_SPI5_CLK_ENABLE();
+
+    __HAL_RCC_GPIOM_CLK_ENABLE();
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    /**SPI5 GPIO Configuration
+    PM13     ------> SPI5_MOSI
+    PM14     ------> SPI5_MISO
+    PF7     ------> SPI5_SCK
+    PF6     ------> SPI5_NSS
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_14;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
+    HAL_GPIO_Init(GPIOM, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_7|GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF5_SPI5;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN SPI5_MspInit 1 */
+
+    /* USER CODE END SPI5_MspInit 1 */
+  }
+
+}
+
+/**
+  * @brief SPI MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hspi: SPI handle pointer
+  * @retval None
+  */
+void HAL_SPI_MspDeInit(SPI_HandleTypeDef* hspi)
+{
+  if(hspi->Instance==SPI2)
+  {
+    /* USER CODE BEGIN SPI2_MspDeInit 0 */
+
+    /* USER CODE END SPI2_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SPI2_CLK_DISABLE();
+
+    /**SPI2 GPIO Configuration
+    PD3     ------> SPI2_SCK
+    PC2     ------> SPI2_MISO
+    PC3     ------> SPI2_MOSI
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_3);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_2|GPIO_PIN_3);
+
+    /* USER CODE BEGIN SPI2_MspDeInit 1 */
+
+    /* USER CODE END SPI2_MspDeInit 1 */
+  }
+  else if(hspi->Instance==SPI4)
+  {
+    /* USER CODE BEGIN SPI4_MspDeInit 0 */
+
+    /* USER CODE END SPI4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SPI4_CLK_DISABLE();
+
+    /**SPI4 GPIO Configuration
+    PE13     ------> SPI4_MISO
+    PE6     ------> SPI4_MOSI
+    PE12     ------> SPI4_SCK
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_13|GPIO_PIN_6|GPIO_PIN_12);
+
+    /* USER CODE BEGIN SPI4_MspDeInit 1 */
+
+    /* USER CODE END SPI4_MspDeInit 1 */
+  }
+  else if(hspi->Instance==SPI5)
+  {
+    /* USER CODE BEGIN SPI5_MspDeInit 0 */
+
+    /* USER CODE END SPI5_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_SPI5_CLK_DISABLE();
+
+    /**SPI5 GPIO Configuration
+    PM13     ------> SPI5_MOSI
+    PM14     ------> SPI5_MISO
+    PF7     ------> SPI5_SCK
+    PF6     ------> SPI5_NSS
+    */
+    HAL_GPIO_DeInit(GPIOM, GPIO_PIN_13|GPIO_PIN_14);
+
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_7|GPIO_PIN_6);
+
+    /* USER CODE BEGIN SPI5_MspDeInit 1 */
+
+    /* USER CODE END SPI5_MspDeInit 1 */
+  }
+
+}
+
+/**
+  * @brief UART MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param huart: UART handle pointer
+  * @retval None
+  */
+void HAL_UART_MspInit(UART_HandleTypeDef* huart)
+{
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(huart->Instance==UART4)
+  {
+    /* USER CODE BEGIN UART4_MspInit 0 */
+
+    /* USER CODE END UART4_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART234578;
+    PeriphClkInit.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_UART4_CLK_ENABLE();
+
+    __HAL_RCC_GPIOD_CLK_ENABLE();
+    /**UART4 GPIO Configuration
+    PD1     ------> UART4_TX
+    PD0     ------> UART4_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_1|GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF8_UART4;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN UART4_MspInit 1 */
+
+    /* USER CODE END UART4_MspInit 1 */
+  }
+  else if(huart->Instance==UART7)
+  {
+    /* USER CODE BEGIN UART7_MspInit 0 */
+
+    /* USER CODE END UART7_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART234578;
+    PeriphClkInit.Usart234578ClockSelection = RCC_USART234578CLKSOURCE_PCLK1;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_UART7_CLK_ENABLE();
+
+    __HAL_RCC_GPIOM_CLK_ENABLE();
+    __HAL_RCC_GPIOE_CLK_ENABLE();
+    /**UART7 GPIO Configuration
+    PM9     ------> UART7_TX
+    PM8     ------> UART7_RX
+    PE9     ------> UART7_RTS
+    PE10     ------> UART7_CTS
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_8;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_UART7;
+    HAL_GPIO_Init(GPIOM, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_9|GPIO_PIN_10;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF7_UART7;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN UART7_MspInit 1 */
+
+    /* USER CODE END UART7_MspInit 1 */
+  }
+  else if(huart->Instance==USART1)
+  {
+    /* USER CODE BEGIN USART1_MspInit 0 */
+
+    /* USER CODE END USART1_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1;
+    PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USART1_CLK_ENABLE();
+
+    __HAL_RCC_GPIOF_CLK_ENABLE();
+    /**USART1 GPIO Configuration
+    PF13     ------> USART1_TX
+    PF12     ------> USART1_RX
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_13|GPIO_PIN_12;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF4_USART1;
+    HAL_GPIO_Init(GPIOF, &GPIO_InitStruct);
+
+    /* USER CODE BEGIN USART1_MspInit 1 */
+
+    /* USER CODE END USART1_MspInit 1 */
+  }
+
+}
+
+/**
+  * @brief UART MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param huart: UART handle pointer
+  * @retval None
+  */
+void HAL_UART_MspDeInit(UART_HandleTypeDef* huart)
+{
+  if(huart->Instance==UART4)
+  {
+    /* USER CODE BEGIN UART4_MspDeInit 0 */
+
+    /* USER CODE END UART4_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_UART4_CLK_DISABLE();
+
+    /**UART4 GPIO Configuration
+    PD1     ------> UART4_TX
+    PD0     ------> UART4_RX
+    */
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_1|GPIO_PIN_0);
+
+    /* USER CODE BEGIN UART4_MspDeInit 1 */
+
+    /* USER CODE END UART4_MspDeInit 1 */
+  }
+  else if(huart->Instance==UART7)
+  {
+    /* USER CODE BEGIN UART7_MspDeInit 0 */
+
+    /* USER CODE END UART7_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_UART7_CLK_DISABLE();
+
+    /**UART7 GPIO Configuration
+    PM9     ------> UART7_TX
+    PM8     ------> UART7_RX
+    PE9     ------> UART7_RTS
+    PE10     ------> UART7_CTS
+    */
+    HAL_GPIO_DeInit(GPIOM, GPIO_PIN_9|GPIO_PIN_8);
+
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_9|GPIO_PIN_10);
+
+    /* USER CODE BEGIN UART7_MspDeInit 1 */
+
+    /* USER CODE END UART7_MspDeInit 1 */
+  }
+  else if(huart->Instance==USART1)
+  {
+    /* USER CODE BEGIN USART1_MspDeInit 0 */
+
+    /* USER CODE END USART1_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USART1_CLK_DISABLE();
+
+    /**USART1 GPIO Configuration
+    PF13     ------> USART1_TX
+    PF12     ------> USART1_RX
+    */
+    HAL_GPIO_DeInit(GPIOF, GPIO_PIN_13|GPIO_PIN_12);
+
+    /* USER CODE BEGIN USART1_MspDeInit 1 */
+
+    /* USER CODE END USART1_MspDeInit 1 */
+  }
+
+}
+
+static uint32_t HAL_RCC_USBPHYC_CLK_ENABLED=0;
+
+/**
+  * @brief PCD MSP Initialization
+  * This function configures the hardware resources used in this example
+  * @param hpcd: PCD handle pointer
+  * @retval None
+  */
+void HAL_PCD_MspInit(PCD_HandleTypeDef* hpcd)
+{
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  if(hpcd->Instance==USB_OTG_FS)
+  {
+    /* USER CODE BEGIN USB_OTG_FS_MspInit 0 */
+
+    /* USER CODE END USB_OTG_FS_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USBOTGFS;
+    PeriphClkInit.UsbOtgFsClockSelection = RCC_USBOTGFSCLKSOURCE_HSI48;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+  /** Enable USB Voltage detector
+  */
+    HAL_PWREx_EnableUSBVoltageDetector();
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
+    HAL_RCC_USBPHYC_CLK_ENABLED++;
+    if(HAL_RCC_USBPHYC_CLK_ENABLED==1){
+      __HAL_RCC_USBPHYC_CLK_ENABLE();
+    }
+    /* USER CODE BEGIN USB_OTG_FS_MspInit 1 */
+
+    /* USER CODE END USB_OTG_FS_MspInit 1 */
+  }
+  else if(hpcd->Instance==USB_OTG_HS)
+  {
+    /* USER CODE BEGIN USB_OTG_HS_MspInit 0 */
+
+    /* USER CODE END USB_OTG_HS_MspInit 0 */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USBPHYC;
+    PeriphClkInit.UsbPhycClockSelection = RCC_USBPHYCCLKSOURCE_HSE;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+  /** Enable USB Voltage detector
+  */
+    HAL_PWREx_EnableUSBVoltageDetector();
+
+    /* Peripheral clock enable */
+    __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
+    HAL_RCC_USBPHYC_CLK_ENABLED++;
+    if(HAL_RCC_USBPHYC_CLK_ENABLED==1){
+      __HAL_RCC_USBPHYC_CLK_ENABLE();
+    }
+    /* USER CODE BEGIN USB_OTG_HS_MspInit 1 */
+
+    /* USER CODE END USB_OTG_HS_MspInit 1 */
+  }
+
+}
+
+/**
+  * @brief PCD MSP De-Initialization
+  * This function freeze the hardware resources used in this example
+  * @param hpcd: PCD handle pointer
+  * @retval None
+  */
+void HAL_PCD_MspDeInit(PCD_HandleTypeDef* hpcd)
+{
+  if(hpcd->Instance==USB_OTG_FS)
+  {
+    /* USER CODE BEGIN USB_OTG_FS_MspDeInit 0 */
+
+    /* USER CODE END USB_OTG_FS_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USB_OTG_FS_CLK_DISABLE();
+    HAL_RCC_USBPHYC_CLK_ENABLED--;
+    if(HAL_RCC_USBPHYC_CLK_ENABLED==0){
+      __HAL_RCC_USBPHYC_CLK_DISABLE();
+    }
+    /* USER CODE BEGIN USB_OTG_FS_MspDeInit 1 */
+
+    /* USER CODE END USB_OTG_FS_MspDeInit 1 */
+  }
+  else if(hpcd->Instance==USB_OTG_HS)
+  {
+    /* USER CODE BEGIN USB_OTG_HS_MspDeInit 0 */
+
+    /* USER CODE END USB_OTG_HS_MspDeInit 0 */
+    /* Peripheral clock disable */
+    __HAL_RCC_USB_OTG_HS_CLK_DISABLE();
+    HAL_RCC_USBPHYC_CLK_ENABLED--;
+    if(HAL_RCC_USBPHYC_CLK_ENABLED==0){
+      __HAL_RCC_USBPHYC_CLK_DISABLE();
+    }
+    /* USER CODE BEGIN USB_OTG_HS_MspDeInit 1 */
+
+    /* USER CODE END USB_OTG_HS_MspDeInit 1 */
+  }
+
+}
+
+static uint32_t SAI1_client =0;
+static uint32_t SAI2_client =0;
+
+void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai)
+{
+
+  GPIO_InitTypeDef GPIO_InitStruct;
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+/* SAI1 */
+    if(hsai->Instance==SAI1_Block_A)
+    {
+    /* Peripheral clock enable */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI1;
+    PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLL1Q;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+    if (SAI1_client == 0)
+    {
+       __HAL_RCC_SAI1_CLK_ENABLE();
+    }
+    SAI1_client ++;
+
+    /**SAI1_A_Block_A GPIO Configuration
+    PE2     ------> SAI1_CK1
+    PD6     ------> SAI1_D1
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF2_SAI1;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_6;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF2_SAI1;
+    HAL_GPIO_Init(GPIOD, &GPIO_InitStruct);
+
+    }
+    if(hsai->Instance==SAI1_Block_B)
+    {
+      /* Peripheral clock enable */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI1;
+    PeriphClkInit.Sai1ClockSelection = RCC_SAI1CLKSOURCE_PLL1Q;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+      if (SAI1_client == 0)
+      {
+       __HAL_RCC_SAI1_CLK_ENABLE();
+      }
+    SAI1_client ++;
+
+    /**SAI1_B_Block_B GPIO Configuration
+    PE3     ------> SAI1_SD_B
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_3;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF6_SAI1;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    }
+/* SAI2 */
+    if(hsai->Instance==SAI2_Block_B)
+    {
+      /* Peripheral clock enable */
+
+  /** Initializes the peripherals clock
+  */
+    PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_SAI2;
+    PeriphClkInit.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLL1Q;
+    if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+    {
+      Error_Handler();
+    }
+
+      if (SAI2_client == 0)
+      {
+       __HAL_RCC_SAI2_CLK_ENABLE();
+      }
+    SAI2_client ++;
+
+    /**SAI2_B_Block_B GPIO Configuration
+    PE14     ------> SAI2_MCLK_B
+    PC0     ------> SAI2_FS_B
+    PA2     ------> SAI2_SCK_B
+    PE7     ------> SAI2_SD_B
+    */
+    GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_7;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF10_SAI2;
+    HAL_GPIO_Init(GPIOE, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_0;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF8_SAI2;
+    HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+    GPIO_InitStruct.Pin = GPIO_PIN_2;
+    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+    GPIO_InitStruct.Pull = GPIO_NOPULL;
+    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+    GPIO_InitStruct.Alternate = GPIO_AF8_SAI2;
+    HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+    }
+}
+
+void HAL_SAI_MspDeInit(SAI_HandleTypeDef* hsai)
+{
+/* SAI1 */
+    if(hsai->Instance==SAI1_Block_A)
+    {
+    SAI1_client --;
+    if (SAI1_client == 0)
+      {
+      /* Peripheral clock disable */
+       __HAL_RCC_SAI1_CLK_DISABLE();
+      }
+
+    /**SAI1_A_Block_A GPIO Configuration
+    PE2     ------> SAI1_CK1
+    PD6     ------> SAI1_D1
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_2);
+
+    HAL_GPIO_DeInit(GPIOD, GPIO_PIN_6);
+
+    }
+    if(hsai->Instance==SAI1_Block_B)
+    {
+    SAI1_client --;
+      if (SAI1_client == 0)
+      {
+      /* Peripheral clock disable */
+      __HAL_RCC_SAI1_CLK_DISABLE();
+      }
+
+    /**SAI1_B_Block_B GPIO Configuration
+    PE3     ------> SAI1_SD_B
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_3);
+
+    }
+/* SAI2 */
+    if(hsai->Instance==SAI2_Block_B)
+    {
+    SAI2_client --;
+      if (SAI2_client == 0)
+      {
+      /* Peripheral clock disable */
+      __HAL_RCC_SAI2_CLK_DISABLE();
+      }
+
+    /**SAI2_B_Block_B GPIO Configuration
+    PE14     ------> SAI2_MCLK_B
+    PC0     ------> SAI2_FS_B
+    PA2     ------> SAI2_SCK_B
+    PE7     ------> SAI2_SD_B
+    */
+    HAL_GPIO_DeInit(GPIOE, GPIO_PIN_14|GPIO_PIN_7);
+
+    HAL_GPIO_DeInit(GPIOC, GPIO_PIN_0);
+
+    HAL_GPIO_DeInit(GPIOA, GPIO_PIN_2);
+
+    }
+}
+
+/* USER CODE BEGIN 1 */
+
+/* USER CODE END 1 */

bsp/stm32/stm32h7r7-artpi2/board/CubeMX_Config/CubeMX_Config.ioc

@@ -0,0 +1,1060 @@
+#MicroXplorer Configuration settings - do not modify
+ADC1.Channel-0\#ChannelRegularConversion=ADC_CHANNEL_15
+ADC1.IPParameters=Rank-0\#ChannelRegularConversion,Channel-0\#ChannelRegularConversion,SamplingTime-0\#ChannelRegularConversion,OffsetNumber-0\#ChannelRegularConversion,OffsetSign-0\#ChannelRegularConversion,NbrOfConversionFlag,master
+ADC1.NbrOfConversionFlag=1
+ADC1.OffsetNumber-0\#ChannelRegularConversion=ADC_OFFSET_NONE
+ADC1.OffsetSign-0\#ChannelRegularConversion=ADC_OFFSET_SIGN_NEGATIVE
+ADC1.Rank-0\#ChannelRegularConversion=1
+ADC1.SamplingTime-0\#ChannelRegularConversion=ADC_SAMPLETIME_2CYCLES_5
+ADC1.master=1
+Appli.IPs=CORTEX_M7_APPLI\:I,GPDMA1\:I,HPDMA1\:I,LINKEDLIST\:I,RCC\:I,GPIO,NVIC2\:I,UART4,SDMMC1,SDMMC2,FLASH,USB_OTG_FS,USB_OTG_HS,LTDC,GFXTIM,I2C2,I2C1,DCMIPP,DMA2D,JPEG,SAI1,SAI2,SPDIFRX,SPI1,SPI2,SPI3,SPI4,SPI5,SPI6,UART7,FDCAN1,FDCAN2,USART1
+Boot.IPs=CORTEX_M7_BOOT\:I,GPDMA1,HPDMA1,LINKEDLIST,RCC,GPIO,NVIC1\:I,UART4,ADC1,MEMORYMAP\:I,XSPI1,XSPI2,USB_OTG_HS,DTS\:I,VREFBUF\:I
+CAD.formats=
+CAD.pinconfig=
+CAD.provider=
+CORTEX_M7_APPLI.AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_PRIV_RO
+CORTEX_M7_APPLI.BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=0x70000000
+CORTEX_M7_APPLI.Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_ENABLE
+CORTEX_M7_APPLI.IPParameters=default_mode_Activation,BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,IsCacheable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S
+CORTEX_M7_APPLI.IsCacheable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_ACCESS_CACHEABLE
+CORTEX_M7_APPLI.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_64MB
+CORTEX_M7_APPLI.TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_TEX_LEVEL1
+CORTEX_M7_APPLI.default_mode_Activation=1
+CORTEX_M7_BOOT.AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_PRIV_RO
+CORTEX_M7_BOOT.BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=0x08000000
+CORTEX_M7_BOOT.Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_ENABLE
+CORTEX_M7_BOOT.IPParameters=default_mode_Activation,Enable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,BaseAddress_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,AccessPermission_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S,IsCacheable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S
+CORTEX_M7_BOOT.IsCacheable_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_ACCESS_CACHEABLE
+CORTEX_M7_BOOT.Size_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_REGION_SIZE_64KB
+CORTEX_M7_BOOT.TypeExtField_S-Cortex_Memory_Protection_Unit_Region1_Settings_S=MPU_TEX_LEVEL1
+CORTEX_M7_BOOT.default_mode_Activation=1
+ExtMemLoader.IPs=EXTMEM_LOADER\:I,EXTMEM_MANAGER\:I,GPIO,UART4
+File.Version=6
+GPIO.groupedBy=
+I2C1.IPParameters=Timing
+I2C1.Timing=0x20C0EDFF
+I2C2.IPParameters=Timing
+I2C2.Timing=0x20C0EDFF
+KeepUserPlacement=false
+MMTAppReg1.MEMORYMAP.AppRegionName=DTCM
+MMTAppReg1.MEMORYMAP.ContextName=Boot
+MMTAppReg1.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg1.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg1.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name
+MMTAppReg1.MEMORYMAP.Name=DTCM
+MMTAppReg1.MEMORYMAP.Size=65536
+MMTAppReg1.MEMORYMAP.StartAddress=0x20000000
+MMTAppReg2.MEMORYMAP.AppRegionName=RAM
+MMTAppReg2.MEMORYMAP.ContextName=Boot
+MMTAppReg2.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg2.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg2.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name
+MMTAppReg2.MEMORYMAP.Name=RAM
+MMTAppReg2.MEMORYMAP.Size=465920
+MMTAppReg2.MEMORYMAP.StartAddress=0x24000000
+MMTAppReg3.MEMORYMAP.AppRegionName=ITCM
+MMTAppReg3.MEMORYMAP.Cacheability=WTRA
+MMTAppReg3.MEMORYMAP.ContextName=Boot
+MMTAppReg3.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg3.MEMORYMAP.DefaultDataRegion=false
+MMTAppReg3.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name,Cacheability
+MMTAppReg3.MEMORYMAP.Name=ITCM
+MMTAppReg3.MEMORYMAP.Size=65536
+MMTAppReg3.MEMORYMAP.StartAddress=0x00000000
+MMTAppReg4.MEMORYMAP.AP=RO_priv_only
+MMTAppReg4.MEMORYMAP.AppRegionName=FLASH
+MMTAppReg4.MEMORYMAP.Cacheability=WTRA
+MMTAppReg4.MEMORYMAP.ContextName=Boot
+MMTAppReg4.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg4.MEMORYMAP.DefaultCodeRegion=true
+MMTAppReg4.MEMORYMAP.DefaultDataRegion=false
+MMTAppReg4.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,MemType,ContextName,Name,AP,Cacheability,DefaultCodeRegion
+MMTAppReg4.MEMORYMAP.MemType=ROM
+MMTAppReg4.MEMORYMAP.Name=FLASH
+MMTAppReg4.MEMORYMAP.Size=65536
+MMTAppReg4.MEMORYMAP.StartAddress=0x08000000
+MMTAppReg5.MEMORYMAP.AppRegionName=DTCM
+MMTAppReg5.MEMORYMAP.ContextName=Appli
+MMTAppReg5.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg5.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg5.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name
+MMTAppReg5.MEMORYMAP.Name=DTCM
+MMTAppReg5.MEMORYMAP.Size=65536
+MMTAppReg5.MEMORYMAP.StartAddress=0x20000000
+MMTAppReg6.MEMORYMAP.AppRegionName=RAM
+MMTAppReg6.MEMORYMAP.ContextName=Appli
+MMTAppReg6.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg6.MEMORYMAP.DefaultDataRegion=true
+MMTAppReg6.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name
+MMTAppReg6.MEMORYMAP.Name=RAM
+MMTAppReg6.MEMORYMAP.Size=465920
+MMTAppReg6.MEMORYMAP.StartAddress=0x24000000
+MMTAppReg7.MEMORYMAP.AppRegionName=ITCM
+MMTAppReg7.MEMORYMAP.Cacheability=WTRA
+MMTAppReg7.MEMORYMAP.ContextName=Appli
+MMTAppReg7.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg7.MEMORYMAP.DefaultDataRegion=false
+MMTAppReg7.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,ContextName,Name,Cacheability
+MMTAppReg7.MEMORYMAP.Name=ITCM
+MMTAppReg7.MEMORYMAP.Size=65536
+MMTAppReg7.MEMORYMAP.StartAddress=0x00000000
+MMTAppReg8.MEMORYMAP.AP=RO_priv_only
+MMTAppReg8.MEMORYMAP.AppRegionName=FLASH
+MMTAppReg8.MEMORYMAP.Cacheability=WTRA
+MMTAppReg8.MEMORYMAP.ContextName=Appli
+MMTAppReg8.MEMORYMAP.CoreName=ARM Cortex-M7
+MMTAppReg8.MEMORYMAP.DefaultCodeRegion=true
+MMTAppReg8.MEMORYMAP.DefaultDataRegion=false
+MMTAppReg8.MEMORYMAP.IPParameters=StartAddress,Size,CoreName,DefaultDataRegion,MemType,ContextName,Name,AP,Cacheability,DefaultCodeRegion,SizeUnit
+MMTAppReg8.MEMORYMAP.MemType=ROM
+MMTAppReg8.MEMORYMAP.Name=FLASH
+MMTAppReg8.MEMORYMAP.Size=67108864
+MMTAppReg8.MEMORYMAP.SizeUnit=MB
+MMTAppReg8.MEMORYMAP.StartAddress=0x70000000
+MMTAppRegionsCount=8
+MMTConfigApplied=true
+MMTProjectManagerApplied=true
+Mcu.CPN=STM32H7R7L8H6H
+Mcu.Context0=Boot
+Mcu.Context1=Appli
+Mcu.Context2=ExtMemLoader
+Mcu.ContextNb=3
+Mcu.Family=STM32H7
+Mcu.IP0=ADC1
+Mcu.IP1=CORTEX_M7_APPLI
+Mcu.IP10=NVIC2
+Mcu.IP11=NVIC1
+Mcu.IP12=RCC
+Mcu.IP13=SAI1
+Mcu.IP14=SAI2
+Mcu.IP15=SDMMC1
+Mcu.IP16=SDMMC2
+Mcu.IP17=SPI2
+Mcu.IP18=SPI4
+Mcu.IP19=SPI5
+Mcu.IP2=CORTEX_M7_BOOT
+Mcu.IP20=UART4
+Mcu.IP21=UART7
+Mcu.IP22=USART1
+Mcu.IP23=USB_OTG_FS
+Mcu.IP24=USB_OTG_HS
+Mcu.IP25=VREFBUF
+Mcu.IP26=XSPI1
+Mcu.IP27=XSPI2
+Mcu.IP3=DCMIPP
+Mcu.IP4=DTS
+Mcu.IP5=FLASH
+Mcu.IP6=I2C1
+Mcu.IP7=I2C2
+Mcu.IP8=LTDC
+Mcu.IP9=MEMORYMAP
+Mcu.IPNb=28
+Mcu.Name=STM32H7R7L8HxH
+Mcu.Package=TFBGA225 HEXA SMPS
+Mcu.Pin0=PE0
+Mcu.Pin1=PG3
+Mcu.Pin10=PF0
+Mcu.Pin100=PA6
+Mcu.Pin101=PF13
+Mcu.Pin102=PF14
+Mcu.Pin103=PE9
+Mcu.Pin104=PP11
+Mcu.Pin105=PO1
+Mcu.Pin106=PP15
+Mcu.Pin107=PP3
+Mcu.Pin108=PO5
+Mcu.Pin109=PP0
+Mcu.Pin11=PD7
+Mcu.Pin110=PP7
+Mcu.Pin111=PP8
+Mcu.Pin112=PB10
+Mcu.Pin113=PF12
+Mcu.Pin114=PE10
+Mcu.Pin115=PP13
+Mcu.Pin116=PP4
+Mcu.Pin117=PO4
+Mcu.Pin118=PP6
+Mcu.Pin119=PP9
+Mcu.Pin12=PM11
+Mcu.Pin120=VP_ADC1_TempSens_Input
+Mcu.Pin121=VP_ADC1_Vref_Input
+Mcu.Pin122=VP_DTS_VS-DTS
+Mcu.Pin123=VP_FLASH_SIG_Activate_FlashIP
+Mcu.Pin124=VP_VREFBUF_V_VREFBUF
+Mcu.Pin125=VP_XSPI1_VS_hexa
+Mcu.Pin126=VP_XSPI2_VS_octo
+Mcu.Pin127=VP_MEMORYMAP_VS_MEMORYMAP
+Mcu.Pin13=PM9
+Mcu.Pin14=PM5
+Mcu.Pin15=PG0
+Mcu.Pin16=PE13
+Mcu.Pin17=PD1
+Mcu.Pin18=PC10
+Mcu.Pin19=PC11
+Mcu.Pin2=PM12
+Mcu.Pin20=PB9
+Mcu.Pin21=PE1
+Mcu.Pin22=PB3(JTDO/TRACESWO)
+Mcu.Pin23=PF1
+Mcu.Pin24=PG2
+Mcu.Pin25=PM13
+Mcu.Pin26=PM14
+Mcu.Pin27=PM8
+Mcu.Pin28=PE11
+Mcu.Pin29=PD0
+Mcu.Pin3=PM6
+Mcu.Pin30=PA12
+Mcu.Pin31=PA11
+Mcu.Pin32=PC15-OSC32_OUT(OSC32_OUT)
+Mcu.Pin33=PC14-OSC32_IN(OSC32_IN)
+Mcu.Pin34=PB7
+Mcu.Pin35=PB4(NJTRST)
+Mcu.Pin36=PD5
+Mcu.Pin37=PC12
+Mcu.Pin38=PA9
+Mcu.Pin39=PC8
+Mcu.Pin4=PD3
+Mcu.Pin40=PE6
+Mcu.Pin41=PE4
+Mcu.Pin42=PB6
+Mcu.Pin43=PD6
+Mcu.Pin44=PG1
+Mcu.Pin45=PE12
+Mcu.Pin46=PA10
+Mcu.Pin47=PC9
+Mcu.Pin48=PC6
+Mcu.Pin49=PG14
+Mcu.Pin5=PE14
+Mcu.Pin50=PG12
+Mcu.Pin51=PG11
+Mcu.Pin52=PE5
+Mcu.Pin53=PE3
+Mcu.Pin54=PA8
+Mcu.Pin55=PC7
+Mcu.Pin56=PG13
+Mcu.Pin57=PA15(JTDI)
+Mcu.Pin58=PN3
+Mcu.Pin59=PN0
+Mcu.Pin6=PD2
+Mcu.Pin60=PN11
+Mcu.Pin61=PF7
+Mcu.Pin62=PF6
+Mcu.Pin63=PN10
+Mcu.Pin64=PN9
+Mcu.Pin65=PN2
+Mcu.Pin66=PF9
+Mcu.Pin67=PF10
+Mcu.Pin68=PN6
+Mcu.Pin69=PH0-OSC_IN(PH0)
+Mcu.Pin7=PB8
+Mcu.Pin70=PH1-OSC_OUT(PH1)
+Mcu.Pin71=PC0
+Mcu.Pin72=PN8
+Mcu.Pin73=PN4
+Mcu.Pin74=PN5
+Mcu.Pin75=PC1
+Mcu.Pin76=PC2
+Mcu.Pin77=PC3
+Mcu.Pin78=PA2
+Mcu.Pin79=PB12
+Mcu.Pin8=PE2
+Mcu.Pin80=PD14
+Mcu.Pin81=PA0
+Mcu.Pin82=PA1
+Mcu.Pin83=PF11
+Mcu.Pin84=PE7
+Mcu.Pin85=PO3
+Mcu.Pin86=PP10
+Mcu.Pin87=PB14
+Mcu.Pin88=PB15
+Mcu.Pin89=PA3
+Mcu.Pin9=PB5
+Mcu.Pin90=PF15
+Mcu.Pin91=PP12
+Mcu.Pin92=PP14
+Mcu.Pin93=PP2
+Mcu.Pin94=PP5
+Mcu.Pin95=PO2
+Mcu.Pin96=PP1
+Mcu.Pin97=PD12
+Mcu.Pin98=PB11
+Mcu.Pin99=PB13
+Mcu.PinsNb=128
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32H7R7L8HxH
+MxCube.Version=6.14.1
+MxDb.Version=DB.6.0.141
+NVIC1.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.ForceEnableDMAVector=true
+NVIC1.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC1.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC1.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
+NVIC1.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.ForceEnableDMAVector=true
+NVIC2.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.MemoryManagement_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.PriorityGroup=NVIC_PRIORITYGROUP_4
+NVIC2.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC2.SysTick_IRQn=true\:15\:0\:false\:false\:true\:false\:true\:false
+NVIC2.UsageFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+PA0.GPIOParameters=PinAttribute
+PA0.Locked=true
+PA0.Mode=RGB888
+PA0.PinAttribute=Appli
+PA0.Signal=LTDC_G3
+PA1.GPIOParameters=PinAttribute
+PA1.Locked=true
+PA1.Mode=RGB888
+PA1.PinAttribute=Appli
+PA1.Signal=LTDC_G2
+PA10.GPIOParameters=PinAttribute
+PA10.Locked=true
+PA10.Mode=RGB888
+PA10.PinAttribute=Appli
+PA10.Signal=LTDC_B4
+PA11.GPIOParameters=PinAttribute
+PA11.Locked=true
+PA11.Mode=RGB888
+PA11.PinAttribute=Appli
+PA11.Signal=LTDC_B3
+PA12.GPIOParameters=PinAttribute
+PA12.Locked=true
+PA12.Mode=RGB888
+PA12.PinAttribute=Appli
+PA12.Signal=LTDC_B2
+PA15(JTDI).GPIOParameters=PinAttribute
+PA15(JTDI).Locked=true
+PA15(JTDI).Mode=RGB888
+PA15(JTDI).PinAttribute=Appli
+PA15(JTDI).Signal=LTDC_R5
+PA2.GPIOParameters=PinAttribute
+PA2.Locked=true
+PA2.Mode=SAI_B_MasterWithClock
+PA2.PinAttribute=Appli
+PA2.Signal=SAI2_SCK_B
+PA3.GPIOParameters=GPIO_Label,PinAttribute
+PA3.GPIO_Label=PIN_HW_VER_ADC
+PA3.Locked=true
+PA3.PinAttribute=Boot
+PA3.Signal=ADCx_INP15
+PA6.GPIOParameters=PinAttribute
+PA6.Locked=true
+PA6.Mode=RGB888
+PA6.PinAttribute=Appli
+PA6.Signal=LTDC_B7
+PA8.GPIOParameters=PinAttribute
+PA8.Locked=true
+PA8.Mode=RGB888
+PA8.PinAttribute=Appli
+PA8.Signal=LTDC_B6
+PA9.GPIOParameters=PinAttribute
+PA9.Locked=true
+PA9.Mode=RGB888
+PA9.PinAttribute=Appli
+PA9.Signal=LTDC_B5
+PB10.GPIOParameters=PinAttribute
+PB10.Locked=true
+PB10.Mode=RGB888
+PB10.PinAttribute=Appli
+PB10.Signal=LTDC_G7
+PB11.GPIOParameters=PinAttribute
+PB11.Locked=true
+PB11.Mode=RGB888
+PB11.PinAttribute=Appli
+PB11.Signal=LTDC_G6
+PB12.GPIOParameters=PinAttribute
+PB12.Locked=true
+PB12.Mode=RGB888
+PB12.PinAttribute=Appli
+PB12.Signal=LTDC_G5
+PB13.GPIOParameters=PinAttribute
+PB13.Locked=true
+PB13.Mode=RGB888
+PB13.PinAttribute=Appli
+PB13.Signal=LTDC_G4
+PB14.GPIOParameters=PinAttribute
+PB14.Locked=true
+PB14.Mode=mmc_4_bits_Wide_bus
+PB14.PinAttribute=Appli
+PB14.Signal=SDMMC2_D0
+PB15.GPIOParameters=PinAttribute
+PB15.Locked=true
+PB15.Mode=mmc_4_bits_Wide_bus
+PB15.PinAttribute=Appli
+PB15.Signal=SDMMC2_D1
+PB3(JTDO/TRACESWO).GPIOParameters=PinAttribute
+PB3(JTDO/TRACESWO).Locked=true
+PB3(JTDO/TRACESWO).Mode=RGB888
+PB3(JTDO/TRACESWO).PinAttribute=Appli
+PB3(JTDO/TRACESWO).Signal=LTDC_R4
+PB4(NJTRST).GPIOParameters=PinAttribute
+PB4(NJTRST).Locked=true
+PB4(NJTRST).Mode=RGB888
+PB4(NJTRST).PinAttribute=Appli
+PB4(NJTRST).Signal=LTDC_R3
+PB5.GPIOParameters=PinAttribute
+PB5.Locked=true
+PB5.Mode=RGB888
+PB5.PinAttribute=Appli
+PB5.Signal=LTDC_R2
+PB6.GPIOParameters=PinAttribute
+PB6.Mode=Slave_8_bits_External_Synchro
+PB6.PinAttribute=Appli
+PB6.Signal=DCMIPP_D5
+PB7.GPIOParameters=PinAttribute
+PB7.Mode=Slave_8_bits_External_Synchro
+PB7.PinAttribute=Appli
+PB7.Signal=DCMIPP_VSYNC
+PB8.GPIOParameters=PinAttribute
+PB8.Mode=I2C
+PB8.PinAttribute=Appli
+PB8.Signal=I2C1_SCL
+PB9.GPIOParameters=PinAttribute
+PB9.Mode=I2C
+PB9.PinAttribute=Appli
+PB9.Signal=I2C1_SDA
+PC0.GPIOParameters=PinAttribute
+PC0.Locked=true
+PC0.Mode=SAI_B_MasterWithClock
+PC0.PinAttribute=Appli
+PC0.Signal=SAI2_FS_B
+PC1.GPIOParameters=PinAttribute
+PC1.Locked=true
+PC1.Mode=mmc_4_bits_Wide_bus
+PC1.PinAttribute=Appli
+PC1.Signal=SDMMC2_CK
+PC10.GPIOParameters=PinAttribute
+PC10.Locked=true
+PC10.Mode=SD_4_bits_Wide_bus
+PC10.PinAttribute=Appli
+PC10.Signal=SDMMC1_D2
+PC11.GPIOParameters=PinAttribute
+PC11.Locked=true
+PC11.Mode=SD_4_bits_Wide_bus
+PC11.PinAttribute=Appli
+PC11.Signal=SDMMC1_D3
+PC12.GPIOParameters=PinAttribute
+PC12.Locked=true
+PC12.Mode=SD_4_bits_Wide_bus
+PC12.PinAttribute=Appli
+PC12.Signal=SDMMC1_CK
+PC14-OSC32_IN(OSC32_IN).Mode=LSE-External-Oscillator
+PC14-OSC32_IN(OSC32_IN).Signal=RCC_OSC32_IN
+PC15-OSC32_OUT(OSC32_OUT).Mode=LSE-External-Oscillator
+PC15-OSC32_OUT(OSC32_OUT).Signal=RCC_OSC32_OUT
+PC2.GPIOParameters=PinAttribute
+PC2.Mode=Full_Duplex_Master
+PC2.PinAttribute=Appli
+PC2.Signal=SPI2_MISO
+PC3.GPIOParameters=PinAttribute
+PC3.Mode=Full_Duplex_Master
+PC3.PinAttribute=Appli
+PC3.Signal=SPI2_MOSI
+PC6.GPIOParameters=PinAttribute
+PC6.Mode=Slave_8_bits_External_Synchro
+PC6.PinAttribute=Appli
+PC6.Signal=DCMIPP_D0
+PC7.GPIOParameters=PinAttribute
+PC7.Mode=Slave_8_bits_External_Synchro
+PC7.PinAttribute=Appli
+PC7.Signal=DCMIPP_D1
+PC8.GPIOParameters=PinAttribute
+PC8.Locked=true
+PC8.Mode=SD_4_bits_Wide_bus
+PC8.PinAttribute=Appli
+PC8.Signal=SDMMC1_D0
+PC9.GPIOParameters=PinAttribute
+PC9.Locked=true
+PC9.Mode=SD_4_bits_Wide_bus
+PC9.PinAttribute=Appli
+PC9.Signal=SDMMC1_D1
+PD0.GPIOParameters=PinAttribute
+PD0.Locked=true
+PD0.Mode=Asynchronous
+PD0.PinAttribute=Boot,Appli,ExtMemLoader
+PD0.Signal=UART4_RX
+PD1.GPIOParameters=PinAttribute
+PD1.Locked=true
+PD1.Mode=Asynchronous
+PD1.PinAttribute=Boot,Appli,ExtMemLoader
+PD1.Signal=UART4_TX
+PD12.GPIOParameters=PinAttribute
+PD12.Locked=true
+PD12.Mode=RGB888
+PD12.PinAttribute=Appli
+PD12.Signal=LTDC_DE
+PD14.GPIOParameters=PinAttribute
+PD14.Mode=Slave_8_bits_External_Synchro
+PD14.PinAttribute=Appli
+PD14.Signal=DCMIPP_D7
+PD2.GPIOParameters=PinAttribute
+PD2.Locked=true
+PD2.Mode=SD_4_bits_Wide_bus
+PD2.PinAttribute=Appli
+PD2.Signal=SDMMC1_CMD
+PD3.GPIOParameters=PinAttribute
+PD3.Mode=Full_Duplex_Master
+PD3.PinAttribute=Appli
+PD3.Signal=SPI2_SCK
+PD5.GPIOParameters=PinAttribute
+PD5.Mode=Slave_8_bits_External_Synchro
+PD5.PinAttribute=Appli
+PD5.Signal=DCMIPP_PIXCLK
+PD6.GPIOParameters=PinAttribute
+PD6.Mode=PDM_Master_Mode_CK1
+PD6.PinAttribute=Appli
+PD6.Signal=SAI1_D1
+PD7.GPIOParameters=PinAttribute
+PD7.Locked=true
+PD7.Mode=mmc_4_bits_Wide_bus
+PD7.PinAttribute=Appli
+PD7.Signal=SDMMC2_CMD
+PE0.GPIOParameters=PinAttribute
+PE0.Mode=Slave_8_bits_External_Synchro
+PE0.PinAttribute=Appli
+PE0.Signal=DCMIPP_D2
+PE1.GPIOParameters=PinAttribute
+PE1.Mode=Slave_8_bits_External_Synchro
+PE1.PinAttribute=Appli
+PE1.Signal=DCMIPP_D3
+PE10.GPIOParameters=PinAttribute
+PE10.Locked=true
+PE10.Mode=CTS_RTS
+PE10.PinAttribute=Appli
+PE10.Signal=UART7_CTS
+PE11.GPIOParameters=PinAttribute
+PE11.Locked=true
+PE11.Mode=RGB888
+PE11.PinAttribute=Appli
+PE11.Signal=LTDC_VSYNC
+PE12.GPIOParameters=PinAttribute
+PE12.Mode=Full_Duplex_Master
+PE12.PinAttribute=Appli
+PE12.Signal=SPI4_SCK
+PE13.GPIOParameters=PinAttribute
+PE13.Mode=Full_Duplex_Master
+PE13.PinAttribute=Appli
+PE13.Signal=SPI4_MISO
+PE14.GPIOParameters=PinAttribute
+PE14.Locked=true
+PE14.Mode=SAI_B_MasterWithClock
+PE14.PinAttribute=Appli
+PE14.Signal=SAI2_MCLK_B
+PE2.GPIOParameters=PinAttribute
+PE2.Mode=PDM_Master_Mode_CK1
+PE2.PinAttribute=Appli
+PE2.Signal=SAI1_CK1
+PE3.GPIOParameters=PinAttribute
+PE3.Locked=true
+PE3.Mode=SAI_B_SyncSlave
+PE3.PinAttribute=Appli
+PE3.Signal=SAI1_SD_B
+PE4.GPIOParameters=PinAttribute
+PE4.Mode=Slave_8_bits_External_Synchro
+PE4.PinAttribute=Appli
+PE4.Signal=DCMIPP_D4
+PE5.GPIOParameters=PinAttribute
+PE5.Mode=Slave_8_bits_External_Synchro
+PE5.PinAttribute=Appli
+PE5.Signal=DCMIPP_D6
+PE6.GPIOParameters=PinAttribute
+PE6.Mode=Full_Duplex_Master
+PE6.PinAttribute=Appli
+PE6.Signal=SPI4_MOSI
+PE7.GPIOParameters=PinAttribute
+PE7.Locked=true
+PE7.Mode=SAI_B_MasterWithClock
+PE7.PinAttribute=Appli
+PE7.Signal=SAI2_SD_B
+PE9.GPIOParameters=PinAttribute
+PE9.Locked=true
+PE9.Mode=CTS_RTS
+PE9.PinAttribute=Appli
+PE9.Signal=UART7_RTS
+PF0.GPIOParameters=PinAttribute
+PF0.Locked=true
+PF0.Mode=I2C
+PF0.PinAttribute=Appli
+PF0.Signal=I2C2_SDA
+PF1.GPIOParameters=PinAttribute
+PF1.Locked=true
+PF1.Mode=I2C
+PF1.PinAttribute=Appli
+PF1.Signal=I2C2_SCL
+PF10.GPIOParameters=PinAttribute
+PF10.Locked=true
+PF10.Mode=RGB888
+PF10.PinAttribute=Appli
+PF10.Signal=LTDC_R1
+PF11.GPIOParameters=PinAttribute
+PF11.Locked=true
+PF11.Mode=RGB888
+PF11.PinAttribute=Appli
+PF11.Signal=LTDC_B0
+PF12.GPIOParameters=PinAttribute
+PF12.Locked=true
+PF12.Mode=Asynchronous
+PF12.PinAttribute=Appli
+PF12.Signal=USART1_RX
+PF13.GPIOParameters=PinAttribute
+PF13.Locked=true
+PF13.Mode=Asynchronous
+PF13.PinAttribute=Appli
+PF13.Signal=USART1_TX
+PF14.GPIOParameters=PinAttribute
+PF14.Locked=true
+PF14.Mode=RGB888
+PF14.PinAttribute=Appli
+PF14.Signal=LTDC_G0
+PF15.GPIOParameters=PinAttribute
+PF15.Locked=true
+PF15.Mode=RGB888
+PF15.PinAttribute=Appli
+PF15.Signal=LTDC_G1
+PF6.GPIOParameters=PinAttribute
+PF6.Mode=NSS_Signal_Hard_Output
+PF6.PinAttribute=Appli
+PF6.Signal=SPI5_NSS
+PF7.GPIOParameters=PinAttribute
+PF7.Mode=Full_Duplex_Master
+PF7.PinAttribute=Appli
+PF7.Signal=SPI5_SCK
+PF9.GPIOParameters=PinAttribute
+PF9.Locked=true
+PF9.Mode=RGB888
+PF9.PinAttribute=Appli
+PF9.Signal=LTDC_R0
+PG0.GPIOParameters=PinAttribute
+PG0.Locked=true
+PG0.Mode=RGB888
+PG0.PinAttribute=Appli
+PG0.Signal=LTDC_R7
+PG1.GPIOParameters=PinAttribute
+PG1.Locked=true
+PG1.Mode=RGB888
+PG1.PinAttribute=Appli
+PG1.Signal=LTDC_R6
+PG11.GPIOParameters=PinAttribute
+PG11.Locked=true
+PG11.Mode=mmc_4_bits_Wide_bus
+PG11.PinAttribute=Appli
+PG11.Signal=SDMMC2_D2
+PG12.GPIOParameters=PinAttribute
+PG12.Locked=true
+PG12.Mode=mmc_4_bits_Wide_bus
+PG12.PinAttribute=Appli
+PG12.Signal=SDMMC2_D3
+PG13.GPIOParameters=PinAttribute
+PG13.Locked=true
+PG13.Mode=RGB888
+PG13.PinAttribute=Appli
+PG13.Signal=LTDC_CLK
+PG14.GPIOParameters=PinAttribute
+PG14.Locked=true
+PG14.Mode=RGB888
+PG14.PinAttribute=Appli
+PG14.Signal=LTDC_B1
+PG2.GPIOParameters=PinAttribute
+PG2.Locked=true
+PG2.Mode=RGB888
+PG2.PinAttribute=Appli
+PG2.Signal=LTDC_HSYNC
+PG3.GPIOParameters=PinAttribute
+PG3.Mode=Slave_8_bits_External_Synchro
+PG3.PinAttribute=Appli
+PG3.Signal=DCMIPP_HSYNC
+PH0-OSC_IN(PH0).Mode=HSE-External-Oscillator
+PH0-OSC_IN(PH0).Signal=RCC_OSC_IN
+PH1-OSC_OUT(PH1).Mode=HSE-External-Oscillator
+PH1-OSC_OUT(PH1).Signal=RCC_OSC_OUT
+PM11.GPIOParameters=PinAttribute
+PM11.Locked=true
+PM11.Mode=Device_Only
+PM11.PinAttribute=Appli
+PM11.Signal=USB_OTG_FS_DP
+PM12.GPIOParameters=PinAttribute
+PM12.Locked=true
+PM12.Mode=Device_Only
+PM12.PinAttribute=Appli
+PM12.Signal=USB_OTG_FS_DM
+PM13.GPIOParameters=PinAttribute
+PM13.Mode=Full_Duplex_Master
+PM13.PinAttribute=Appli
+PM13.Signal=SPI5_MOSI
+PM14.GPIOParameters=PinAttribute
+PM14.Mode=Full_Duplex_Master
+PM14.PinAttribute=Appli
+PM14.Signal=SPI5_MISO
+PM5.GPIOParameters=PinAttribute
+PM5.Locked=true
+PM5.Mode=Internal_Phy_Device
+PM5.PinAttribute=Appli
+PM5.Signal=USB_OTG_HS_DM
+PM6.GPIOParameters=PinAttribute
+PM6.Locked=true
+PM6.Mode=Internal_Phy_Device
+PM6.PinAttribute=Appli
+PM6.Signal=USB_OTG_HS_DP
+PM8.GPIOParameters=PinAttribute
+PM8.Locked=true
+PM8.Mode=Asynchronous
+PM8.PinAttribute=Appli
+PM8.Signal=UART7_RX
+PM9.GPIOParameters=PinAttribute
+PM9.Locked=true
+PM9.Mode=Asynchronous
+PM9.PinAttribute=Appli
+PM9.Signal=UART7_TX
+PN0.GPIOParameters=PinAttribute
+PN0.Locked=true
+PN0.Mode=XSPI2_Port2Octo
+PN0.PinAttribute=Boot
+PN0.Signal=XSPIM_P2_DQS0
+PN10.GPIOParameters=PinAttribute
+PN10.Locked=true
+PN10.Mode=XSPI2_Port2Octo
+PN10.PinAttribute=Boot
+PN10.Signal=XSPIM_P2_IO6
+PN11.GPIOParameters=PinAttribute
+PN11.Locked=true
+PN11.Mode=XSPI2_Port2Octo
+PN11.PinAttribute=Boot
+PN11.Signal=XSPIM_P2_IO7
+PN2.GPIOParameters=PinAttribute
+PN2.Locked=true
+PN2.Mode=XSPI2_Port2Octo
+PN2.PinAttribute=Boot
+PN2.Signal=XSPIM_P2_IO0
+PN3.GPIOParameters=PinAttribute
+PN3.Locked=true
+PN3.Mode=XSPI2_Port2Octo
+PN3.PinAttribute=Boot
+PN3.Signal=XSPIM_P2_IO1
+PN4.GPIOParameters=PinAttribute
+PN4.Locked=true
+PN4.Mode=XSPI2_Port2Octo
+PN4.PinAttribute=Boot
+PN4.Signal=XSPIM_P2_IO2
+PN5.GPIOParameters=PinAttribute
+PN5.Locked=true
+PN5.Mode=XSPI2_Port2Octo
+PN5.PinAttribute=Boot
+PN5.Signal=XSPIM_P2_IO3
+PN6.GPIOParameters=PinAttribute
+PN6.Locked=true
+PN6.Mode=XSPI2_Port2Octo
+PN6.PinAttribute=Boot
+PN6.Signal=XSPIM_P2_CLK
+PN8.GPIOParameters=PinAttribute
+PN8.Locked=true
+PN8.Mode=XSPI2_Port2Octo
+PN8.PinAttribute=Boot
+PN8.Signal=XSPIM_P2_IO4
+PN9.GPIOParameters=PinAttribute
+PN9.Locked=true
+PN9.Mode=XSPI2_Port2Octo
+PN9.PinAttribute=Boot
+PN9.Signal=XSPIM_P2_IO5
+PO1.GPIOParameters=PinAttribute
+PO1.Locked=true
+PO1.PinAttribute=Free
+PO1.Signal=GPIO_Output
+PO2.GPIOParameters=PinAttribute
+PO2.Locked=true
+PO2.Mode=XSPI1_Port1Hexa
+PO2.PinAttribute=Boot
+PO2.Signal=XSPIM_P1_DQS0
+PO3.GPIOParameters=PinAttribute
+PO3.Locked=true
+PO3.Mode=XSPI1_Port1Hexa
+PO3.PinAttribute=Boot
+PO3.Signal=XSPIM_P1_DQS1
+PO4.GPIOParameters=PinAttribute
+PO4.Locked=true
+PO4.Mode=XSPI1_Port1Hexa
+PO4.PinAttribute=Boot
+PO4.Signal=XSPIM_P1_CLK
+PO5.GPIOParameters=GPIO_PuPd,GPIO_Label,GPIO_ModeDefaultOutputPP,PinAttribute
+PO5.GPIO_Label=PIN_BLUE_LED
+PO5.GPIO_ModeDefaultOutputPP=GPIO_MODE_OUTPUT_OD
+PO5.GPIO_PuPd=GPIO_PULLUP
+PO5.Locked=true
+PO5.PinAttribute=Free
+PO5.Signal=GPIO_Output
+PP0.GPIOParameters=PinAttribute
+PP0.Locked=true
+PP0.Mode=XSPI1_Port1Hexa
+PP0.PinAttribute=Boot
+PP0.Signal=XSPIM_P1_IO0
+PP1.GPIOParameters=PinAttribute
+PP1.Locked=true
+PP1.Mode=XSPI1_Port1Hexa
+PP1.PinAttribute=Boot
+PP1.Signal=XSPIM_P1_IO1
+PP10.GPIOParameters=PinAttribute
+PP10.Locked=true
+PP10.Mode=XSPI1_Port1Hexa
+PP10.PinAttribute=Boot
+PP10.Signal=XSPIM_P1_IO10
+PP11.GPIOParameters=PinAttribute
+PP11.Locked=true
+PP11.Mode=XSPI1_Port1Hexa
+PP11.PinAttribute=Boot
+PP11.Signal=XSPIM_P1_IO11
+PP12.GPIOParameters=PinAttribute
+PP12.Locked=true
+PP12.Mode=XSPI1_Port1Hexa
+PP12.PinAttribute=Boot
+PP12.Signal=XSPIM_P1_IO12
+PP13.GPIOParameters=PinAttribute
+PP13.Locked=true
+PP13.Mode=XSPI1_Port1Hexa
+PP13.PinAttribute=Boot
+PP13.Signal=XSPIM_P1_IO13
+PP14.GPIOParameters=PinAttribute
+PP14.Mode=XSPI1_Port1Hexa
+PP14.PinAttribute=Boot
+PP14.Signal=XSPIM_P1_IO14
+PP15.GPIOParameters=PinAttribute
+PP15.Locked=true
+PP15.Mode=XSPI1_Port1Hexa
+PP15.PinAttribute=Boot
+PP15.Signal=XSPIM_P1_IO15
+PP2.GPIOParameters=PinAttribute
+PP2.Locked=true
+PP2.Mode=XSPI1_Port1Hexa
+PP2.PinAttribute=Boot
+PP2.Signal=XSPIM_P1_IO2
+PP3.GPIOParameters=PinAttribute
+PP3.Locked=true
+PP3.Mode=XSPI1_Port1Hexa
+PP3.PinAttribute=Boot
+PP3.Signal=XSPIM_P1_IO3
+PP4.GPIOParameters=PinAttribute
+PP4.Locked=true
+PP4.Mode=XSPI1_Port1Hexa
+PP4.PinAttribute=Boot
+PP4.Signal=XSPIM_P1_IO4
+PP5.GPIOParameters=PinAttribute
+PP5.Locked=true
+PP5.Mode=XSPI1_Port1Hexa
+PP5.PinAttribute=Boot
+PP5.Signal=XSPIM_P1_IO5
+PP6.GPIOParameters=PinAttribute
+PP6.Locked=true
+PP6.Mode=XSPI1_Port1Hexa
+PP6.PinAttribute=Boot
+PP6.Signal=XSPIM_P1_IO6
+PP7.GPIOParameters=PinAttribute
+PP7.Locked=true
+PP7.Mode=XSPI1_Port1Hexa
+PP7.PinAttribute=Boot
+PP7.Signal=XSPIM_P1_IO7
+PP8.GPIOParameters=PinAttribute
+PP8.Locked=true
+PP8.Mode=XSPI1_Port1Hexa
+PP8.PinAttribute=Boot
+PP8.Signal=XSPIM_P1_IO8
+PP9.GPIOParameters=PinAttribute
+PP9.Locked=true
+PP9.Mode=XSPI1_Port1Hexa
+PP9.PinAttribute=Boot
+PP9.Signal=XSPIM_P1_IO9
+PinOutPanel.CurrentBGAView=Top
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerLinker=GCC
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32H7R7L8HxH
+ProjectManager.FirmwarePackage=STM32Cube FW_H7RS V1.2.0
+ProjectManager.FreePins=false
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=App-0x200,Boot-0x200,ExtMemLoader-0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=0
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=CubeMX_Config.ioc
+ProjectManager.ProjectName=CubeMX_Config
+ProjectManager.ProjectStructure=Boot\:Boot Project\:false;App\:Appli Project\:true;ExtMemLoader\:ExtMemLoader Project\:false;
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=App-0x400,Boot-0x400,ExtMemLoader-0x400
+ProjectManager.TargetToolchain=CMake
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false-Boot,2-MX_GPIO_Init-GPIO-false-HAL-true-Boot,3-MX_ADC1_Init-ADC1-false-HAL-true-Boot,4-MX_UART4_Init-UART4-false-HAL-true-Boot,5-MX_XSPI1_Init-XSPI1-false-HAL-true-Boot,6-MX_XSPI2_Init-XSPI2-false-HAL-true-Boot,7-MX_DTS_Init-DTS-false-HAL-true-Boot,8-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true-Boot,1-SystemClock_Config-RCC-false-HAL-false-Appli,2-MX_GPIO_Init-GPIO-false-HAL-true-Appli,3-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true-Appli,4-MX_UART4_Init-UART4-false-HAL-true-Appli,5-MX_DCMIPP_Init-DCMIPP-false-HAL-true-Appli,6-MX_FLASH_Init-FLASH-false-HAL-true-Appli,7-MX_I2C1_Init-I2C1-false-HAL-true-Appli,8-MX_I2C2_Init-I2C2-false-HAL-true-Appli,9-MX_LTDC_Init-LTDC-false-HAL-true-Appli,10-MX_SAI1_Init-SAI1-false-HAL-true-Appli,11-MX_SAI2_Init-SAI2-false-HAL-true-Appli,12-MX_SDMMC2_MMC_Init-SDMMC2-false-HAL-true-Appli,13-MX_SPI2_Init-SPI2-false-HAL-true-Appli,14-MX_SPI4_Init-SPI4-false-HAL-true-Appli,15-MX_SPI5_Init-SPI5-false-HAL-true-Appli,16-MX_UART7_Init-UART7-false-HAL-true-Appli,17-MX_USB_OTG_FS_PCD_Init-USB_OTG_FS-false-HAL-true-Appli,18-MX_USB_OTG_HS_PCD_Init-USB_OTG_HS-false-HAL-true-Appli,19-MX_USART1_UART_Init-USART1-false-HAL-true-Appli,0-MX_CORTEX_M7_BOOT_Init-CORTEX_M7_BOOT-false-HAL-true-Boot,0-MX_VREFBUF_Init-VREFBUF-false-HAL-true-Boot,0-MX_CORTEX_M7_APPLI_Init-CORTEX_M7_APPLI-false-HAL-true-Appli,1-SystemClock_Config-RCC-false-HAL-false-ExtMemLoader,2-MX_GPIO_Init-GPIO-false-HAL-true-ExtMemLoader,3-MX_UART4_Init-UART4-false-HAL-true-ExtMemLoader
+RCC.ADCFreq_Value=400000000
+RCC.ADFFreq_Value=300000000
+RCC.AHB1234Freq_Value=300000000
+RCC.AHB5ClockFreq_Value=300000000
+RCC.APB1Freq_Value=150000000
+RCC.APB2Freq_Value=150000000
+RCC.APB4Freq_Value=150000000
+RCC.APB5Freq_Value=150000000
+RCC.AXIClockFreq_Value=300000000
+RCC.BMPRE=RCC_HCLK_DIV2
+RCC.CECFreq_Value=32768
+RCC.CKPERFreq_Value=64000000
+RCC.CPREFreq_Value=600000000
+RCC.CortexFreq_Value=600000000
+RCC.CpuClockFreq_Value=600000000
+RCC.DIVM1=4
+RCC.DIVM2=4
+RCC.DIVM3=4
+RCC.DIVN1=37
+RCC.DIVN2=25
+RCC.DIVN3=25
+RCC.DIVP1=1
+RCC.DIVP1Freq_Value=600000000
+RCC.DIVP2=1
+RCC.DIVP2Freq_Value=400000000
+RCC.DIVP3Freq_Value=200000000
+RCC.DIVQ1Freq_Value=300000000
+RCC.DIVQ2Freq_Value=200000000
+RCC.DIVQ3Freq_Value=200000000
+RCC.DIVR1Freq_Value=300000000
+RCC.DIVR2Freq_Value=200000000
+RCC.DIVR3=1
+RCC.DIVR3Freq_Value=400000000
+RCC.DIVS1Freq_Value=300000000
+RCC.DIVS2Freq_Value=200000000
+RCC.DIVS3Freq_Value=200000000
+RCC.DIVT1Freq_Value=300000000
+RCC.DIVT2Freq_Value=200000000
+RCC.DIVT3Freq_Value=200000000
+RCC.DTSFreq_Value=32768
+RCC.ETH1Freq_Value=12288000
+RCC.ETHPHYFreq_Value=24000000
+RCC.FDCANFreq_Value=24000000
+RCC.FMCFreq_Value=300000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=300000000
+RCC.I2C23Freq_Value=150000000
+RCC.I2CI3C1Freq_Value=150000000
+RCC.IPParameters=ADCFreq_Value,ADFFreq_Value,AHB1234Freq_Value,AHB5ClockFreq_Value,APB1Freq_Value,APB2Freq_Value,APB4Freq_Value,APB5Freq_Value,AXIClockFreq_Value,BMPRE,CECFreq_Value,CKPERFreq_Value,CPREFreq_Value,CortexFreq_Value,CpuClockFreq_Value,DIVM1,DIVM2,DIVM3,DIVN1,DIVN2,DIVN3,DIVP1,DIVP1Freq_Value,DIVP2,DIVP2Freq_Value,DIVP3Freq_Value,DIVQ1Freq_Value,DIVQ2Freq_Value,DIVQ3Freq_Value,DIVR1Freq_Value,DIVR2Freq_Value,DIVR3,DIVR3Freq_Value,DIVS1Freq_Value,DIVS2Freq_Value,DIVS3Freq_Value,DIVT1Freq_Value,DIVT2Freq_Value,DIVT3Freq_Value,DTSFreq_Value,ETH1Freq_Value,ETHPHYFreq_Value,FDCANFreq_Value,FMCFreq_Value,FamilyName,HCLKFreq_Value,I2C23Freq_Value,I2CI3C1Freq_Value,LPTIM1Freq_Value,LPTIM23Freq_Value,LPTIM45Freq_Value,LPUART1Freq_Value,LTDCFreq_Value,MCO1PinFreq_Value,MCO2PinFreq_Value,OSPI1Freq_Value,OSPI2Freq_Value,PLL2FRACN,PLL3FRACN,PLLFRACN,PPRE1,PPRE2,PPRE4,PPRE5,PSSIFreq_Value,RTCFreq_Value,SAI1Freq_Value,SAI2Freq_Value,SDMMCFreq_Value,SPDIFRXFreq_Value,SPI1Freq_Value,SPI23Freq_Value,SPI45Freq_Value,SPI6Freq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TPIUFreq_Value,Tim1OutputFreq_Value,Tim2OutputFreq_Value,UCPDFreq_Value,USART1Freq_Value,USART234578Freq_Value,USBOFSFreq_Value,USBPHYFreq_Value,VCO1OutputFreq_Value,VCO2OutputFreq_Value,VCO3OutputFreq_Value,VCOInput1Freq_Value,VCOInput2Freq_Value,VCOInput3Freq_Value,Xspi1ClockSelection,Xspi2ClockSelection
+RCC.LPTIM1Freq_Value=150000000
+RCC.LPTIM23Freq_Value=150000000
+RCC.LPTIM45Freq_Value=150000000
+RCC.LPUART1Freq_Value=150000000
+RCC.LTDCFreq_Value=400000000
+RCC.MCO1PinFreq_Value=64000000
+RCC.MCO2PinFreq_Value=600000000
+RCC.OSPI1Freq_Value=200000000
+RCC.OSPI2Freq_Value=200000000
+RCC.PLL2FRACN=0
+RCC.PLL3FRACN=0
+RCC.PLLFRACN=4096
+RCC.PPRE1=RCC_APB1_DIV2
+RCC.PPRE2=RCC_APB2_DIV2
+RCC.PPRE4=RCC_APB4_DIV2
+RCC.PPRE5=RCC_APB5_DIV2
+RCC.PSSIFreq_Value=400000000
+RCC.RTCFreq_Value=32000
+RCC.SAI1Freq_Value=300000000
+RCC.SAI2Freq_Value=300000000
+RCC.SDMMCFreq_Value=200000000
+RCC.SPDIFRXFreq_Value=300000000
+RCC.SPI1Freq_Value=300000000
+RCC.SPI23Freq_Value=300000000
+RCC.SPI45Freq_Value=150000000
+RCC.SPI6Freq_Value=150000000
+RCC.SYSCLKFreq_VALUE=600000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.TPIUFreq_Value=200000000
+RCC.Tim1OutputFreq_Value=300000000
+RCC.Tim2OutputFreq_Value=300000000
+RCC.UCPDFreq_Value=16000000
+RCC.USART1Freq_Value=150000000
+RCC.USART234578Freq_Value=150000000
+RCC.USBOFSFreq_Value=48000000
+RCC.USBPHYFreq_Value=24000000
+RCC.VCO1OutputFreq_Value=600000000
+RCC.VCO2OutputFreq_Value=400000000
+RCC.VCO3OutputFreq_Value=400000000
+RCC.VCOInput1Freq_Value=16000000
+RCC.VCOInput2Freq_Value=16000000
+RCC.VCOInput3Freq_Value=16000000
+RCC.Xspi1ClockSelection=RCC_XSPI1CLKSOURCE_PLL2S
+RCC.Xspi2ClockSelection=RCC_XSPI2CLKSOURCE_PLL2S
+SAI1.Activation=ENABLE
+SAI1.ErrorAudioFreq-PDM_Master_Mode_CK1=1.72 %
+SAI1.IPParameters=Instance-PDM_Master_Mode_CK1,VirtualMode-PDM_Master_Mode_CK1,MckOutput-PDM_Master_Mode_CK1,VirtualProtocol-PDM_Master_Mode_CK1,Activation,RealAudioFreq-PDM_Master_Mode_CK1,ErrorAudioFreq-PDM_Master_Mode_CK1,Instance-SAI_B_SyncSlave,VirtualMode-SAI_B_SyncSlave
+SAI1.Instance-PDM_Master_Mode_CK1=SAI$Index_Block_A
+SAI1.Instance-SAI_B_SyncSlave=SAI$Index_Block_B
+SAI1.MckOutput-PDM_Master_Mode_CK1=SAI_MCK_OUTPUT_DISABLE
+SAI1.RealAudioFreq-PDM_Master_Mode_CK1=195.312 KHz
+SAI1.VirtualMode-PDM_Master_Mode_CK1=VM_MASTER
+SAI1.VirtualMode-SAI_B_SyncSlave=VM_SLAVE
+SAI1.VirtualProtocol-PDM_Master_Mode_CK1=VM_PDM_PROTOCOL
+SAI2.ErrorAudioFreq=1.72 %
+SAI2.IPParameters=Instance,VirtualMode,MckOutput,RealAudioFreq,ErrorAudioFreq
+SAI2.Instance=SAI$Index_Block_B
+SAI2.MckOutput=SAI_MCK_OUTPUT_ENABLE
+SAI2.RealAudioFreq=195.312 KHz
+SAI2.VirtualMode=VM_MASTER
+SH.ADCx_INP15.0=ADC1_INP15,IN15-Single-Ended
+SH.ADCx_INP15.ConfNb=1
+SPI2.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
+SPI2.CalculateBaudRate=150.0 MBits/s
+SPI2.Direction=SPI_DIRECTION_2LINES
+SPI2.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
+SPI2.Mode=SPI_MODE_MASTER
+SPI2.VirtualType=VM_MASTER
+SPI4.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
+SPI4.CalculateBaudRate=75.0 MBits/s
+SPI4.Direction=SPI_DIRECTION_2LINES
+SPI4.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,BaudRatePrescaler
+SPI4.Mode=SPI_MODE_MASTER
+SPI4.VirtualType=VM_MASTER
+SPI5.BaudRatePrescaler=SPI_BAUDRATEPRESCALER_2
+SPI5.CalculateBaudRate=75.0 MBits/s
+SPI5.Direction=SPI_DIRECTION_2LINES
+SPI5.IPParameters=VirtualType,Mode,Direction,CalculateBaudRate,VirtualNSS,BaudRatePrescaler
+SPI5.Mode=SPI_MODE_MASTER
+SPI5.VirtualNSS=VM_NSSHARD
+SPI5.VirtualType=VM_MASTER
+USART1.IPParameters=VirtualMode,VirtualMode-Asynchronous
+USART1.VirtualMode=VM_ASYNC
+USART1.VirtualMode-Asynchronous=VM_ASYNC
+USB_OTG_FS.IPParameters=VirtualMode
+USB_OTG_FS.VirtualMode=Device_Only
+USB_OTG_HS.IPParameters=VirtualMode
+USB_OTG_HS.VirtualMode=Device_HS
+VP_ADC1_TempSens_Input.Mode=IN-TempSens
+VP_ADC1_TempSens_Input.Signal=ADC1_TempSens_Input
+VP_ADC1_Vref_Input.Mode=IN-Vrefint
+VP_ADC1_Vref_Input.Signal=ADC1_Vref_Input
+VP_DTS_VS-DTS.Mode=DTS
+VP_DTS_VS-DTS.Signal=DTS_VS-DTS
+VP_FLASH_SIG_Activate_FlashIP.Mode=Activate_FlashIP
+VP_FLASH_SIG_Activate_FlashIP.Signal=FLASH_SIG_Activate_FlashIP
+VP_MEMORYMAP_VS_MEMORYMAP.Mode=CurAppReg
+VP_MEMORYMAP_VS_MEMORYMAP.Signal=MEMORYMAP_VS_MEMORYMAP
+VP_VREFBUF_V_VREFBUF.Mode=ExternalMode
+VP_VREFBUF_V_VREFBUF.Signal=VREFBUF_V_VREFBUF
+VP_XSPI1_VS_hexa.Mode=hyperbus16_mode
+VP_XSPI1_VS_hexa.Signal=XSPI1_VS_hexa
+VP_XSPI2_VS_octo.Mode=octo_mode
+VP_XSPI2_VS_octo.Signal=XSPI2_VS_octo
+board=custom

bsp/stm32/stm32h7r7-artpi2/board/Kconfig

@@ -0,0 +1,278 @@
+menu "Hardware Drivers Config"
+
+menu "Onboard Peripheral Drivers"
+
+    config BSP_USING_USB_TO_USART
+        bool "Enable Debuger USART (uart4)"
+        select BSP_USING_UART
+        select BSP_USING_UART4
+        default n
+
+    menuconfig BSP_USING_FS
+        bool "Enable filesystem"
+        select RT_USING_DFS
+        select RT_USING_DFS_ROMFS
+        default n
+        if BSP_USING_FS
+            config BSP_USING_SDCARD_FS
+                bool "Enable SDCARD filesystem"
+                select BSP_USING_SDIO_ARTPI
+                select BSP_USING_SDIO1
+                select RT_USING_DFS_ELMFAT
+                default n
+            config BSP_USING_SPI_FLASH_FS
+                bool "Enable SPI FLASH filesystem"
+                select BSP_USING_SPI_FLASH
+                select RT_USING_MTD_NOR
+                select PKG_USING_LITTLEFS
+                default n
+        endif
+
+endmenu
+
+menu "On-chip Peripheral Drivers"
+
+    config BSP_USING_SDIO
+        bool "Enable SDIO"
+        default n
+        select RT_USING_SDIO
+        if BSP_USING_SDIO
+            config BSP_USING_SDIO1
+                bool "Enable SDIO1"
+                default n
+            config BSP_USING_SDIO2
+                bool "Enable SDIO2"
+                default n
+        endif
+
+    config BSP_USING_GPIO
+        bool "Enable GPIO"
+        select RT_USING_PIN
+        default y
+
+    menuconfig BSP_USING_UART
+        bool "Enable UART"
+        default n
+        select RT_USING_SERIAL
+        if BSP_USING_UART
+            config BSP_STM32_UART_V1_TX_TIMEOUT
+                int "UART TX timeout"
+                default 6000
+                depends on RT_USING_SERIAL_V1
+                
+            menuconfig BSP_USING_UART1
+                bool "Enable UART1"
+                default n
+                if BSP_USING_UART1
+                    config BSP_UART1_RX_USING_DMA
+                        bool "Enable UART1 RX DMA"
+                        select RT_SERIAL_USING_DMA
+                        default n
+
+                    config BSP_UART1_TX_USING_DMA
+                        bool "Enable UART1 TX DMA"
+                        select RT_SERIAL_USING_DMA
+                        default n
+
+                    config BSP_UART1_RX_BUFSIZE
+                        int "Set UART1 RX buffer size"
+                        range 64 65535
+                        depends on BSP_USING_UART1
+                        default 256
+
+                    config BSP_UART1_TX_BUFSIZE
+                        int "Set UART1 TX buffer size"
+                        range 0 65535
+                        depends on BSP_USING_UART1
+                        default 0
+
+                    config BSP_UART1_DMA_PING_BUFSIZE
+                        int "Set UART1 RX DMA ping-pong buffer size"
+                        range 32 65535
+                        depends on RT_USING_SERIAL_V2 && BSP_UART1_RX_USING_DMA
+                        default 64  
+                endif
+
+            menuconfig BSP_USING_UART3
+                bool "Enable UART3"
+                default n
+                if BSP_USING_UART3
+                    config BSP_UART3_RX_BUFSIZE
+                        int "Set UART3 RX buffer size"
+                        range 64 65535
+                        depends on BSP_USING_UART3
+                        default 256
+
+                    config BSP_UART3_TX_BUFSIZE
+                        int "Set UART3 TX buffer size"
+                        range 0 65535
+                        depends on BSP_USING_UART3
+                        default 0
+                endif
+
+            menuconfig BSP_USING_UART4
+                bool "Enable UART4"
+                default n
+                if BSP_USING_UART4
+                    config BSP_UART4_RX_USING_DMA
+                        bool "Enable UART4 RX DMA"
+                        select RT_SERIAL_USING_DMA
+                        default n
+
+                    config BSP_UART4_TX_USING_DMA
+                        bool "Enable UART4 TX DMA"
+                        select RT_SERIAL_USING_DMA
+                        default n
+
+                    config BSP_UART4_RX_BUFSIZE
+                        int "Set UART4 RX buffer size"
+                        range 64 65535
+                        depends on BSP_USING_UART4
+                        default 256
+
+                    config BSP_UART4_TX_BUFSIZE
+                        int "Set UART4 TX buffer size"
+                        range 0 65535
+                        depends on BSP_USING_UART4
+                        default 0
+
+                    config BSP_UART4_DMA_PING_BUFSIZE
+                        int "Set UART4 RX DMA ping-pong buffer size"
+                        range 32 65535
+                        depends on RT_USING_SERIAL_V2 && BSP_UART4_RX_USING_DMA
+                        default 64                        
+                endif
+
+            menuconfig BSP_USING_UART6
+                bool "Enable UART6"
+                default n
+                if BSP_USING_UART6
+                    config BSP_UART6_RX_BUFSIZE
+                        int "Set UART6 RX buffer size"
+                        range 64 65535
+                        depends on BSP_USING_UART6
+                        default 256
+
+                    config BSP_UART6_TX_BUFSIZE
+                        int "Set UART6 TX buffer size"
+                        range 0 65535
+                        depends on BSP_USING_UART6
+                        default 0
+
+                endif
+        endif
+
+    menuconfig BSP_USING_SPI
+        bool "Enable SPI"
+        default n
+        select RT_USING_SPI
+        if BSP_USING_SPI
+            config BSP_USING_SPI1
+                bool "Enable SPI1"
+                default n
+            config BSP_USING_SPI2
+                bool "Enable SPI2"
+                default n
+            config BSP_USING_SPI3
+                bool "Enable SPI3"
+                default n
+            config BSP_USING_SPI4
+                bool "Enable SPI4"
+                default n
+            config BSP_USING_SPI5
+                bool "Enable SPI5"
+                default n
+            config BSP_USING_SPI6
+                bool "Enable SPI6"
+                default n
+        endif
+
+    config BSP_USING_ONCHIP_RTC
+        bool "Enable Onchip RTC"
+        select RT_USING_RTC
+        default n
+
+    menuconfig BSP_USING_I2C
+        bool "Enable I2C BUS (software simulation)"
+        select RT_USING_I2C
+        select RT_USING_I2C_BITOPS
+        select RT_USING_PIN
+        default n
+        if BSP_USING_I2C
+            menuconfig BSP_USING_I2C1
+                bool "Enable I2C1 BUS (software simulation)"
+                default n
+                select RT_USING_I2C
+                select RT_USING_I2C_BITOPS
+                select RT_USING_PIN
+                if BSP_USING_I2C1
+                    comment "Notice: PB6 --> 22; PB7 --> 23"
+                    config BSP_I2C1_SCL_PIN
+                        int "I2C1 scl pin number"
+                        range 0 175
+                        default 22
+                    config BSP_I2C1_SDA_PIN
+                        int "I2C1 sda pin number"
+                        range 0 175
+                        default 23
+                endif
+            menuconfig BSP_USING_I2C2
+                bool "Enable I2C2 BUS (software simulation)"
+                default n
+                if BSP_USING_I2C2
+                    comment "Notice: PH13 --> 125; PH15 --> 127"
+                    config BSP_I2C2_SCL_PIN
+                        int "i2c2 scl pin number"
+                        range 1 176
+                        default 127
+                    config BSP_I2C2_SDA_PIN
+                        int "I2C2 sda pin number"
+                        range 0 175
+                        default 125
+                endif
+            menuconfig BSP_USING_I2C3
+                bool "Enable I2C3 BUS (software simulation)"
+                default n
+                if BSP_USING_I2C3
+                    comment "Notice: PH12 --> 124; PH11 --> 123"
+                    config BSP_I2C3_SCL_PIN
+                        int "i2c3 scl pin number"
+                        range 0 175
+                        default 123
+                    config BSP_I2C3_SDA_PIN
+                        int "I2C3 sda pin number"
+                        range 0 175
+                        default 124
+                endif
+        endif
+
+    config BSP_USING_USBD
+        bool "Enable USB Device"
+        select RT_USING_USB_DEVICE
+        default n
+
+    menuconfig BSP_USING_USBH
+        bool "Enable USB Host"
+        select RT_USING_USB_HOST
+        default n
+        if BSP_USING_USBH
+            menuconfig RT_USBH_MSTORAGE
+                bool "Enable Udisk Drivers"
+                select RT_USING_DFS
+                select RT_USING_DFS_ELMFAT
+                default n
+                if RT_USBH_MSTORAGE
+                    config UDISK_MOUNTPOINT
+                        string "Udisk mount dir"
+                        default "/"
+                endif
+        endif
+
+    config BSP_USING_LTDC
+        bool
+        default n
+    source "$(BSP_DIR)/../libraries/HAL_Drivers/drivers/Kconfig"
+
+endmenu
+
+endmenu

bsp/stm32/stm32h7r7-artpi2/board/SConscript

@@ -0,0 +1,27 @@
+import os
+from building import *
+
+cwd = GetCurrentDir()
+
+# add the general drivers.
+src = Glob('board.c')
+
+# add cubemx drivers
+src += Split('''
+CubeMX_Config/Appli/Core/Src/stm32h7rsxx_hal_msp.c
+''')
+
+path = [cwd]
+path += [cwd + '/CubeMX_Config/Appli/Core/Inc']
+
+CPPDEFINES = ['STM32H7S7xx']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+# if os.path.isfile(os.path.join(cwd, "ports", 'SConscript')):
+#     group = group + SConscript(os.path.join("ports", 'SConscript'))
+list = os.listdir(cwd)
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        group = group + SConscript(os.path.join(item, 'SConscript'))
+
+Return('group')

bsp/stm32/stm32h7r7-artpi2/board/board.c

@@ -0,0 +1,38 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-04-10     RealThread   first version
+ */
+
+#include "board.h"
+
+#define DBG_TAG "board"
+#define DBG_LVL DBG_INFO
+#include <rtdbg.h>
+/**
+  * @brief System Clock Configuration
+  * @retval None
+  */
+void SystemClock_Config(void)
+{
+    //Notice: system main clock is set in user boot stage.
+    //you can modify it but be aware on XPI1 and XPI2 status.
+    return;
+}
+
+int clock_information(void)
+{
+    LOG_I("System Clock information");
+    LOG_I("SYSCLK_Frequency = %d", HAL_RCC_GetSysClockFreq());
+    LOG_I("HCLK_Frequency   = %d", HAL_RCC_GetHCLKFreq());
+    LOG_I("PCLK1_Frequency  = %d", HAL_RCC_GetPCLK1Freq());
+    LOG_I("PCLK2_Frequency  = %d", HAL_RCC_GetPCLK2Freq());
+    LOG_I("XSPI1_Frequency  = %d", HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_XSPI1));
+    LOG_I("XSPI2_Frequency  = %d", HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_XSPI2));
+    return RT_EOK;
+}
+INIT_BOARD_EXPORT(clock_information);

bsp/stm32/stm32h7r7-artpi2/board/board.h

@@ -0,0 +1,103 @@
+/*
+ * Copyright (c) 2006-2022, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2024-04-10     RealThread   first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <rtthread.h>
+#include <stm32h7rsxx.h>
+#include "drv_common.h"
+#include "drv_gpio.h"
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*-------------------------- CHIP CONFIG BEGIN --------------------------*/
+
+#define CHIP_FAMILY_STM32
+#define CHIP_SERIES_STM32H7RS
+#define CHIP_NAME_STM32H750XBHX
+
+/*-------------------------- CHIP CONFIG END --------------------------*/
+
+/*-------------------------- ROM/RAM CONFIG BEGIN --------------------------*/
+/**
+ * @brief H7RS7 SRAM MEMORY Layout
+ * 0x24060000 - 0x23071FFF AXI SRAM shared with ECC
+ * 0x24040000 - 0x2305FFFF AXI SRAM shared with DTCM
+ * 0x24020000 - 0x2403FFFF AXI SRAM
+ * 0x24000000 - 0x2401FFFF AXI SRAM shared with ITCM
+ */
+#define ROM_START              ((uint32_t)0x70000000)
+#define ROM_SIZE               (131072)
+#define ROM_END                ((uint32_t)(ROM_START + ROM_SIZE * 1024))
+
+#define RAM_START              (0x24000000)
+#define RAM_SIZE               (456)
+#define RAM_END                (RAM_START + RAM_SIZE * 1024)
+
+/*-------------------------- ROM/RAM CONFIG END --------------------------*/
+
+/*-------------------------- CLOCK CONFIG BEGIN --------------------------*/
+
+#define BSP_CLOCK_SOURCE                  ("HSE")
+#define BSP_CLOCK_SOURCE_FREQ_MHZ         ((int32_t)0)
+#define BSP_CLOCK_SYSTEM_FREQ_MHZ         ((int32_t)480)
+
+/*-------------------------- CLOCK CONFIG END --------------------------*/
+
+/*-------------------------- UART CONFIG BEGIN --------------------------*/
+
+/** After configuring corresponding UART or UART DMA, you can use it.
+ *
+ * STEP 1, define macro define related to the serial port opening based on the serial port number
+ *                 such as     #define BSP_USING_UATR1
+ *
+ * STEP 2, according to the corresponding pin of serial port, define the related serial port information macro
+ *                 such as     #define BSP_UART1_TX_PIN       "PA9"
+ *                             #define BSP_UART1_RX_PIN       "PA10"
+ *
+ * STEP 3, if you want using SERIAL DMA, you must open it in the RT-Thread Settings.
+ *                 RT-Thread Setting -> Components -> Device Drivers -> Serial Device Drivers -> Enable Serial DMA Mode
+ *
+ * STEP 4, according to serial port number to define serial port tx/rx DMA function in the board.h file
+ *                 such as     #define BSP_UART1_RX_USING_DMA
+ *
+ */
+
+#define STM32_FLASH_START_ADRESS       ROM_START
+#define STM32_FLASH_SIZE               ROM_SIZE
+#define STM32_FLASH_END_ADDRESS        ROM_END
+
+#define STM32_SRAM1_SIZE               RAM_SIZE
+#define STM32_SRAM1_START              RAM_START
+#define STM32_SRAM1_END                RAM_END
+
+#if defined(__ARMCC_VERSION)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      (&Image$$RW_IRAM1$$ZI$$Limit)
+#elif __ICCARM__
+#pragma section="CSTACK"
+#define HEAP_BEGIN      (__segment_end("CSTACK"))
+#else
+extern int __bss_end;
+#define HEAP_BEGIN      (&__bss_end)
+#endif
+
+#define HEAP_END        STM32_SRAM1_END
+
+void SystemClock_Config(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif

bsp/stm32/stm32h7r7-artpi2/board/linker_scripts/link.icf

@@ -0,0 +1,28 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x00020000;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20020000;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x800;
+define symbol __ICFEDIT_size_heap__   = 0x000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite, last block CSTACK};

bsp/stm32/stm32h7r7-artpi2/board/linker_scripts/link.lds

@@ -0,0 +1,177 @@
+/*
+ * linker script for STM32H7S7L8HxH with GNU ld
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+ROM (rx) : ORIGIN =0x70000000,LENGTH =65536K
+RAM (rw) : ORIGIN =0x24000000,LENGTH =455K
+ITCM (rwx)      : ORIGIN = 0x00000000, LENGTH = 64K
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x400;
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+
+        /* section information for utest */
+        . = ALIGN(4);
+        __rt_utest_tc_tab_start = .;
+        KEEP(*(UtestTcTab))
+        __rt_utest_tc_tab_end = .;
+
+        /* section information for at server */
+        . = ALIGN(4);
+        __rtatcmdtab_start = .;
+        KEEP(*(RtAtCmdTab))
+        __rtatcmdtab_end = .;
+        . = ALIGN(4);
+
+        /* section information for modules */
+        . = ALIGN(4);
+        __rtmsymtab_start = .;
+        KEEP(*(RTMSymTab))
+        __rtmsymtab_end = .;
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+
+        . = ALIGN(4);
+
+        PROVIDE(__ctors_start__ = .);
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        PROVIDE(__ctors_end__ = .);
+
+        . = ALIGN(4);
+
+        _etext = .;
+    } > ROM = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > ROM
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+
+        PROVIDE(__dtors_start__ = .);
+        KEEP(*(SORT(.dtors.*)))
+        KEEP(*(.dtors))
+        PROVIDE(__dtors_end__ = .);
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >RAM
+
+    .stack :
+    {
+        . = ALIGN(4);
+        _sstack = .;
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >RAM
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+
+        *(.bss.init)
+    } > RAM
+    __bss_end = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}

bsp/stm32/stm32h7r7-artpi2/board/linker_scripts/link.sct

@@ -0,0 +1,17 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x70000000 0x00800000  {    ; load region size_region
+  ER_IROM1 0x70000000 0x00800000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+   .ANY (+XO)
+  }
+  RW_IRAM1 0x24000000 0x00072000  {  ; AXI SRAM MAXIM 456K
+   .ANY (+RW +ZI)
+  }
+}
+
+

bsp/stm32/stm32h7r7-artpi2/board/port/SConscript

@@ -0,0 +1,22 @@
+import os
+from building import *
+
+objs = []
+cwd  = GetCurrentDir()
+
+# add general drivers
+src = []
+path =  [cwd]
+
+if GetDepend(['BSP_USING_FS']):
+    src += Glob('filesystem.c')
+
+CPPDEFINES = ['STM32H7S7xx']
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
+
+list = os.listdir(cwd)
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        group = group + SConscript(os.path.join(item, 'SConscript'))
+
+Return('group')

bsp/stm32/stm32h7r7-artpi2/board/port/fal_cfg.h

@@ -0,0 +1,54 @@
+/*
+ * File      : fal_cfg.h
+ * This file is part of FAL (Flash Abstraction Layer) package
+ * COPYRIGHT (C) 2006 - 2018, RT-Thread Development Team
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2018-05-17     armink       the first version
+ */
+
+#ifndef _FAL_CFG_H_
+#define _FAL_CFG_H_
+
+#include <rtconfig.h>
+#include <board.h>
+
+#define NOR_FLASH_DEV_NAME             "norflash0"
+
+/* ===================== Flash device Configuration ========================= */
+extern struct fal_flash_dev nor_flash0;
+
+/* flash device table */
+#define FAL_FLASH_DEV_TABLE                                          \
+{                                                                    \
+    &nor_flash0,                                                     \
+}
+/* ====================== Partition Configuration ========================== */
+#ifdef FAL_PART_HAS_TABLE_CFG
+/* partition table */
+#define FAL_PART_TABLE                                                                     \
+{                                                                                          \
+    {FAL_PART_MAGIC_WORD, "wifi_image", NOR_FLASH_DEV_NAME,           0,     512*1024, 0}, \
+    {FAL_PART_MAGIC_WORD, "bt_image",   NOR_FLASH_DEV_NAME,    512*1024,     512*1024, 0}, \
+    {FAL_PART_MAGIC_WORD, "download",   NOR_FLASH_DEV_NAME,   1024*1024,  2*1024*1024, 0}, \
+    {FAL_PART_MAGIC_WORD, "easyflash",  NOR_FLASH_DEV_NAME, 3*1024*1024,  1*1024*1024, 0}, \
+    {FAL_PART_MAGIC_WORD, "filesystem", NOR_FLASH_DEV_NAME, 4*1024*1024, 12*1024*1024, 0}, \
+}
+#endif /* FAL_PART_HAS_TABLE_CFG */
+
+#endif /* _FAL_CFG_H_ */

bsp/stm32/stm32h7r7-artpi2/board/port/filesystem.c

@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author        Notes
+ * 2018-12-13     balanceTWK    add sdcard port file
+ * 2019-06-11     WillianChan   Add SD card hot plug detection
+ */
+
+#include <rtthread.h>
+
+#ifdef BSP_USING_FS
+#if DFS_FILESYSTEMS_MAX < 4
+#error "Please define DFS_FILESYSTEMS_MAX more than 4"
+#endif
+#if DFS_FILESYSTEM_TYPES_MAX < 4
+#error "Please define DFS_FILESYSTEM_TYPES_MAX more than 4"
+#endif
+
+#ifdef BSP_USING_SPI_FLASH_FS
+#include "fal.h"
+#endif
+
+#include <dfs_fs.h>
+#include "dfs_romfs.h"
+#include "drv_sdmmc.h"
+
+#define DBG_TAG "app.filesystem"
+#define DBG_LVL DBG_INFO
+#include <rtdbg.h>
+
+static const struct romfs_dirent _romfs_root[] = {
+//    {ROMFS_DIRENT_DIR, "flash", RT_NULL, 0},
+    {ROMFS_DIRENT_DIR, "sdcard", RT_NULL, 0}};
+
+const struct romfs_dirent romfs_root = {
+    ROMFS_DIRENT_DIR, "/", (rt_uint8_t *)_romfs_root, sizeof(_romfs_root) / sizeof(_romfs_root[0])};
+
+#ifdef BSP_USING_SDCARD_FS
+
+/* SD Card hot plug detection pin */
+#define SD_CHECK_PIN GET_PIN(N, 7)
+
+static void _sdcard_mount(void)
+{
+    rt_device_t device;
+
+    device = rt_device_find("sd0");
+    if (device == NULL)
+    {
+        mmcsd_wait_cd_changed(0);
+        stm32_mmcsd_change();
+        mmcsd_wait_cd_changed(RT_WAITING_FOREVER);
+        device = rt_device_find("sd0");
+    }
+    if (device != RT_NULL)
+    {
+        if (dfs_mount("sd0", "/sdcard", "elm", 0, 0) == RT_EOK)
+        {
+            LOG_I("sd card mount to '/sdcard'");
+        }
+        else
+        {
+            LOG_W("sd card mount to '/sdcard' failed!");
+        }
+    }
+}
+
+static void _sdcard_unmount(void)
+{
+    rt_thread_mdelay(200);
+    dfs_unmount("/sdcard");
+    LOG_I("Unmount \"/sdcard\"");
+
+    mmcsd_wait_cd_changed(0);
+    stm32_mmcsd_change();
+    mmcsd_wait_cd_changed(RT_WAITING_FOREVER);
+}
+
+static void sd_mount(void *parameter)
+{
+    rt_uint8_t re_sd_check_pin = 1;
+    rt_thread_mdelay(200);
+    if (rt_pin_read(SD_CHECK_PIN))
+    {
+        _sdcard_mount();
+    }
+    while (1)
+    {
+        rt_thread_mdelay(200);
+        if (!re_sd_check_pin && (re_sd_check_pin = rt_pin_read(SD_CHECK_PIN)) != 0)
+        {
+            _sdcard_mount();
+        }
+
+        if (re_sd_check_pin && (re_sd_check_pin = rt_pin_read(SD_CHECK_PIN)) == 0)
+        {
+            _sdcard_unmount();
+        }
+    }
+}
+
+#endif /* BSP_USING_SDCARD_FS */
+
+int mount_init(void)
+{
+    if (dfs_mount(RT_NULL, "/", "rom", 0, &(romfs_root)) != 0)
+    {
+        LOG_E("rom mount to '/' failed!");
+    }
+#ifdef BSP_USING_SPI_FLASH_FS
+    struct rt_device *flash_dev = RT_NULL;
+
+#ifndef RT_USING_WIFI
+    fal_init();
+#endif
+
+    flash_dev = fal_mtd_nor_device_create("filesystem");
+
+    if (flash_dev)
+    {
+        //mount filesystem
+        if (dfs_mount(flash_dev->parent.name, "/flash", "lfs", 0, 0) != 0)
+        {
+            LOG_W("mount to '/flash' failed! try to mkfs %s", flash_dev->parent.name);
+            dfs_mkfs("lfs", flash_dev->parent.name);
+            if (dfs_mount(flash_dev->parent.name, "/flash", "lfs", 0, 0) == 0)
+            {
+                LOG_I("mount to '/flash' success!");
+            }
+        }
+        else
+        {
+            LOG_I("mount to '/flash' success!");
+        }
+    }
+    else
+    {
+        LOG_E("Can't create  block device  filesystem or bt_image partition.");
+    }
+
+#endif
+
+#ifdef BSP_USING_SDCARD_FS
+    rt_thread_t tid;
+
+    rt_pin_mode(SD_CHECK_PIN, PIN_MODE_INPUT_PULLUP);
+
+    tid = rt_thread_create("sd_mount", sd_mount, RT_NULL,
+                           2048, RT_THREAD_PRIORITY_MAX - 2, 20);
+    if (tid != RT_NULL)
+    {
+        rt_thread_startup(tid);
+    }
+    else
+    {
+        LOG_E("create sd_mount thread err!");
+    }
+#endif
+    return RT_EOK;
+}
+INIT_APP_EXPORT(mount_init);
+
+#endif /* BSP_USING_FS */

bsp/stm32/stm32h7r7-artpi2/project.uvoptx

@@ -0,0 +1,1225 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt-thread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0STM32H7Rx_64k -FL010000 -FS08000000 -FP0($$Device:STM32H7S7L8Hx$CMSIS\Flash\STM32H7Rx_64k.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U003C00203431511737393330 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FCFFFC -FN2 -FF0STM32H7Rx_64k.FLM -FS08000000 -FL010000 -FP0($$Device:STM32H7S7L8Hx$CMSIS\Flash\STM32H7Rx_64k.FLM) -FF1MX66UW1G45G_STM32H7S78-DK.FLM -FS170000000 -FL18000000 -FP1($$Device:STM32H7S7L8Hx$CMSIS\Flash\MX66UW1G45G_STM32H7S78-DK.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
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+              <FileName>stm32h7rsxx_hal_rcc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_pwr.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_usart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_usart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_dma.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_dma.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_pwr_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_pwr_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_flash.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_cec.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cec.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_sram.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_sram.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_uart_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_flash_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_flash_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_adc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_adc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_xspi.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_xspi.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_uart.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_uart.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_crc.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_crc.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_rcc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_rcc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_crc_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_crc_ex.c</FilePath>
+            </File>
+            <File>
+              <FileName>system_stm32h7rsxx.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\CMSIS\Device\ST\STM32H7RSxx\Source\Templates\system_stm32h7rsxx.c</FilePath>
+            </File>
+            <File>
+              <FileName>stm32h7rsxx_hal_cryp_ex.c</FileName>
+              <FileType>1</FileType>
+              <FilePath>..\libraries\STM32H7RSxx_HAL\STM32H7RSxx_HAL_Driver\Src\stm32h7rsxx_hal_cryp_ex.c</FilePath>
+            </File>
+          </Files>
+        </Group>
+      </Groups>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>

bsp/stm32/stm32h7r7-artpi2/rtconfig.h

@@ -0,0 +1,413 @@
+#ifndef RT_CONFIG_H__
+#define RT_CONFIG_H__
+
+#define SOC_STM32H7RS
+#define SOC_SERIES_STM32H7RS
+
+/* RT-Thread Kernel */
+
+/* klibc options */
+
+/* rt_vsnprintf options */
+
+/* end of rt_vsnprintf options */
+
+/* rt_vsscanf options */
+
+/* end of rt_vsscanf options */
+
+/* rt_memset options */
+
+/* end of rt_memset options */
+
+/* rt_memcpy options */
+
+/* end of rt_memcpy options */
+
+/* rt_memmove options */
+
+/* end of rt_memmove options */
+
+/* rt_memcmp options */
+
+/* end of rt_memcmp options */
+
+/* rt_strstr options */
+
+/* end of rt_strstr options */
+
+/* rt_strcasecmp options */
+
+/* end of rt_strcasecmp options */
+
+/* rt_strncpy options */
+
+/* end of rt_strncpy options */
+
+/* rt_strcpy options */
+
+/* end of rt_strcpy options */
+
+/* rt_strncmp options */
+
+/* end of rt_strncmp options */
+
+/* rt_strcmp options */
+
+/* end of rt_strcmp options */
+
+/* rt_strlen options */
+
+/* end of rt_strlen options */
+
+/* rt_strnlen options */
+
+/* end of rt_strnlen options */
+/* end of klibc options */
+#define RT_NAME_MAX 8
+#define RT_CPUS_NR 1
+#define RT_ALIGN_SIZE 8
+#define RT_THREAD_PRIORITY_32
+#define RT_THREAD_PRIORITY_MAX 32
+#define RT_TICK_PER_SECOND 1000
+#define RT_USING_OVERFLOW_CHECK
+#define RT_USING_HOOK
+#define RT_HOOK_USING_FUNC_PTR
+#define RT_USING_IDLE_HOOK
+#define RT_IDLE_HOOK_LIST_SIZE 4
+#define IDLE_THREAD_STACK_SIZE 256
+
+/* kservice options */
+
+/* end of kservice options */
+#define RT_USING_DEBUG
+#define RT_DEBUGING_ASSERT
+#define RT_DEBUGING_COLOR
+#define RT_DEBUGING_CONTEXT
+
+/* Inter-Thread communication */
+
+#define RT_USING_SEMAPHORE
+#define RT_USING_MUTEX
+#define RT_USING_EVENT
+#define RT_USING_MAILBOX
+#define RT_USING_MESSAGEQUEUE
+/* end of Inter-Thread communication */
+
+/* Memory Management */
+
+#define RT_USING_MEMPOOL
+#define RT_USING_SMALL_MEM
+#define RT_USING_SMALL_MEM_AS_HEAP
+#define RT_USING_HEAP
+/* end of Memory Management */
+#define RT_USING_DEVICE
+#define RT_USING_CONSOLE
+#define RT_CONSOLEBUF_SIZE 128
+#define RT_CONSOLE_DEVICE_NAME "uart4"
+#define RT_VER_NUM 0x50201
+#define RT_BACKTRACE_LEVEL_MAX_NR 32
+/* end of RT-Thread Kernel */
+#define RT_USING_CACHE
+#define RT_USING_HW_ATOMIC
+#define RT_USING_CPU_FFS
+#define ARCH_ARM
+#define ARCH_ARM_CORTEX_M
+#define ARCH_ARM_CORTEX_M7
+
+/* RT-Thread Components */
+
+#define RT_USING_COMPONENTS_INIT
+#define RT_USING_USER_MAIN
+#define RT_MAIN_THREAD_STACK_SIZE 2048
+#define RT_MAIN_THREAD_PRIORITY 10
+#define RT_USING_MSH
+#define RT_USING_FINSH
+#define FINSH_USING_MSH
+#define FINSH_THREAD_NAME "tshell"
+#define FINSH_THREAD_PRIORITY 20
+#define FINSH_THREAD_STACK_SIZE 4096
+#define FINSH_USING_HISTORY
+#define FINSH_HISTORY_LINES 5
+#define FINSH_USING_SYMTAB
+#define FINSH_CMD_SIZE 80
+#define MSH_USING_BUILT_IN_COMMANDS
+#define FINSH_USING_DESCRIPTION
+#define FINSH_ARG_MAX 10
+#define FINSH_USING_OPTION_COMPLETION
+
+/* DFS: device virtual file system */
+
+/* end of DFS: device virtual file system */
+
+/* Device Drivers */
+
+#define RT_USING_DEVICE_IPC
+#define RT_UNAMED_PIPE_NUMBER 64
+#define RT_USING_SERIAL
+#define RT_USING_SERIAL_V1
+#define RT_SERIAL_RB_BUFSZ 64
+#define RT_USING_I2C
+#define RT_USING_I2C_BITOPS
+#define RT_USING_SPI
+#define RT_USING_TOUCH
+#define RT_USING_PIN
+/* end of Device Drivers */
+
+/* C/C++ and POSIX layer */
+
+/* ISO-ANSI C layer */
+
+/* Timezone and Daylight Saving Time */
+
+#define RT_LIBC_USING_LIGHT_TZ_DST
+#define RT_LIBC_TZ_DEFAULT_HOUR 8
+#define RT_LIBC_TZ_DEFAULT_MIN 0
+#define RT_LIBC_TZ_DEFAULT_SEC 0
+/* end of Timezone and Daylight Saving Time */
+/* end of ISO-ANSI C layer */
+
+/* POSIX (Portable Operating System Interface) layer */
+
+
+/* Interprocess Communication (IPC) */
+
+
+/* Socket is in the 'Network' category */
+
+/* end of Interprocess Communication (IPC) */
+/* end of POSIX (Portable Operating System Interface) layer */
+/* end of C/C++ and POSIX layer */
+
+/* Network */
+
+/* end of Network */
+
+/* Memory protection */
+
+/* end of Memory protection */
+
+/* Utilities */
+
+/* end of Utilities */
+
+/* Using USB legacy version */
+
+/* end of Using USB legacy version */
+/* end of RT-Thread Components */
+
+/* RT-Thread Utestcases */
+
+/* end of RT-Thread Utestcases */
+
+/* RT-Thread online packages */
+
+/* IoT - internet of things */
+
+
+/* Wi-Fi */
+
+/* Marvell WiFi */
+
+/* end of Marvell WiFi */
+
+/* Wiced WiFi */
+
+/* end of Wiced WiFi */
+
+/* CYW43012 WiFi */
+
+/* end of CYW43012 WiFi */
+
+/* BL808 WiFi */
+
+/* end of BL808 WiFi */
+
+/* CYW43439 WiFi */
+
+/* end of CYW43439 WiFi */
+/* end of Wi-Fi */
+
+/* IoT Cloud */
+
+/* end of IoT Cloud */
+/* end of IoT - internet of things */
+
+/* security packages */
+
+/* end of security packages */
+
+/* language packages */
+
+/* JSON: JavaScript Object Notation, a lightweight data-interchange format */
+
+/* end of JSON: JavaScript Object Notation, a lightweight data-interchange format */
+
+/* XML: Extensible Markup Language */
+
+/* end of XML: Extensible Markup Language */
+/* end of language packages */
+
+/* multimedia packages */
+
+/* LVGL: powerful and easy-to-use embedded GUI library */
+
+/* end of LVGL: powerful and easy-to-use embedded GUI library */
+
+/* u8g2: a monochrome graphic library */
+
+/* end of u8g2: a monochrome graphic library */
+/* end of multimedia packages */
+
+/* tools packages */
+
+/* end of tools packages */
+
+/* system packages */
+
+/* enhanced kernel services */
+
+/* end of enhanced kernel services */
+
+/* acceleration: Assembly language or algorithmic acceleration packages */
+
+/* end of acceleration: Assembly language or algorithmic acceleration packages */
+
+/* CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
+
+#define PKG_USING_CMSIS_CORE
+#define PKG_USING_CMSIS_CORE_LATEST_VERSION
+/* end of CMSIS: ARM Cortex-M Microcontroller Software Interface Standard */
+
+/* Micrium: Micrium software products porting for RT-Thread */
+
+/* end of Micrium: Micrium software products porting for RT-Thread */
+/* end of system packages */
+
+/* peripheral libraries and drivers */
+
+/* HAL & SDK Drivers */
+
+/* STM32 HAL & SDK Drivers */
+
+#define PKG_USING_STM32H7RS_HAL_DRIVER
+#define PKG_USING_STM32H7RS_HAL_DRIVER_LATEST_VERSION
+#define PKG_USING_STM32H7RS_CMSIS_DRIVER
+#define PKG_USING_STM32H7RS_CMSIS_DRIVER_LATEST_VERSION
+/* end of STM32 HAL & SDK Drivers */
+
+/* Infineon HAL Packages */
+
+/* end of Infineon HAL Packages */
+
+/* Kendryte SDK */
+
+/* end of Kendryte SDK */
+
+/* WCH HAL & SDK Drivers */
+
+/* end of WCH HAL & SDK Drivers */
+
+/* AT32 HAL & SDK Drivers */
+
+/* end of AT32 HAL & SDK Drivers */
+/* end of HAL & SDK Drivers */
+
+/* sensors drivers */
+
+/* end of sensors drivers */
+
+/* touch drivers */
+
+/* end of touch drivers */
+/* end of peripheral libraries and drivers */
+
+/* AI packages */
+
+/* end of AI packages */
+
+/* Signal Processing and Control Algorithm Packages */
+
+/* end of Signal Processing and Control Algorithm Packages */
+
+/* miscellaneous packages */
+
+/* project laboratory */
+
+/* end of project laboratory */
+
+/* samples: kernel and components samples */
+
+/* end of samples: kernel and components samples */
+
+/* entertainment: terminal games and other interesting software packages */
+
+/* end of entertainment: terminal games and other interesting software packages */
+/* end of miscellaneous packages */
+
+/* Arduino libraries */
+
+
+/* Projects and Demos */
+
+/* end of Projects and Demos */
+
+/* Sensors */
+
+/* end of Sensors */
+
+/* Display */
+
+/* end of Display */
+
+/* Timing */
+
+/* end of Timing */
+
+/* Data Processing */
+
+/* end of Data Processing */
+
+/* Data Storage */
+
+/* Communication */
+
+/* end of Communication */
+
+/* Device Control */
+
+/* end of Device Control */
+
+/* Other */
+
+/* end of Other */
+
+/* Signal IO */
+
+/* end of Signal IO */
+
+/* Uncategorized */
+
+/* end of Arduino libraries */
+/* end of RT-Thread online packages */
+#define SOC_FAMILY_STM32
+
+/* Hardware Drivers Config */
+
+/* Onboard Peripheral Drivers */
+
+#define BSP_USING_USB_TO_USART
+/* end of Onboard Peripheral Drivers */
+
+/* On-chip Peripheral Drivers */
+
+#define BSP_USING_GPIO
+#define BSP_USING_UART
+#define BSP_STM32_UART_V1_TX_TIMEOUT 6000
+#define BSP_USING_UART4
+#define BSP_UART4_RX_BUFSIZE 256
+#define BSP_UART4_TX_BUFSIZE 0
+/* end of On-chip Peripheral Drivers */
+/* end of Hardware Drivers Config */
+
+#endif

bsp/stm32/stm32h7r7-artpi2/rtconfig.py

@@ -0,0 +1,133 @@
+import os
+
+# toolchains options
+ARCH='arm'
+CPU='cortex-m7'
+CROSS_TOOL='gcc'
+
+# bsp lib config
+BSP_LIBRARY_TYPE = None
+
+if os.getenv('RTT_CC'):
+    CROSS_TOOL = os.getenv('RTT_CC')
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+
+# cross_tool provides the cross compiler
+# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
+if  CROSS_TOOL == 'gcc':
+    PLATFORM    = 'gcc'
+    EXEC_PATH   = r'/opt/gcc-arm-none-eabi/bin/'
+elif CROSS_TOOL == 'keil':
+    PLATFORM    = 'armcc'
+    EXEC_PATH   = r'C:/Keil_v5'
+
+if os.getenv('RTT_EXEC_PATH'):
+    EXEC_PATH = os.getenv('RTT_EXEC_PATH')
+
+BUILD = 'debug'
+
+if PLATFORM == 'gcc':
+    # toolchains
+    PREFIX = 'arm-none-eabi-'
+    CC = PREFIX + 'gcc'
+    AS = PREFIX + 'gcc'
+    AR = PREFIX + 'ar'
+    CXX = PREFIX + 'g++'
+    LINK = PREFIX + 'gcc'
+    TARGET_EXT = 'elf'
+    SIZE = PREFIX + 'size'
+    OBJDUMP = PREFIX + 'objdump'
+    OBJCPY = PREFIX + 'objcopy'
+
+    DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv5-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
+    CFLAGS = DEVICE + ' -Dgcc'
+    AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
+    LFLAGS = DEVICE + ' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
+
+    CPATH = ''
+    LPATH = ''
+
+    if BUILD == 'debug':
+        CFLAGS += ' -O0 -gdwarf-2 -g'
+        AFLAGS += ' -gdwarf-2'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS 
+    CFLAGS += ' -std=gnu99'
+
+    POST_ACTION = OBJCPY + ' -O binary $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
+
+elif PLATFORM == 'armcc':
+    # toolchains
+    CC = 'armcc'
+    CXX = 'armcc'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M7.fp.sp'
+    CFLAGS = '-c ' + DEVICE + ' --apcs=interwork --c99'
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --scatter "board\linker_scripts\link.sct" --info sizes --info totals --info unused --info veneers --list rtthread.map --strict'
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCC/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCC/lib'
+
+    CFLAGS += ' -D__MICROLIB '
+    AFLAGS += ' --pd "__MICROLIB SETA 1" '
+    LFLAGS += ' --library_type=microlib '
+    EXEC_PATH += '/ARM/ARMCC/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O0'
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+
+    CXXFLAGS = CFLAGS 
+    CFLAGS += ' -std=gnu99'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+elif PLATFORM == 'armclang':
+    # toolchains
+    CC = 'armclang'
+    CXX = 'armclang'
+    AS = 'armasm'
+    AR = 'armar'
+    LINK = 'armlink'
+    TARGET_EXT = 'axf'
+
+    DEVICE = ' --cpu Cortex-M7.fp.sp '
+    CFLAGS = ' --target=arm-arm-none-eabi -mcpu=cortex-M7 '
+    CFLAGS += ' -mcpu=cortex-M7 -mfpu=fpv4-sp-d16 '
+    CFLAGS += ' -mfloat-abi=hard -c -fno-rtti -funsigned-char -fshort-enums -fshort-wchar '
+    CFLAGS += ' -gdwarf-3 -ffunction-sections '
+    AFLAGS = DEVICE + ' --apcs=interwork '
+    LFLAGS = DEVICE + ' --info sizes --info totals --info unused --info veneers '
+    LFLAGS += ' --list rt-thread.map '
+    LFLAGS += r' --strict --scatter "board\linker_scripts\link.sct" '
+    CFLAGS += ' -I' + EXEC_PATH + '/ARM/ARMCLANG/include'
+    LFLAGS += ' --libpath=' + EXEC_PATH + '/ARM/ARMCLANG/lib'
+
+    EXEC_PATH += '/ARM/ARMCLANG/bin/'
+
+    if BUILD == 'debug':
+        CFLAGS += ' -g -O1' # armclang recommend
+        AFLAGS += ' -g'
+    else:
+        CFLAGS += ' -O2'
+        
+    CXXFLAGS = CFLAGS
+    CFLAGS += ' -std=gnu99'
+
+    POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
+
+def dist_handle(BSP_ROOT, dist_dir):
+    import sys
+    cwd_path = os.getcwd()
+    sys.path.append(os.path.join(os.path.dirname(BSP_ROOT), 'tools'))
+    from sdk_dist import dist_do_building
+    dist_do_building(BSP_ROOT, dist_dir)

bsp/stm32/stm32h7r7-artpi2/template.uvoptx

@@ -0,0 +1,177 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Extensions>
+    <cExt>*.c</cExt>
+    <aExt>*.s*; *.src; *.a*</aExt>
+    <oExt>*.obj; *.o</oExt>
+    <lExt>*.lib</lExt>
+    <tExt>*.txt; *.h; *.inc; *.md</tExt>
+    <pExt>*.plm</pExt>
+    <CppX>*.cpp</CppX>
+    <nMigrate>0</nMigrate>
+  </Extensions>
+
+  <DaveTm>
+    <dwLowDateTime>0</dwLowDateTime>
+    <dwHighDateTime>0</dwHighDateTime>
+  </DaveTm>
+
+  <Target>
+    <TargetName>rt-thread</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <CLKADS>12000000</CLKADS>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+        <RunAbUc>0</RunAbUc>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\build\</ListingPath>
+      </OPTLEX>
+      <ListingPage>
+        <CreateCListing>1</CreateCListing>
+        <CreateAListing>1</CreateAListing>
+        <CreateLListing>1</CreateLListing>
+        <CreateIListing>0</CreateIListing>
+        <AsmCond>1</AsmCond>
+        <AsmSymb>1</AsmSymb>
+        <AsmXref>0</AsmXref>
+        <CCond>1</CCond>
+        <CCode>0</CCode>
+        <CListInc>0</CListInc>
+        <CSymb>0</CSymb>
+        <LinkerCodeListing>0</LinkerCodeListing>
+      </ListingPage>
+      <OPTXL>
+        <LMap>1</LMap>
+        <LComments>1</LComments>
+        <LGenerateSymbols>1</LGenerateSymbols>
+        <LLibSym>1</LLibSym>
+        <LLines>1</LLines>
+        <LLocSym>1</LLocSym>
+        <LPubSym>1</LPubSym>
+        <LXref>0</LXref>
+        <LExpSel>0</LExpSel>
+      </OPTXL>
+      <OPTFL>
+        <tvExp>0</tvExp>
+        <tvExpOptDlg>0</tvExpOptDlg>
+        <IsCurrentTarget>1</IsCurrentTarget>
+      </OPTFL>
+      <CpuCode>18</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>1</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <bEvRecOn>1</bEvRecOn>
+        <bSchkAxf>0</bSchkAxf>
+        <bTchkAxf>0</bTchkAxf>
+        <nTsel>6</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>STLink\ST-LINKIII-KEIL_SWO.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 )  -FN1 -FC1000 -FD20000000 -FF0STM32H7Rx_64k -FL010000 -FS08000000 -FP0($$Device:STM32H7S7L8Hx$CMSIS\Flash\STM32H7Rx_64k.FLM)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>ST-LINKIII-KEIL_SWO</Key>
+          <Name>-U003C00203431511737393330 -O206 -SF4000 -C0 -A0 -I0 -HNlocalhost -HP7184 -P1 -TO131090 -TC10000000 -TT10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FCFFFC -FN2 -FF0STM32H7Rx_64k.FLM -FS08000000 -FL010000 -FP0($$Device:STM32H7S7L8Hx$CMSIS\Flash\STM32H7Rx_64k.FLM) -FF1MX66UW1G45G_STM32H7S78-DK.FLM -FS170000000 -FL18000000 -FP1($$Device:STM32H7S7L8Hx$CMSIS\Flash\MX66UW1G45G_STM32H7S78-DK.FLM) -WA0 -WE0 -WVCE4 -WS2710 -WM0 -WP2</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+      <bLintAuto>0</bLintAuto>
+      <bAutoGenD>0</bAutoGenD>
+      <LntExFlags>0</LntExFlags>
+      <pMisraName></pMisraName>
+      <pszMrule></pszMrule>
+      <pSingCmds></pSingCmds>
+      <pMultCmds></pMultCmds>
+      <pMisraNamep></pMisraNamep>
+      <pszMrulep></pszMrulep>
+      <pSingCmdsp></pSingCmdsp>
+      <pMultCmdsp></pMultCmdsp>
+    </TargetOption>
+  </Target>
+
+</ProjectOpt>

bsp/stm32/stm32h7r7-artpi2/template.uvprojx

@@ -0,0 +1,392 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<Project xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_projx.xsd">
+
+  <SchemaVersion>2.1</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+
+  <Targets>
+    <Target>
+      <TargetName>rt-thread</TargetName>
+      <ToolsetNumber>0x4</ToolsetNumber>
+      <ToolsetName>ARM-ADS</ToolsetName>
+      <pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
+      <uAC6>0</uAC6>
+      <TargetOption>
+        <TargetCommonOption>
+          <Device>STM32H7S7L8Hx</Device>
+          <Vendor>STMicroelectronics</Vendor>
+          <PackID>Keil.STM32H7Rx-7Sx_DFP.0.0.3</PackID>
+          <PackURL>https://www.keil.com/pack/</PackURL>
+          <Cpu>IRAM(0x20000000,0x20000) IROM(0x08000000,0x010000) CPUTYPE("Cortex-M7") FPU3(DFPU) CLOCK(12000000) ELITTLE</Cpu>
+          <FlashUtilSpec></FlashUtilSpec>
+          <StartupFile></StartupFile>
+          <FlashDriverDll>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0STM32H7Rx_64k -FS08000000 -FL010000 -FP0($$Device:STM32H7S7L8Hx$CMSIS\Flash\STM32H7Rx_64k.FLM))</FlashDriverDll>
+          <DeviceId>0</DeviceId>
+          <RegisterFile></RegisterFile>
+          <MemoryEnv></MemoryEnv>
+          <Cmp></Cmp>
+          <Asm></Asm>
+          <Linker></Linker>
+          <OHString></OHString>
+          <InfinionOptionDll></InfinionOptionDll>
+          <SLE66CMisc></SLE66CMisc>
+          <SLE66AMisc></SLE66AMisc>
+          <SLE66LinkerMisc></SLE66LinkerMisc>
+          <SFDFile>$$Device:STM32H7S7L8Hx$CMSIS\SVD\STM32H7RSxx.svd</SFDFile>
+          <bCustSvd>0</bCustSvd>
+          <UseEnv>0</UseEnv>
+          <BinPath></BinPath>
+          <IncludePath></IncludePath>
+          <LibPath></LibPath>
+          <RegisterFilePath></RegisterFilePath>
+          <DBRegisterFilePath></DBRegisterFilePath>
+          <TargetStatus>
+            <Error>0</Error>
+            <ExitCodeStop>0</ExitCodeStop>
+            <ButtonStop>0</ButtonStop>
+            <NotGenerated>0</NotGenerated>
+            <InvalidFlash>1</InvalidFlash>
+          </TargetStatus>
+          <OutputDirectory>.\build\</OutputDirectory>
+          <OutputName>rt-thread</OutputName>
+          <CreateExecutable>1</CreateExecutable>
+          <CreateLib>0</CreateLib>
+          <CreateHexFile>0</CreateHexFile>
+          <DebugInformation>1</DebugInformation>
+          <BrowseInformation>0</BrowseInformation>
+          <ListingPath>.\build\</ListingPath>
+          <HexFormatSelection>1</HexFormatSelection>
+          <Merge32K>0</Merge32K>
+          <CreateBatchFile>0</CreateBatchFile>
+          <BeforeCompile>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopU1X>0</nStopU1X>
+            <nStopU2X>0</nStopU2X>
+          </BeforeCompile>
+          <BeforeMake>
+            <RunUserProg1>0</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name></UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopB1X>0</nStopB1X>
+            <nStopB2X>0</nStopB2X>
+          </BeforeMake>
+          <AfterMake>
+            <RunUserProg1>1</RunUserProg1>
+            <RunUserProg2>0</RunUserProg2>
+            <UserProg1Name>fromelf --bin !L --output rtthread.bin</UserProg1Name>
+            <UserProg2Name></UserProg2Name>
+            <UserProg1Dos16Mode>0</UserProg1Dos16Mode>
+            <UserProg2Dos16Mode>0</UserProg2Dos16Mode>
+            <nStopA1X>0</nStopA1X>
+            <nStopA2X>0</nStopA2X>
+          </AfterMake>
+          <SelectedForBatchBuild>0</SelectedForBatchBuild>
+          <SVCSIdString></SVCSIdString>
+        </TargetCommonOption>
+        <CommonProperty>
+          <UseCPPCompiler>0</UseCPPCompiler>
+          <RVCTCodeConst>0</RVCTCodeConst>
+          <RVCTZI>0</RVCTZI>
+          <RVCTOtherData>0</RVCTOtherData>
+          <ModuleSelection>0</ModuleSelection>
+          <IncludeInBuild>1</IncludeInBuild>
+          <AlwaysBuild>0</AlwaysBuild>
+          <GenerateAssemblyFile>0</GenerateAssemblyFile>
+          <AssembleAssemblyFile>0</AssembleAssemblyFile>
+          <PublicsOnly>0</PublicsOnly>
+          <StopOnExitCode>3</StopOnExitCode>
+          <CustomArgument></CustomArgument>
+          <IncludeLibraryModules></IncludeLibraryModules>
+          <ComprImg>1</ComprImg>
+        </CommonProperty>
+        <DllOption>
+          <SimDllName>SARMCM3.DLL</SimDllName>
+          <SimDllArguments> -REMAP -MPU</SimDllArguments>
+          <SimDlgDll>DCM.DLL</SimDlgDll>
+          <SimDlgDllArguments>-pCM7</SimDlgDllArguments>
+          <TargetDllName>SARMCM3.DLL</TargetDllName>
+          <TargetDllArguments> -MPU</TargetDllArguments>
+          <TargetDlgDll>TCM.DLL</TargetDlgDll>
+          <TargetDlgDllArguments>-pCM7</TargetDlgDllArguments>
+        </DllOption>
+        <DebugOption>
+          <OPTHX>
+            <HexSelection>1</HexSelection>
+            <HexRangeLowAddress>0</HexRangeLowAddress>
+            <HexRangeHighAddress>0</HexRangeHighAddress>
+            <HexOffset>0</HexOffset>
+            <Oh166RecLen>16</Oh166RecLen>
+          </OPTHX>
+        </DebugOption>
+        <Utilities>
+          <Flash1>
+            <UseTargetDll>1</UseTargetDll>
+            <UseExternalTool>0</UseExternalTool>
+            <RunIndependent>0</RunIndependent>
+            <UpdateFlashBeforeDebugging>1</UpdateFlashBeforeDebugging>
+            <Capability>1</Capability>
+            <DriverSelection>4096</DriverSelection>
+          </Flash1>
+          <bUseTDR>1</bUseTDR>
+          <Flash2>BIN\UL2CM3.DLL</Flash2>
+          <Flash3>"" ()</Flash3>
+          <Flash4></Flash4>
+          <pFcarmOut></pFcarmOut>
+          <pFcarmGrp></pFcarmGrp>
+          <pFcArmRoot></pFcArmRoot>
+          <FcArmLst>0</FcArmLst>
+        </Utilities>
+        <TargetArmAds>
+          <ArmAdsMisc>
+            <GenerateListings>0</GenerateListings>
+            <asHll>1</asHll>
+            <asAsm>1</asAsm>
+            <asMacX>1</asMacX>
+            <asSyms>1</asSyms>
+            <asFals>1</asFals>
+            <asDbgD>1</asDbgD>
+            <asForm>1</asForm>
+            <ldLst>0</ldLst>
+            <ldmm>1</ldmm>
+            <ldXref>1</ldXref>
+            <BigEnd>0</BigEnd>
+            <AdsALst>1</AdsALst>
+            <AdsACrf>1</AdsACrf>
+            <AdsANop>0</AdsANop>
+            <AdsANot>0</AdsANot>
+            <AdsLLst>1</AdsLLst>
+            <AdsLmap>1</AdsLmap>
+            <AdsLcgr>1</AdsLcgr>
+            <AdsLsym>1</AdsLsym>
+            <AdsLszi>1</AdsLszi>
+            <AdsLtoi>1</AdsLtoi>
+            <AdsLsun>1</AdsLsun>
+            <AdsLven>1</AdsLven>
+            <AdsLsxf>1</AdsLsxf>
+            <RvctClst>0</RvctClst>
+            <GenPPlst>0</GenPPlst>
+            <AdsCpuType>"Cortex-M7"</AdsCpuType>
+            <RvctDeviceName></RvctDeviceName>
+            <mOS>0</mOS>
+            <uocRom>0</uocRom>
+            <uocRam>0</uocRam>
+            <hadIROM>1</hadIROM>
+            <hadIRAM>1</hadIRAM>
+            <hadXRAM>0</hadXRAM>
+            <uocXRam>0</uocXRam>
+            <RvdsVP>3</RvdsVP>
+            <RvdsMve>0</RvdsMve>
+            <RvdsCdeCp>0</RvdsCdeCp>
+            <nBranchProt>0</nBranchProt>
+            <hadIRAM2>0</hadIRAM2>
+            <hadIROM2>0</hadIROM2>
+            <StupSel>8</StupSel>
+            <useUlib>1</useUlib>
+            <EndSel>0</EndSel>
+            <uLtcg>0</uLtcg>
+            <nSecure>0</nSecure>
+            <RoSelD>3</RoSelD>
+            <RwSelD>3</RwSelD>
+            <CodeSel>0</CodeSel>
+            <OptFeed>0</OptFeed>
+            <NoZi1>0</NoZi1>
+            <NoZi2>0</NoZi2>
+            <NoZi3>0</NoZi3>
+            <NoZi4>0</NoZi4>
+            <NoZi5>0</NoZi5>
+            <Ro1Chk>0</Ro1Chk>
+            <Ro2Chk>0</Ro2Chk>
+            <Ro3Chk>0</Ro3Chk>
+            <Ir1Chk>1</Ir1Chk>
+            <Ir2Chk>0</Ir2Chk>
+            <Ra1Chk>0</Ra1Chk>
+            <Ra2Chk>0</Ra2Chk>
+            <Ra3Chk>0</Ra3Chk>
+            <Im1Chk>1</Im1Chk>
+            <Im2Chk>0</Im2Chk>
+            <OnChipMemories>
+              <Ocm1>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm1>
+              <Ocm2>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm2>
+              <Ocm3>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm3>
+              <Ocm4>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm4>
+              <Ocm5>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm5>
+              <Ocm6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </Ocm6>
+              <IRAM>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </IRAM>
+              <IROM>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x10000</Size>
+              </IROM>
+              <XRAM>
+                <Type>1</Type>
+                <StartAddress>0x30000000</StartAddress>
+                <Size>0x48000</Size>
+              </XRAM>
+              <OCR_RVCT1>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT1>
+              <OCR_RVCT2>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT2>
+              <OCR_RVCT3>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT3>
+              <OCR_RVCT4>
+                <Type>1</Type>
+                <StartAddress>0x8000000</StartAddress>
+                <Size>0x10000</Size>
+              </OCR_RVCT4>
+              <OCR_RVCT5>
+                <Type>1</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT5>
+              <OCR_RVCT6>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT6>
+              <OCR_RVCT7>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT7>
+              <OCR_RVCT8>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT8>
+              <OCR_RVCT9>
+                <Type>0</Type>
+                <StartAddress>0x20000000</StartAddress>
+                <Size>0x20000</Size>
+              </OCR_RVCT9>
+              <OCR_RVCT10>
+                <Type>0</Type>
+                <StartAddress>0x0</StartAddress>
+                <Size>0x0</Size>
+              </OCR_RVCT10>
+            </OnChipMemories>
+            <RvctStartVector></RvctStartVector>
+          </ArmAdsMisc>
+          <Cads>
+            <interw>1</interw>
+            <Optim>2</Optim>
+            <oTime>0</oTime>
+            <SplitLS>0</SplitLS>
+            <OneElfS>1</OneElfS>
+            <Strict>0</Strict>
+            <EnumInt>0</EnumInt>
+            <PlainCh>1</PlainCh>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <wLevel>0</wLevel>
+            <uThumb>0</uThumb>
+            <uSurpInc>0</uSurpInc>
+            <uC99>1</uC99>
+            <uGnu>0</uGnu>
+            <useXO>0</useXO>
+            <v6Lang>3</v6Lang>
+            <v6LangP>5</v6LangP>
+            <vShortEn>1</vShortEn>
+            <vShortWch>1</vShortWch>
+            <v6Lto>0</v6Lto>
+            <v6WtE>0</v6WtE>
+            <v6Rtti>0</v6Rtti>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Cads>
+          <Aads>
+            <interw>1</interw>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <thumb>0</thumb>
+            <SplitLS>0</SplitLS>
+            <SwStkChk>0</SwStkChk>
+            <NoWarn>0</NoWarn>
+            <uSurpInc>0</uSurpInc>
+            <useXO>0</useXO>
+            <ClangAsOpt>4</ClangAsOpt>
+            <VariousControls>
+              <MiscControls></MiscControls>
+              <Define></Define>
+              <Undefine></Undefine>
+              <IncludePath></IncludePath>
+            </VariousControls>
+          </Aads>
+          <LDads>
+            <umfTarg>0</umfTarg>
+            <Ropi>0</Ropi>
+            <Rwpi>0</Rwpi>
+            <noStLib>0</noStLib>
+            <RepFail>1</RepFail>
+            <useFile>0</useFile>
+            <TextAddressRange>0x08000000</TextAddressRange>
+            <DataAddressRange>0x20000000</DataAddressRange>
+            <pXoBase></pXoBase>
+            <ScatterFile>.\board\linker_scripts\link.sct</ScatterFile>
+            <IncludeLibs></IncludeLibs>
+            <IncludeLibsPath></IncludeLibsPath>
+            <Misc></Misc>
+            <LinkerInputFile></LinkerInputFile>
+            <DisabledWarnings></DisabledWarnings>
+          </LDads>
+        </TargetArmAds>
+      </TargetOption>
+    </Target>
+  </Targets>
+
+  <RTE>
+    <apis/>
+    <components/>
+    <files/>
+  </RTE>
+
+</Project>